Searched refs:AGILEX5_DMA_CORE_CLK (Results 1 – 2 of 2) sorted by relevance
77 #define AGILEX5_DMA_CORE_CLK 61 macro
361 { AGILEX5_DMA_CORE_CLK, "dma_core_clk", l4_mp_clk_parent, 1, 0, 0x7C,