Searched refs:AD4062_REG_GP_CONF_MODE_MSK_0 (Results 1 – 1 of 1) sorted by relevance
57 #define AD4062_REG_GP_CONF_MODE_MSK_0 GENMASK(2, 0) macro511 AD4062_REG_GP_CONF_MODE_MSK_0, in ad4062_setup()512 FIELD_PREP(AD4062_REG_GP_CONF_MODE_MSK_0, in ad4062_setup()1378 AD4062_REG_GP_CONF_MODE_MSK_0, in ad4062_gpio_set()1379 FIELD_PREP(AD4062_REG_GP_CONF_MODE_MSK_0, reg_val)); in ad4062_gpio_set()1395 reg_val = FIELD_GET(AD4062_REG_GP_CONF_MODE_MSK_0, reg_val); in ad4062_gpio_get()1403 u8 val = FIELD_PREP(AD4062_REG_GP_CONF_MODE_MSK_0, AD4062_GP_DISABLED) | in ad4062_gpio_disable()1407 AD4062_REG_GP_CONF_MODE_MSK_1 | AD4062_REG_GP_CONF_MODE_MSK_0, in ad4062_gpio_disable()1442 mask |= AD4062_REG_GP_CONF_MODE_MSK_0; in ad4062_gpio_init()1443 val |= FIELD_PREP(AD4062_REG_GP_CONF_MODE_MSK_0, AD4062_GP_STATIC_LOW); in ad4062_gpio_init()