Searched refs:A3700_SPI_FIFO_THRS_MASK (Results 1 – 1 of 1) sorted by relevance
84 #define A3700_SPI_FIFO_THRS_MASK 0x7 macro407 val &= ~(A3700_SPI_FIFO_THRS_MASK << A3700_SPI_RFIFO_THRS_BIT); in a3700_spi_fifo_thres_set()409 val &= ~(A3700_SPI_FIFO_THRS_MASK << A3700_SPI_WFIFO_THRS_BIT); in a3700_spi_fifo_thres_set()