| /linux/arch/arm64/kernel/ |
| H A D | hw_breakpoint.c | 61 #define READ_WB_REG_CASE(OFF, N, REG, VAL) \ argument 63 AARCH64_DBG_READ(N, REG, VAL); \ 66 #define WRITE_WB_REG_CASE(OFF, N, REG, VAL) \ argument 68 AARCH64_DBG_WRITE(N, REG, VAL); \ 71 #define GEN_READ_WB_REG_CASES(OFF, REG, VAL) \ argument 72 READ_WB_REG_CASE(OFF, 0, REG, VAL); \ 73 READ_WB_REG_CASE(OFF, 1, REG, VAL); \ 74 READ_WB_REG_CASE(OFF, 2, REG, VAL); \ 75 READ_WB_REG_CASE(OFF, 3, REG, VAL); \ 76 READ_WB_REG_CASE(OFF, 4, REG, VAL); \ [all …]
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| /linux/arch/arm/kernel/ |
| H A D | hw_breakpoint.c | 49 #define READ_WB_REG_CASE(OP2, M, VAL) \ argument 51 ARM_DBG_READ(c0, c ## M, OP2, VAL); \ 54 #define WRITE_WB_REG_CASE(OP2, M, VAL) \ argument 56 ARM_DBG_WRITE(c0, c ## M, OP2, VAL); \ 59 #define GEN_READ_WB_REG_CASES(OP2, VAL) \ argument 60 READ_WB_REG_CASE(OP2, 0, VAL); \ 61 READ_WB_REG_CASE(OP2, 1, VAL); \ 62 READ_WB_REG_CASE(OP2, 2, VAL); \ 63 READ_WB_REG_CASE(OP2, 3, VAL); \ 64 READ_WB_REG_CASE(OP2, 4, VAL); \ [all …]
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| /linux/arch/arm64/include/asm/ |
| H A D | rqspinlock.h | 36 __unqual_scalar_typeof(*ptr) VAL; \ 39 VAL = READ_ONCE(*__PTR); \ 49 (typeof(*ptr))VAL; \ 56 __unqual_scalar_typeof(*ptr) VAL; \ 58 VAL = smp_load_acquire(__PTR); \ 61 __cmpwait_relaxed(__PTR, VAL); \ 65 (typeof(*ptr))VAL; \
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| H A D | hw_breakpoint.h | 98 #define AARCH64_DBG_READ(N, REG, VAL) do {\ argument 99 VAL = read_sysreg(dbg##REG##N##_el1);\ 102 #define AARCH64_DBG_WRITE(N, REG, VAL) do {\ argument 103 write_sysreg(VAL, dbg##REG##N##_el1);\
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| /linux/include/uapi/linux/ |
| H A D | btf.h | 93 #define BTF_INT_ENCODING(VAL) (((VAL) & 0x0f000000) >> 24) argument 94 #define BTF_INT_OFFSET(VAL) (((VAL) & 0x00ff0000) >> 16) argument 95 #define BTF_INT_BITS(VAL) ((VAL) & 0x000000ff) 92 BTF_INT_ENCODING(VAL) global() argument
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| /linux/tools/include/uapi/linux/ |
| H A D | btf.h | 93 #define BTF_INT_ENCODING(VAL) (((VAL) & 0x0f000000) >> 24) argument 94 #define BTF_INT_OFFSET(VAL) (((VAL) & 0x00ff0000) >> 16) argument 95 #define BTF_INT_BITS(VAL) ((VAL) & 0x000000ff) 92 BTF_INT_ENCODING(VAL) global() argument
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| /linux/tools/testing/selftests/cgroup/ |
| H A D | test_cpuset_prs.sh | 489 VAL=${1#*=} 491 if [[ $VAL -eq 0 ]] 500 echo $VAL > $CPUFILE 551 P*) VAL=${CMD#?} 552 case $VAL in 553 0) VAL=member 555 1) VAL=root 557 2) VAL=isolated 560 echo "Invalid partition state - $VAL" 564 COMM="echo $VAL > $PFILE" [all …]
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| /linux/arch/loongarch/include/asm/ |
| H A D | hw_breakpoint.h | 57 #define LOONGARCH_CSR_WATCH_READ(N, REG, T, VAL) \ argument 60 VAL = csr_read64(LOONGARCH_CSR_##IB##N##REG); \ 62 VAL = csr_read64(LOONGARCH_CSR_##DB##N##REG); \ 65 #define LOONGARCH_CSR_WATCH_WRITE(N, REG, T, VAL) \ argument 68 csr_write64(VAL, LOONGARCH_CSR_##IB##N##REG); \ 70 csr_write64(VAL, LOONGARCH_CSR_##DB##N##REG); \
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| /linux/drivers/net/ethernet/qlogic/qlcnic/ |
| H A D | qlcnic_hdr.h | 641 #define QLC_DEV_SET_REF_CNT(VAL, FN) ((VAL) |= (1 << (FN * 4))) argument 642 #define QLC_DEV_CLR_REF_CNT(VAL, FN) ((VAL) &= ~(1 << (FN * 4))) argument 643 #define QLC_DEV_SET_RST_RDY(VAL, FN) ((VAL) |= (1 << (FN * 4))) argument 644 #define QLC_DEV_SET_QSCNT_RDY(VAL, FN) ((VAL) |= (2 << (FN * 4))) argument 645 #define QLC_DEV_CLR_RST_QSCNT(VAL, FN) ((VAL) &= ~(3 << (FN * 4))) argument 647 #define QLC_DEV_GET_DRV(VAL, FN) (0xf & ((VAL) >> (FN * 4))) argument 648 #define QLC_DEV_SET_DRV(VAL, FN) ((VAL) << (FN * 4)) argument 678 #define ISR_LEGACY_INT_TRIGGERED(VAL) (((VAL) & 0x300) == 0x200) argument
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| /linux/arch/riscv/include/asm/ |
| H A D | barrier.h | 72 __unqual_scalar_typeof(*ptr) VAL; \ 74 VAL = READ_ONCE(*__PTR); \ 77 __cmpwait_relaxed(ptr, VAL); \ 79 (typeof(*ptr))VAL; \
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| /linux/drivers/watchdog/ |
| H A D | it87_wdt.c | 44 #define VAL 0x2f macro 136 outb(0x02, VAL); in superio_exit() 143 outb(ldn, VAL); in superio_select() 149 return inb(VAL); in superio_inb() 155 outb(val, VAL); in superio_outb() 163 val = inb(VAL) << 8; in superio_inw() 165 val |= inb(VAL); in superio_inw()
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| H A D | it8712f_wdt.c | 57 #define VAL 0x2f /* The value to read/write */ macro 95 return inb(VAL); in superio_inb() 101 outb(val, VAL); in superio_outb() 108 val = inb(VAL) << 8; in superio_inw() 110 val |= inb(VAL); in superio_inw() 117 outb(ldn, VAL); in superio_select() 138 outb(0x02, VAL); in superio_exit()
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| /linux/drivers/net/ethernet/qlogic/netxen/ |
| H A D | netxen_nic_hdr.h | 950 #define NETXEN_DIMM_MEMTYPE(VAL) ((VAL >> 3) & 0xf) argument 951 #define NETXEN_DIMM_NUMROWS(VAL) ((VAL >> 7) & 0xf) argument 952 #define NETXEN_DIMM_NUMCOLS(VAL) ((VAL >> 11) & 0xf) argument 953 #define NETXEN_DIMM_NUMRANKS(VAL) ((VAL >> 15) & 0x3) argument 954 #define NETXEN_DIMM_DATAWIDTH(VAL) ((VAL >> 18) & 0x3) argument 955 #define NETXEN_DIMM_NUMBANKS(VAL) ((VAL >> 21) & 0xf) argument 956 #define NETXEN_DIMM_TYPE(VAL) ((VAL >> 25) & 0x3f) argument 991 #define ISR_LEGACY_INT_TRIGGERED(VAL) (((VAL) & 0x300) == 0x200) argument
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| /linux/arch/arm/include/asm/ |
| H A D | hw_breakpoint.h | 110 #define ARM_DBG_READ(N, M, OP2, VAL) do {\ argument 111 asm volatile("mrc p14, 0, %0, " #N "," #M ", " #OP2 : "=r" (VAL));\ 114 #define ARM_DBG_WRITE(N, M, OP2, VAL) do {\ argument 115 asm volatile("mcr p14, 0, %0, " #N "," #M ", " #OP2 : : "r" (VAL));\
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| /linux/tools/testing/selftests/ntb/ |
| H A D | ntb_test.sh | 266 VAL=$RANDOM 267 write_file "$VAL" "$LOC/spad$i" 270 if [[ "$VAL" -ne "$RVAL" ]]; then 271 echo "Scratchpad $i value $RVAL doesn't match $VAL" >&2 300 VAL=$RANDOM 301 write_file "$VAL" "$LOC/msg$i" 304 if [[ "$VAL" -ne "${RVAL%%<-*}" ]]; then 305 echo "Message $i value $RVAL doesn't match $VAL" >&2
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| /linux/drivers/gpio/ |
| H A D | gpio-it87.c | 38 #define VAL 0x2f macro 95 outb(0x02, VAL); in superio_exit() 102 outb(ldn, VAL); in superio_select() 108 return inb(VAL); in superio_inb() 114 outb(val, VAL); in superio_outb() 122 val = inb(VAL) << 8; in superio_inw() 124 val |= inb(VAL); in superio_inw()
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| /linux/kernel/locking/ |
| H A D | qrwlock.c | 33 atomic_cond_read_acquire(&lock->cnts, !(VAL & _QW_LOCKED)); in queued_read_lock_slowpath() 51 atomic_cond_read_acquire(&lock->cnts, !(VAL & _QW_LOCKED)); in queued_read_lock_slowpath() 85 cnts = atomic_cond_read_relaxed(&lock->cnts, VAL == _QW_WAITING); in queued_write_lock_slowpath()
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| H A D | qspinlock.c | 153 (VAL != _Q_PENDING_VAL) || !cnt--); 197 smp_cond_load_acquire(&lock->locked, !VAL); in clear_pending() 328 val = atomic_cond_read_acquire(&lock->val, !(VAL & _Q_LOCKED_PENDING_MASK)); in queued_spin_lock_slowpath() 368 next = smp_cond_load_relaxed(&node->next, (VAL)); in queued_spin_lock_slowpath()
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| /linux/tools/testing/selftests/bpf/ |
| H A D | bpf_experimental.h | 257 #define __bpf_assert(LHS, op, cons, RHS, VAL) \ argument 261 : : [lhs] "r"(LHS), [rhs] cons(RHS), [value] "ri"(VAL) : ); \ 264 #define __bpf_assert_op_sign(LHS, op, cons, RHS, VAL, supp_sign) \ argument 268 __bpf_assert(LHS, "s" #op, cons, RHS, VAL); \ 270 __bpf_assert(LHS, #op, cons, RHS, VAL); \ 273 #define __bpf_assert_op(LHS, op, RHS, VAL, supp_sign) \ argument 277 __bpf_assert_op_sign(LHS, op, "r", rhs_var, VAL, supp_sign); \ 279 __bpf_assert_op_sign(LHS, op, "i", RHS, VAL, supp_sign); \
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| H A D | bpf_atomic.h | 107 __unqual_typeof(*(p)) VAL; \ 109 VAL = (__unqual_typeof(*(p)))READ_ONCE(*__ptr); \ 115 (typeof(*(p)))VAL; \
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| /linux/drivers/staging/rtl8723bs/hal/ |
| H A D | HalPhyRf_8723B.c | 18 #define VAL 1 macro 960 …pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC94][VAL] = PHY_QueryBBReg(pDM_Odm->Adapter, rOFDM0_X… in _PHY_PathAFillIQKMatrix8723B() 964 …pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC80][VAL] = PHY_QueryBBReg(pDM_Odm->Adapter, rOFDM0_X… in _PHY_PathAFillIQKMatrix8723B() 968 …pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC4C][VAL] = PHY_QueryBBReg(pDM_Odm->Adapter, rOFDM0_E… in _PHY_PathAFillIQKMatrix8723B() 973 …pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xCA0][VAL] = 0xfffffff & PHY_QueryBBReg(pDM_Odm->Adapt… in _PHY_PathAFillIQKMatrix8723B() 976 pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xC14][VAL] = 0x40000100; in _PHY_PathAFillIQKMatrix8723B() 987 …pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xC14][VAL] = PHY_QueryBBReg(pDM_Odm->Adapter, rOFDM0_X… in _PHY_PathAFillIQKMatrix8723B() 992 …pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xCA0][VAL] = PHY_QueryBBReg(pDM_Odm->Adapter, rOFDM0_R… in _PHY_PathAFillIQKMatrix8723B() 1038 …pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC94][VAL] = PHY_QueryBBReg(pDM_Odm->Adapter, rOFDM0_X… in _PHY_PathBFillIQKMatrix8723B() 1042 …pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC80][VAL] = PHY_QueryBBReg(pDM_Odm->Adapter, rOFDM0_X… in _PHY_PathBFillIQKMatrix8723B() [all …]
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| /linux/tools/testing/selftests/bpf/progs/ |
| H A D | bpf_arena_spin_lock.h | 10 #define arch_mcs_spin_lock_contended_label(l, label) smp_cond_load_acquire_label(l, VAL, label) 260 (VAL != _Q_PENDING_VAL) || !cnt--, in arena_spin_lock_slowpath() 305 (void)smp_cond_load_acquire_label(&lock->locked, !VAL, release_err); in arena_spin_lock_slowpath() 404 val = atomic_cond_read_acquire_label(&lock->val, !(VAL & _Q_LOCKED_PENDING_MASK), in arena_spin_lock_slowpath() 444 next = smp_cond_load_relaxed_label(&node->next, (VAL), release_node_err); in arena_spin_lock_slowpath()
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| /linux/tools/testing/selftests/sysctl/ |
| H A D | sysctl.sh | 129 VAL="" 133 VAL="60" 136 VAL="1" 139 VAL="314" 142 VAL="(none)" 145 VAL="" 150 echo -n $VAL > $TARGET
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| /linux/include/asm-generic/ |
| H A D | barrier.h | 248 __unqual_scalar_typeof(*ptr) VAL; \ 250 VAL = READ_ONCE(*__PTR); \ 255 (typeof(*ptr))VAL; \
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| /linux/kernel/bpf/ |
| H A D | rqspinlock.c | 361 (VAL != _Q_PENDING_VAL) || !cnt--); in resilient_queued_spin_lock_slowpath() 408 res_smp_cond_load_acquire(&lock->locked, !VAL || RES_CHECK_TIMEOUT(ts, ret, _Q_LOCKED_MASK)); in resilient_queued_spin_lock_slowpath() 569 val = res_atomic_cond_read_acquire(&lock->val, !(VAL & _Q_LOCKED_PENDING_MASK) || in resilient_queued_spin_lock_slowpath() 575 next = smp_cond_load_relaxed(&node->next, (VAL)); in resilient_queued_spin_lock_slowpath() 607 next = smp_cond_load_relaxed(&node->next, VAL); in resilient_queued_spin_lock_slowpath() 646 next = smp_cond_load_relaxed(&node->next, (VAL)); in resilient_queued_spin_lock_slowpath()
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