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Searched refs:VAL (Results 1 – 25 of 57) sorted by relevance

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/linux/arch/arm64/kernel/
H A Dhw_breakpoint.c60 #define READ_WB_REG_CASE(OFF, N, REG, VAL) \ argument
62 AARCH64_DBG_READ(N, REG, VAL); \
65 #define WRITE_WB_REG_CASE(OFF, N, REG, VAL) \ argument
67 AARCH64_DBG_WRITE(N, REG, VAL); \
70 #define GEN_READ_WB_REG_CASES(OFF, REG, VAL) \ argument
71 READ_WB_REG_CASE(OFF, 0, REG, VAL); \
72 READ_WB_REG_CASE(OFF, 1, REG, VAL); \
73 READ_WB_REG_CASE(OFF, 2, REG, VAL); \
74 READ_WB_REG_CASE(OFF, 3, REG, VAL); \
75 READ_WB_REG_CASE(OFF, 4, REG, VAL); \
[all …]
/linux/arch/arm/kernel/
H A Dhw_breakpoint.c49 #define READ_WB_REG_CASE(OP2, M, VAL) \ argument
51 ARM_DBG_READ(c0, c ## M, OP2, VAL); \
54 #define WRITE_WB_REG_CASE(OP2, M, VAL) \ argument
56 ARM_DBG_WRITE(c0, c ## M, OP2, VAL); \
59 #define GEN_READ_WB_REG_CASES(OP2, VAL) \ argument
60 READ_WB_REG_CASE(OP2, 0, VAL); \
61 READ_WB_REG_CASE(OP2, 1, VAL); \
62 READ_WB_REG_CASE(OP2, 2, VAL); \
63 READ_WB_REG_CASE(OP2, 3, VAL); \
64 READ_WB_REG_CASE(OP2, 4, VAL); \
[all …]
/linux/arch/loongarch/kernel/
H A Dhw_breakpoint.c36 #define READ_WB_REG_CASE(OFF, N, REG, T, VAL) \ argument
38 LOONGARCH_CSR_WATCH_READ(N, REG, T, VAL); \
41 #define WRITE_WB_REG_CASE(OFF, N, REG, T, VAL) \ argument
43 LOONGARCH_CSR_WATCH_WRITE(N, REG, T, VAL); \
46 #define GEN_READ_WB_REG_CASES(OFF, REG, T, VAL) \ argument
47 READ_WB_REG_CASE(OFF, 0, REG, T, VAL); \
48 READ_WB_REG_CASE(OFF, 1, REG, T, VAL); \
49 READ_WB_REG_CASE(OFF, 2, REG, T, VAL); \
50 READ_WB_REG_CASE(OFF, 3, REG, T, VAL); \
51 READ_WB_REG_CASE(OFF, 4, REG, T, VAL); \
56 GEN_WRITE_WB_REG_CASES(OFF,REG,T,VAL) global() argument
[all...]
/linux/tools/testing/selftests/cgroup/
H A Dtest_cpuset_prs.sh413 VAL=${1#*=}
415 if [[ $VAL -eq 0 ]]
424 echo $VAL > $CPUFILE
474 VAL=${CMD#?}
475 case $VAL in
476 0) VAL=member
478 1) VAL=root
480 2) VAL=isolated
483 echo "Invalid partition state - $VAL"
487 COMM="echo $VAL > $PFILE"
[all …]
/linux/include/uapi/linux/
H A Dbtf.h92 #define BTF_INT_ENCODING(VAL) (((VAL) & 0x0f000000) >> 24) argument
93 #define BTF_INT_OFFSET(VAL) (((VAL) & 0x00ff0000) >> 16) argument
94 #define BTF_INT_BITS(VAL) ((VAL) & 0x000000ff) argument
/linux/tools/include/uapi/linux/
H A Dbtf.h92 #define BTF_INT_ENCODING(VAL) (((VAL) & 0x0f000000) >> 24) argument
93 #define BTF_INT_OFFSET(VAL) (((VAL) & 0x00ff0000) >> 16) argument
94 #define BTF_INT_BITS(VAL) ((VAL) & 0x000000ff) argument
/linux/arch/loongarch/include/asm/
H A Dhw_breakpoint.h57 #define LOONGARCH_CSR_WATCH_READ(N, REG, T, VAL) \ argument
60 VAL = csr_read64(LOONGARCH_CSR_##IB##N##REG); \
62 VAL = csr_read64(LOONGARCH_CSR_##DB##N##REG); \
65 #define LOONGARCH_CSR_WATCH_WRITE(N, REG, T, VAL) \ argument
68 csr_write64(VAL, LOONGARCH_CSR_##IB##N##REG); \
70 csr_write64(VAL, LOONGARCH_CSR_##DB##N##REG); \
/linux/drivers/net/ethernet/qlogic/qlcnic/
H A Dqlcnic_hdr.h641 #define QLC_DEV_SET_REF_CNT(VAL, FN) ((VAL) |= (1 << (FN * 4))) argument
642 #define QLC_DEV_CLR_REF_CNT(VAL, FN) ((VAL) &= ~(1 << (FN * 4))) argument
643 #define QLC_DEV_SET_RST_RDY(VAL, FN) ((VAL) |= (1 << (FN * 4))) argument
644 #define QLC_DEV_SET_QSCNT_RDY(VAL, FN) ((VAL) |= (2 << (FN * 4))) argument
645 #define QLC_DEV_CLR_RST_QSCNT(VAL, FN) ((VAL) &= ~(3 << (FN * 4))) argument
647 #define QLC_DEV_GET_DRV(VAL, FN) (0xf & ((VAL) >> (FN * 4))) argument
648 #define QLC_DEV_SET_DRV(VAL, FN) ((VAL) << (FN * 4)) argument
678 #define ISR_LEGACY_INT_TRIGGERED(VAL) (((VAL) & 0x300) == 0x200) argument
/linux/arch/riscv/include/asm/
H A Dbarrier.h77 __unqual_scalar_typeof(*ptr) VAL; \
79 VAL = READ_ONCE(*__PTR); \
82 __cmpwait_relaxed(ptr, VAL); \
84 (typeof(*ptr))VAL; \
/linux/drivers/watchdog/
H A Dit87_wdt.c42 #define VAL 0x2f macro
134 outb(0x02, VAL); in superio_exit()
141 outb(ldn, VAL); in superio_select()
147 return inb(VAL); in superio_inb()
153 outb(val, VAL); in superio_outb()
161 val = inb(VAL) << 8; in superio_inw()
163 val |= inb(VAL); in superio_inw()
H A Dit8712f_wdt.c57 #define VAL 0x2f /* The value to read/write */ macro
95 return inb(VAL); in superio_inb()
101 outb(val, VAL); in superio_outb()
108 val = inb(VAL) << 8; in superio_inw()
110 val |= inb(VAL); in superio_inw()
117 outb(ldn, VAL); in superio_select()
138 outb(0x02, VAL); in superio_exit()
/linux/drivers/net/ethernet/qlogic/netxen/
H A Dnetxen_nic_hdr.h950 #define NETXEN_DIMM_MEMTYPE(VAL) ((VAL >> 3) & 0xf) argument
951 #define NETXEN_DIMM_NUMROWS(VAL) ((VAL >> 7) & 0xf) argument
952 #define NETXEN_DIMM_NUMCOLS(VAL) ((VAL >> 11) & 0xf) argument
953 #define NETXEN_DIMM_NUMRANKS(VAL) ((VAL >> 15) & 0x3) argument
954 #define NETXEN_DIMM_DATAWIDTH(VAL) ((VAL >> 18) & 0x3) argument
955 #define NETXEN_DIMM_NUMBANKS(VAL) ((VAL >> 21) & 0xf) argument
956 #define NETXEN_DIMM_TYPE(VAL) ((VAL >> 25) & 0x3f) argument
991 #define ISR_LEGACY_INT_TRIGGERED(VAL) (((VAL) & 0x300) == 0x200) argument
/linux/arch/arm/include/asm/
H A Dhw_breakpoint.h110 #define ARM_DBG_READ(N, M, OP2, VAL) do {\ argument
111 asm volatile("mrc p14, 0, %0, " #N "," #M ", " #OP2 : "=r" (VAL));\
114 #define ARM_DBG_WRITE(N, M, OP2, VAL) do {\ argument
115 asm volatile("mcr p14, 0, %0, " #N "," #M ", " #OP2 : : "r" (VAL));\
/linux/tools/testing/selftests/ntb/
H A Dntb_test.sh266 VAL=$RANDOM
267 write_file "$VAL" "$LOC/spad$i"
270 if [[ "$VAL" -ne "$RVAL" ]]; then
271 echo "Scratchpad $i value $RVAL doesn't match $VAL" >&2
300 VAL=$RANDOM
301 write_file "$VAL" "$LOC/msg$i"
304 if [[ "$VAL" -ne "${RVAL%%<-*}" ]]; then
305 echo "Message $i value $RVAL doesn't match $VAL" >&2
/linux/tools/testing/selftests/bpf/
H A Dbpf_experimental.h257 #define __bpf_assert(LHS, op, cons, RHS, VAL) \ argument
261 : : [lhs] "r"(LHS), [rhs] cons(RHS), [value] "ri"(VAL) : ); \
264 #define __bpf_assert_op_sign(LHS, op, cons, RHS, VAL, supp_sign) \ argument
268 __bpf_assert(LHS, "s" #op, cons, RHS, VAL); \
270 __bpf_assert(LHS, #op, cons, RHS, VAL); \
273 #define __bpf_assert_op(LHS, op, RHS, VAL, supp_sign) \ argument
277 __bpf_assert_op_sign(LHS, op, "r", rhs_var, VAL, supp_sign); \
279 __bpf_assert_op_sign(LHS, op, "i", RHS, VAL, supp_sign); \
/linux/drivers/gpio/
H A Dgpio-it87.c38 #define VAL 0x2f macro
95 outb(0x02, VAL); in superio_exit()
102 outb(ldn, VAL); in superio_select()
108 return inb(VAL); in superio_inb()
114 outb(val, VAL); in superio_outb()
122 val = inb(VAL) << 8; in superio_inw()
124 val |= inb(VAL); in superio_inw()
/linux/arch/arm64/include/asm/
H A Dhw_breakpoint.h98 #define AARCH64_DBG_READ(N, REG, VAL) do {\ argument
99 VAL = read_sysreg(dbg##REG##N##_el1);\
102 #define AARCH64_DBG_WRITE(N, REG, VAL) do {\ argument
103 write_sysreg(VAL, dbg##REG##N##_el1);\
/linux/kernel/locking/
H A Dqrwlock.c33 atomic_cond_read_acquire(&lock->cnts, !(VAL & _QW_LOCKED)); in queued_read_lock_slowpath()
51 atomic_cond_read_acquire(&lock->cnts, !(VAL & _QW_LOCKED)); in queued_read_lock_slowpath()
85 cnts = atomic_cond_read_relaxed(&lock->cnts, VAL == _QW_WAITING); in queued_write_lock_slowpath()
H A Dqspinlock.c336 (VAL != _Q_PENDING_VAL) || !cnt--); in queued_spin_lock_slowpath()
380 smp_cond_load_acquire(&lock->locked, !VAL); in queued_spin_lock_slowpath()
511 val = atomic_cond_read_acquire(&lock->val, !(VAL & _Q_LOCKED_PENDING_MASK)); in queued_spin_lock_slowpath()
551 next = smp_cond_load_relaxed(&node->next, (VAL)); in queued_spin_lock_slowpath()
/linux/drivers/staging/rtl8723bs/hal/
H A DHalPhyRf_8723B.c18 #define VAL 1 macro
970 …pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC94][VAL] = PHY_QueryBBReg(pDM_Odm->Adapter, rOFDM0_X… in _PHY_PathAFillIQKMatrix8723B()
974 …pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC80][VAL] = PHY_QueryBBReg(pDM_Odm->Adapter, rOFDM0_X… in _PHY_PathAFillIQKMatrix8723B()
978 …pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC4C][VAL] = PHY_QueryBBReg(pDM_Odm->Adapter, rOFDM0_E… in _PHY_PathAFillIQKMatrix8723B()
983 …pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xCA0][VAL] = 0xfffffff & PHY_QueryBBReg(pDM_Odm->Adapt… in _PHY_PathAFillIQKMatrix8723B()
986 pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xC14][VAL] = 0x40000100; in _PHY_PathAFillIQKMatrix8723B()
997 …pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xC14][VAL] = PHY_QueryBBReg(pDM_Odm->Adapter, rOFDM0_X… in _PHY_PathAFillIQKMatrix8723B()
1002 …pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xCA0][VAL] = PHY_QueryBBReg(pDM_Odm->Adapter, rOFDM0_R… in _PHY_PathAFillIQKMatrix8723B()
1048 …pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC94][VAL] = PHY_QueryBBReg(pDM_Odm->Adapter, rOFDM0_X… in _PHY_PathBFillIQKMatrix8723B()
1052 …pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC80][VAL] = PHY_QueryBBReg(pDM_Odm->Adapter, rOFDM0_X… in _PHY_PathBFillIQKMatrix8723B()
[all …]
/linux/tools/testing/selftests/sysctl/
H A Dsysctl.sh128 VAL=""
132 VAL="60"
135 VAL="1"
138 VAL="314"
141 VAL="(none)"
144 VAL=""
149 echo -n $VAL > $TARGET
/linux/include/asm-generic/
H A Dbarrier.h248 __unqual_scalar_typeof(*ptr) VAL; \
250 VAL = READ_ONCE(*__PTR); \
255 (typeof(*ptr))VAL; \
/linux/drivers/comedi/drivers/
H A Ds626.h447 #define S626_I2C_B2(ATTR, VAL) (((ATTR) << 6) | ((VAL) << 24)) argument
448 #define S626_I2C_B1(ATTR, VAL) (((ATTR) << 4) | ((VAL) << 16)) argument
449 #define S626_I2C_B0(ATTR, VAL) (((ATTR) << 2) | ((VAL) << 8)) argument
/linux/drivers/hwmon/
H A Dsmsc47b397.c42 #define VAL 0x2f /* The value to read/write */ macro
47 outb(val, VAL); in superio_outb()
53 return inb(VAL); in superio_inb()
/linux/include/linux/
H A Ddma-mapping.h626 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL)) argument
628 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL)) argument
633 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0) argument
635 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) argument

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