/illumos-gate/usr/src/uts/common/io/bnx/570x/driver/common/lmdev/ |
H A D | bnx_hw_misc.c | 332 REG_WR(pdev, pci.pci_grc_window_addr, pdev->hw_info.shmem_base & ~0x7fff); in lm_reg_rd_blk() 417 REG_WR(pdev, pci.pci_grc_window_addr, pdev->hw_info.shmem_base & ~0x7fff); in lm_reg_wr_blk() 476 pdev->hw_info.shmem_base + OFFSETOF(shmem_region_t, drv_fw_mb.fw_mb), in lm_submit_fw_cmd() 491 pdev->hw_info.shmem_base + in lm_submit_fw_cmd() 520 pdev->hw_info.shmem_base + in lm_last_fw_cmd_status()
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H A D | bnx_hw_reset.c | 87 pdev->hw_info.shmem_base + in fw_reset_sync() 100 pdev->hw_info.shmem_base + in fw_reset_sync() 118 pdev->hw_info.shmem_base + in fw_reset_sync() 500 pdev->hw_info.shmem_base + in lm_chip_reset() 522 pdev->hw_info.shmem_base + in lm_chip_reset() 534 pdev->hw_info.shmem_base + in lm_chip_reset() 688 (pdev->hw_info.shmem_base & ~0x7fff) | in lm_chip_reset() 693 (pdev->hw_info.shmem_base & ~0x7fff) + 0x6000 /*0x16e000 */); in lm_chip_reset() 721 REG_WR(pdev, pci.pci_grc_window_addr, pdev->hw_info.shmem_base & ~0x7fff); in lm_chip_reset() 766 pdev->hw_info.shmem_base + in lm_chip_reset() [all …]
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H A D | bnx_lm_main.c | 230 pdev->hw_info.shmem_base + in get_max_conns() 238 pdev->hw_info.shmem_base + in get_max_conns() 261 pdev->hw_info.shmem_base + in get_max_conns() 292 pdev->hw_info.shmem_base + in get_max_conns() 312 pdev->hw_info.shmem_base + in get_max_conns() 979 &pdev->hw_info.shmem_base); in lm_get_dev_info() 984 pdev->hw_info.shmem_base = HOST_VIEW_SHMEM_BASE; in lm_get_dev_info() 990 pdev->hw_info.shmem_base + in lm_get_dev_info() 1004 pdev->hw_info.shmem_base + in lm_get_dev_info() 1012 pdev->hw_info.shmem_base + in lm_get_dev_info() [all …]
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H A D | bnx_hw_phy.c | 871 pdev->hw_info.shmem_base + in init_5708_serdes() 1479 pdev->hw_info.shmem_base + in init_5709_serdes() 1629 pdev->hw_info.shmem_base + in init_5706_serdes() 2264 pdev->hw_info.shmem_base + in lm_init_remote_phy() 2270 pdev->hw_info.shmem_base + in lm_init_remote_phy() 2276 pdev->hw_info.shmem_base + in lm_init_remote_phy() 2290 pdev->hw_info.shmem_base + in lm_init_remote_phy() 2549 pdev->hw_info.shmem_base + in set_mac_flow_control() 3613 pdev->hw_info.shmem_base + in get_remote_phy_link() 3901 pdev->hw_info.shmem_base + in lm_init_mac_link()
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H A D | lm5706.h | 616 u32_t shmem_base; /* Firmware share memory base addr. */ member
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/illumos-gate/usr/src/uts/common/io/bnxe/577xx/common/ |
H A D | bnxe_clc.c | 396 link_status = REG_RD(cb, params->shmem_base + in elink_check_lfa() 2354 REG_WR(cb, params->shmem_base + in elink_update_mng() 3172 eee_mode = ((REG_RD(cb, params->shmem_base + in elink_eee_calc_timer() 3348 board_cfg = REG_RD(cb, params->shmem_base + in elink_bsc_module_sel() 3356 sfp_ctrl = REG_RD(cb, params->shmem_base + in elink_bsc_module_sel() 4113 if (REG_RD(cb, params->shmem_base + in elink_warpcore_enable_AN_KR() 4153 wc_lane_config = REG_RD(cb, params->shmem_base + in elink_warpcore_enable_AN_KR() 4304 cfg_tap_val = REG_RD(cb, params->shmem_base + in elink_warpcore_set_10G_XFI() 4619 u32 shmem_base, u8 port, in elink_get_mod_abs_int_cfg() argument 4626 cfg_pin = (REG_RD(cb, shmem_base + in elink_get_mod_abs_int_cfg() [all …]
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/illumos-gate/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/ |
H A D | clc.h | 397 u32 shmem_base; member 603 u8 elink_fan_failure_det_req(struct elink_dev *cb, u32 shmem_base, 700 u32 chip_id, u32 shmem_base, u32 shmem2_base, 718 u32 shmem_base,
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/illumos-gate/usr/src/uts/common/io/bnx/ |
H A D | bnx_mm.c | 223 offset = pdev->hw_info.shmem_base; in mm_get_user_config() 235 offset = pdev->hw_info.shmem_base; in mm_get_user_config() 243 offset = pdev->hw_info.shmem_base; in mm_get_user_config()
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H A D | bnxhwi.c | 386 offset = lmdevice->hw_info.shmem_base; in um_send_driver_pulse()
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H A D | bnxmod.c | 282 umdevice->lm_dev.hw_info.shmem_base + in bnx_attach_attach()
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/illumos-gate/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/ |
H A D | lm_phy.c | 1833 u32_t shmem_base[MAX_PATH_NUM], shmem_base2[MAX_PATH_NUM]; in lm_update_external_phy_fw_prepare() local 1834 shmem_base[0] = pdev->hw_info.shmem_base; in lm_update_external_phy_fw_prepare() 1839 LM_SHMEM2_READ(pdev, OFFSETOF(shmem2_region_t,other_shmem_base_addr), &shmem_base[1]); in lm_update_external_phy_fw_prepare() 1843 elink_common_init_phy(pdev, shmem_base, shmem_base2, CHIP_ID(pdev), 0); in lm_update_external_phy_fw_prepare() 1844 elink_pre_init_phy(pdev, shmem_base[0], shmem_base2[0], CHIP_ID(pdev), 0); in lm_update_external_phy_fw_prepare()
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H A D | lm_devinfo.c | 1772 pdev->hw_info.shmem_base = 0; in lm_shmem_set_default() 1994 …offset = pdev->hw_info.shmem_base + OFFSETOF(shmem_region_t, func_mb) + E1H_FUNC_MAX * sizeof(stru… in lm_get_shmem_mf_cfg_base() 2620 pdev->hw_info.shmem_base = val; in lm_get_shmem_info() 2626 pdev->hw_info.shmem_base, pdev->hw_info.shmem_base2, pdev->hw_info.mf_cfg_base); in lm_get_shmem_info() 2697 pdev->params.link.shmem_base = NO_MCP_WA_CLC_SHMEM; in init_link_params() 2702 pdev->params.link.shmem_base = pdev->hw_info.shmem_base; in init_link_params()
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H A D | lm_hw_init_reset.c | 4194 u32_t shmem_base[MAX_PATH_NUM] = {0}; in init_common_part() local 4284 shmem_base[0] = pdev->hw_info.shmem_base; in init_common_part() 4289 LM_SHMEM2_READ(pdev, OFFSETOF(shmem2_region_t,other_shmem_base_addr), &shmem_base[1]); in init_common_part() 4296 rc = elink_common_init_phy(pdev, shmem_base, shmem_base2, CHIP_ID(pdev), 0); in init_common_part() 4299 rc = elink_pre_init_phy(pdev, shmem_base[0], shmem_base2[0], CHIP_ID(pdev), port); in init_common_part() 4389 …elink_init_mod_abs_int(pdev, &pdev->vars.link, CHIP_ID(pdev), pdev->hw_info.shmem_base, pdev->hw_i… in init_port_part()
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H A D | lm_hw_access.c | 362 …is_required |= elink_fan_failure_det_req(pdev, pdev->hw_info.shmem_base, pdev->hw_info.shmem_base2… in lm_setup_fan_failure_detection()
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/illumos-gate/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/include/ |
H A D | lm5710.h | 1019 #define SHMEM_BASE(pdev) (pdev->hw_info.shmem_base) 1630 u32_t shmem_base; /* Firmware share memory base addr. */ member 4217 #define LM_SHMEM_READ(_pdev,_offset,_ret) LM_SHMEM_READ_IMP(_pdev,_offset,_ret, shmem_base ); 4224 #define LM_SHMEM_WRITE(_pdev,_offset,_val) LM_SHMEM_WRITE_IMP(_pdev,_offset,_val,shmem_base);
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