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Searched refs:reg_addr (Results 1 – 25 of 39) sorted by relevance

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/illumos-gate/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/
H A Dbnxe_fw_funcs.c48 u32_t reg_addr, reg_bit_map, vnic; in ecore_map_q_cos() local
69 reg_addr = ECORE_VOQ_Q_REG_ADDR(curr_cos, pf_q_num); in ecore_map_q_cos()
70 reg_bit_map = REG_RD(pdev, reg_addr); in ecore_map_q_cos()
71 REG_WR(pdev, reg_addr, reg_bit_map & (~q_bit_map)); in ecore_map_q_cos()
74 reg_addr = ECORE_VOQ_Q_REG_ADDR(new_cos, pf_q_num); in ecore_map_q_cos()
75 reg_bit_map = REG_RD(pdev, reg_addr); in ecore_map_q_cos()
76 REG_WR(pdev, reg_addr, reg_bit_map | q_bit_map); in ecore_map_q_cos()
81 reg_addr = ECORE_Q_CMDQ_REG_ADDR(pf_q_num); in ecore_map_q_cos()
82 reg_bit_map = REG_RD(pdev, reg_addr); in ecore_map_q_cos()
87 REG_WR(pdev, reg_addr, reg_bit_map); in ecore_map_q_cos()
/illumos-gate/usr/src/uts/sun4u/io/
H A Diocache.c185 volatile uint64_t *reg_addr; in sync_stream_buf() local
191 for (i = 0, reg_addr = softsp->str_buf_pg_tag_diag; in sync_stream_buf()
192 i < STREAM_CACHE_LINES; i++, reg_addr++) { in sync_stream_buf()
195 reg = *reg_addr; in sync_stream_buf()
204 (void *)reg_addr, hi, lo)); in sync_stream_buf()
H A Dpmubus.c598 addr = regp->reg_addr & ~MAPPING_SHARED_BITS_MASK; in pmubus_apply_range()
623 if (regp->reg_addr & MAPPING_SHARED_BITS_MASK) in pmubus_apply_range()
709 pmubus_rp.reg_addr = ((uint64_t) in pmubus_map()
744 if ((pmubus_rp.reg_addr + off) > in pmubus_map()
745 (pmubus_rp.reg_addr + pmubus_rp.reg_size)) { in pmubus_map()
750 pmubus_rp.reg_addr += off; in pmubus_map()
776 pmubus_mapreqp->mapreq_addr = pmubus_rp.reg_addr; in pmubus_map()
/illumos-gate/usr/src/uts/common/io/chxge/com/
H A Dcphy.h34 int reg_addr, unsigned int *val);
36 int reg_addr, unsigned int val);
91 int reg_addr, unsigned int *val);
93 int reg_addr, unsigned int val);
H A Dch_subr.c275 int reg_addr, unsigned int *val) in fpga_mdio_read() argument
287 V_MI0_PHY_REG_ADDR(reg_addr) | V_MI0_PHY_ADDR(phy_addr)); in fpga_mdio_read()
294 int reg_addr, unsigned int val) in fpga_mdio_write() argument
306 V_MI0_PHY_REG_ADDR(reg_addr) | V_MI0_PHY_ADDR(phy_addr)); in fpga_mdio_write()
358 int reg_addr, unsigned int *valp) in mi1_mdio_read() argument
360 u32 addr = V_MI1_REG_ADDR(reg_addr) | V_MI1_PHY_ADDR(phy_addr); in mi1_mdio_read()
376 int reg_addr, unsigned int val) in mi1_mdio_write() argument
378 u32 addr = V_MI1_REG_ADDR(reg_addr) | V_MI1_PHY_ADDR(phy_addr); in mi1_mdio_write()
405 int reg_addr, unsigned int *valp)
413 (void) __t1_tpi_write(adapter, A_ELMER0_PORT0_MI1_DATA, reg_addr);
[all …]
/illumos-gate/usr/src/uts/common/io/ixgbe/core/
H A Dixgbe_x550.h64 s32 ixgbe_write_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
66 s32 ixgbe_read_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
100 s32 ixgbe_read_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,
102 s32 ixgbe_write_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,
H A Dixgbe_phy.h166 s32 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
168 s32 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
170 s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
172 s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
H A Dixgbe_api.h71 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
73 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
215 s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
217 s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
H A Dixgbe_api.c575 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, in ixgbe_read_phy_reg() argument
581 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr, in ixgbe_read_phy_reg()
594 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, in ixgbe_write_phy_reg() argument
600 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr, in ixgbe_write_phy_reg()
1321 s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_read_iosf_sb_reg() argument
1324 return ixgbe_call_func(hw, hw->mac.ops.read_iosf_sb_reg, (hw, reg_addr, in ixgbe_read_iosf_sb_reg()
1337 s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_write_iosf_sb_reg() argument
1340 return ixgbe_call_func(hw, hw->mac.ops.write_iosf_sb_reg, (hw, reg_addr, in ixgbe_write_iosf_sb_reg()
H A Dixgbe_phy.c597 s32 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, in ixgbe_read_phy_reg_mdi() argument
603 command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) | in ixgbe_read_phy_reg_mdi()
634 command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) | in ixgbe_read_phy_reg_mdi()
679 s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_read_phy_reg_generic() argument
690 status = hw->phy.ops.read_reg_mdi(hw, reg_addr, device_type, phy_data); in ixgbe_read_phy_reg_generic()
705 s32 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_write_phy_reg_mdi() argument
714 command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) | in ixgbe_write_phy_reg_mdi()
743 command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) | in ixgbe_write_phy_reg_mdi()
779 s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_write_phy_reg_generic() argument
788 status = hw->phy.ops.write_reg_mdi(hw, reg_addr, device_type, in ixgbe_write_phy_reg_generic()
H A Dixgbe_x550.c520 static s32 ixgbe_read_phy_reg_x550em(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_read_phy_reg_x550em() argument
523 UNREFERENCED_4PARAMETER(*hw, reg_addr, device_type, *phy_data); in ixgbe_read_phy_reg_x550em()
527 static s32 ixgbe_write_phy_reg_x550em(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_write_phy_reg_x550em() argument
530 UNREFERENCED_4PARAMETER(*hw, reg_addr, device_type, phy_data); in ixgbe_write_phy_reg_x550em()
1130 s32 ixgbe_write_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_write_iosf_sb_reg_x550() argument
1145 command = ((reg_addr << IXGBE_SB_IOSF_CTRL_ADDR_SHIFT) | in ixgbe_write_iosf_sb_reg_x550()
1176 s32 ixgbe_read_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_read_iosf_sb_reg_x550() argument
1191 command = ((reg_addr << IXGBE_SB_IOSF_CTRL_ADDR_SHIFT) | in ixgbe_read_iosf_sb_reg_x550()
4318 s32 ixgbe_read_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_read_phy_reg_x550a() argument
4329 status = hw->phy.ops.read_reg_mdi(hw, reg_addr, device_type, phy_data); in ixgbe_read_phy_reg_x550a()
[all …]
/illumos-gate/usr/src/uts/common/io/cxgbe/common/
H A Dt4_regs.h20 #define MYPF_REG(reg_addr) (MYPF_BASE + (reg_addr)) argument
23 #define PF0_REG(reg_addr) (PF0_BASE + (reg_addr)) argument
26 #define PF1_REG(reg_addr) (PF1_BASE + (reg_addr)) argument
29 #define PF2_REG(reg_addr) (PF2_BASE + (reg_addr)) argument
32 #define PF3_REG(reg_addr) (PF3_BASE + (reg_addr)) argument
35 #define PF4_REG(reg_addr) (PF4_BASE + (reg_addr)) argument
38 #define PF5_REG(reg_addr) (PF5_BASE + (reg_addr)) argument
41 #define PF6_REG(reg_addr) (PF6_BASE + (reg_addr)) argument
44 #define PF7_REG(reg_addr) (PF7_BASE + (reg_addr)) argument
51 #define VF_SGE_REG(reg_addr) (VF_SGE_BASE + (reg_addr)) argument
[all …]
/illumos-gate/usr/src/grub/grub-0.97/netboot/
H A De1000.c110 static int e1000_read_phy_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t *phy_data);
111 static int e1000_read_phy_reg_ex(struct e1000_hw *hw, uint32_t reg_addr, uint16_t *phy_data);
112 static int e1000_write_phy_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t phy_data);
113 static int e1000_write_phy_reg_ex(struct e1000_hw *hw, uint32_t reg_addr, uint16_t phy_data);
2814 uint32_t reg_addr, argument
2822 (reg_addr > MAX_PHY_MULTI_PAGE_REG)) {
2824 (uint16_t)reg_addr)))
2828 ret_val = e1000_read_phy_reg_ex(hw, IGP01E1000_PHY_PAGE_SELECT & reg_addr,
2836 uint32_t reg_addr, argument
2845 if(reg_addr > MAX_PHY_REG_ADDRESS) {
[all …]
/illumos-gate/usr/src/uts/common/io/i40e/core/
H A Di40e_prototype.h126 u32 reg_addr, u64 reg_val,
129 u32 reg_addr, u64 *reg_val,
569 u32 reg_addr, u32 *reg_val,
571 u32 i40e_read_rx_ctl(struct i40e_hw *hw, u32 reg_addr);
573 u32 reg_addr, u32 reg_val,
575 void i40e_write_rx_ctl(struct i40e_hw *hw, u32 reg_addr, u32 reg_val);
580 u32 reg_addr, u32 reg_val,
586 u32 reg_addr, u32 *reg_val,
H A Di40e_common.c3421 u32 reg_addr, u64 *reg_val, in i40e_aq_debug_read_register() argument
3434 cmd_resp->address = CPU_TO_LE32(reg_addr); in i40e_aq_debug_read_register()
3456 u32 reg_addr, u64 reg_val, in i40e_aq_debug_write_register() argument
3466 cmd->address = CPU_TO_LE32(reg_addr); in i40e_aq_debug_write_register()
7159 u32 reg_addr, u32 *reg_val, in i40e_aq_rx_ctl_read_register() argument
7172 cmd_resp->address = CPU_TO_LE32(reg_addr); in i40e_aq_rx_ctl_read_register()
7187 u32 i40e_read_rx_ctl(struct i40e_hw *hw, u32 reg_addr) in i40e_read_rx_ctl() argument
7199 status = i40e_aq_rx_ctl_read_register(hw, reg_addr, &val, NULL); in i40e_read_rx_ctl()
7209 val = rd32(hw, reg_addr); in i40e_read_rx_ctl()
7225 u32 reg_addr, u32 reg_val, in i40e_aq_rx_ctl_write_register() argument
[all …]
/illumos-gate/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/
H A Dhw_dump.h242 struct reg_addr { struct
264 static const struct reg_addr reg_addrs[] = { argument
1340 static const struct reg_addr idle_addrs[] = {
1612 static const struct reg_addr split_reg_addrs[] = {
8179 static const struct reg_addr page_read_regs_e1[] = {
8194 static const struct reg_addr page_read_regs_e1h[] = {
8210 static const struct reg_addr page_read_regs_e2[] = {
8225 static const struct reg_addr page_read_regs_e3[] = {
H A Dclc.h24 extern u32 elink_cb_reg_read(struct elink_dev *cb, u32 reg_addr);
25 extern void elink_cb_reg_write(struct elink_dev *cb, u32 reg_addr, u32 val);
/illumos-gate/usr/src/lib/udapl/libdat/include/dat/
H A Dudat_redirection.h57 lmr, lmr_context, rmr_context, reg_len, reg_addr) \ argument
69 (reg_addr))
/illumos-gate/usr/src/uts/sun4u/sys/
H A Dpmubus.h47 uint64_t reg_addr; member
/illumos-gate/usr/src/uts/common/io/audio/drv/audiots/
H A Daudiots.c1151 uint16_t *reg_addr = &state->ts_regs->aud_regs.ap_acrdwr_reg; in audiots_set_ac97() local
1170 if (!(ddi_get16(handle, reg_addr) & in audiots_set_ac97()
1173 ddi_put16(handle, reg_addr, reg); in audiots_set_ac97()
1187 if (!(ddi_get16(handle, reg_addr) & in audiots_set_ac97()
/illumos-gate/usr/src/uts/common/io/qede/579xx/drivers/ecore/
H A Decore_hw.c323 u32 OSAL_IOMEM *reg_addr; in ecore_memcpy_hw() local
338 reg_addr = (u32 OSAL_IOMEM *)OSAL_REG_ADDR(p_hwfn, hw_offset); in ecore_memcpy_hw()
342 DIRECT_REG_WR(p_hwfn, reg_addr++, *host_addr++); in ecore_memcpy_hw()
346 reg_addr++); in ecore_memcpy_hw()
/illumos-gate/usr/src/cmd/bhyve/common/
H A Dpci_e82545.c407 e82545_write_mdi(struct e82545_softc *sc __unused, uint8_t reg_addr, in e82545_write_mdi() argument
410 DPRINTF("Write mdi reg:0x%x phy:0x%x data: 0x%x", reg_addr, phy_addr, data); in e82545_write_mdi()
414 e82545_read_mdi(struct e82545_softc *sc __unused, uint8_t reg_addr, in e82545_read_mdi() argument
418 switch (reg_addr) { in e82545_read_mdi()
434 DPRINTF("Unknown mdi read reg:0x%x phy:0x%x", reg_addr, phy_addr); in e82545_read_mdi()
1833 uint8_t reg_addr = (uint8_t)((value & E1000_MDIC_REG_MASK) >> in e82545_write_register() local
1846 sc->mdi_control |= e82545_read_mdi(sc, reg_addr, phy_addr); in e82545_write_register()
1849 e82545_write_mdi(sc, reg_addr, phy_addr, in e82545_write_register()
/illumos-gate/usr/src/uts/common/io/qede/579xx/hsi/mcp/
H A Dnvm_map.h286 u32 reg_addr; member
/illumos-gate/usr/src/uts/sun4u/io/i2c/nexus/
H A Dsmbus.c737 uint8_t *reg_addr = smbus->smbus_regaddr; in smbus_put() local
741 ddi_put8(hp, &reg_addr[reg], data); in smbus_put()
744 &reg_addr[reg], data)); in smbus_put()
/illumos-gate/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/
H A Dlm_phy.c75 u32 elink_cb_reg_read(struct elink_dev *cb, u32 reg_addr ) in elink_cb_reg_read() argument
77 return REG_RD(cb, reg_addr); in elink_cb_reg_read()
80 void elink_cb_reg_write(struct elink_dev *cb, u32 reg_addr, u32 val ) in elink_cb_reg_write() argument
82 REG_WR(cb, reg_addr, val); in elink_cb_reg_write()

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