Home
last modified time | relevance | path

Searched refs:readl (Results 1 – 12 of 12) sorted by relevance

/illumos-gate/usr/src/grub/grub-0.97/netboot/
H A Dns83820.c423 cfg = readl(ns->base + CFG) ^ SPDSTS_POLARITY; in phy_intr()
426 tbisr = readl(ns->base + TBISR); in phy_intr()
427 tanar = readl(ns->base + TANAR); in phy_intr()
428 tanlpar = readl(ns->base + TANLPAR); in phy_intr()
436 writel(readl(ns->base + TXCFG) in phy_intr()
439 writel(readl(ns->base + RXCFG) | RXCFG_RX_FD, in phy_intr()
442 writel(readl(ns->base + GPIOR) | GPIOR_GP1_OUT, in phy_intr()
453 writel((readl(ns->base + TXCFG) in phy_intr()
456 writel(readl(ns->base + RXCFG) & ~RXCFG_RX_FD, in phy_intr()
459 writel(readl(ns->base + GPIOR) & ~GPIOR_GP1_OUT, in phy_intr()
[all …]
H A Dforcedeth.c346 readl(base); in pci_push()
362 } while ((readl(base + offset) & mask) != target); in reg_delay()
402 reg = readl(base + NvRegAdapterControl); in mii_rw()
408 reg = readl(base + NvRegMIIControl); in mii_rw()
432 } else if (readl(base + NvRegMIIStatus) & NVREG_MIISTAT_ERROR) { in mii_rw()
439 retval = readl(base + NvRegMIIData); in mii_rw()
444 reg = readl(base + NvRegAdapterControl); in mii_rw()
457 if (readl(base + NvRegReceiverControl) & NVREG_RCVCTL_START) { in start_rx()
719 writel(readl(base + NvRegTransmitterStatus), in forcedeth_reset()
724 writel(readl(base + NvRegReceiverStatus), in forcedeth_reset()
[all …]
H A Dw89c840.c155 #undef readl
161 #define readl inl macro
387 u32 intr_status = readl(ioaddr + IntrStatus); in w89c840_poll()
719 #define eeprom_delay(ee_addr) readl(ee_addr)
752 retval = (retval << 1) | ((readl(ee_addr) & EE_DataIn) ? 1 : 0); in eeprom_read()
769 #define mdio_delay(mdio_addr) readl(mdio_addr)
816 retval = (retval << 1) | ((readl(mdio_addr) & MDIO_DataIn) ? 1 : 0); in mdio_read()
H A Dio.h85 #define readl(addr) (*(volatile unsigned int *) (addr)) macro
H A De1000.c155 readl((a)->hw_addr + E1000_##reg) : \
156 readl((a)->hw_addr + E1000_82542_##reg))
165 readl((a)->hw_addr + E1000_##reg + ((offset) << 2)) : \
166 readl((a)->hw_addr + E1000_82542_##reg + ((offset) << 2)))
H A Dr8169.c126 #define RTL_R32(reg) ((unsigned long) readl (ioaddr + (reg)))
H A Dtg3.c108 #define tr32(reg) readl(tg3.regs + (reg))
/illumos-gate/usr/src/tools/smatch/src/
H A Dcheck_readl_infinite_loops.c23 STATE(readl);
54 if (get_state_expr(my_id, expr) == &readl) in is_readl()
62 set_state_expr(my_id, expr->left, &readl); in match_assign()
/illumos-gate/usr/src/tools/smatch/src/smatch_data/
H A Dkernel.common_functions23 readl
/illumos-gate/usr/src/boot/sys/i386/include/
H A Dcpufunc.h49 #define readl(va) (*(volatile uint32_t *) (va)) macro
/illumos-gate/usr/src/boot/sys/amd64/include/
H A Dcpufunc.h50 #define readl(va) (*(volatile uint32_t *) (va)) macro
/illumos-gate/usr/src/lib/libbsm/
H A Daudit_event.txt247 206:AUE_READL:readl(2):no