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Searched refs:pci_phys_low (Results 1 – 25 of 38) sorted by relevance

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/illumos-gate/usr/src/uts/intel/io/pciex/
H A Dpcie_nvidia.c215 assigned[0].pci_phys_low = regs[0].pci_phys_low = in add_nvidia_isa_bridge_props()
224 assigned[1].pci_phys_low = regs[1].pci_phys_low = in add_nvidia_isa_bridge_props()
/illumos-gate/usr/src/uts/sun4/io/px/
H A Dpx_util.c150 rp->pci_phys_hi, rp->pci_phys_mid, rp->pci_phys_low, in px_reloc_reg()
186 rp->pci_phys_low += assign_p->pci_phys_low; in px_reloc_reg()
193 rp->pci_phys_low += assign_p->pci_phys_low; in px_reloc_reg()
200 rp->pci_phys_hi, rp->pci_phys_mid, rp->pci_phys_low, in px_reloc_reg()
219 reg_begin = (uint64_t)px_rp->pci_phys_mid << 32 | px_rp->pci_phys_low; in px_xlate_reg()
H A Dpx_tools.c474 dev_regspec.pci_phys_low = offset & PCI_REG_REG_M; in pxtool_get_phys_addr()
478 dev_regspec.pci_phys_low = offset & 0xffffffff; in pxtool_get_phys_addr()
/illumos-gate/usr/src/uts/sun4u/io/pci/
H A Dpci_util.c164 rp->pci_phys_hi, rp->pci_phys_mid, rp->pci_phys_low, in pci_reloc_reg()
190 rp->pci_phys_low += assign_p->pci_phys_low; in pci_reloc_reg()
195 rp->pci_phys_low += assign_p->pci_phys_low; in pci_reloc_reg()
202 rp->pci_phys_hi, rp->pci_phys_mid, rp->pci_phys_low, in pci_reloc_reg()
218 uint32_t reg_end, reg_begin = pci_rp->pci_phys_low; in pci_xlate_reg()
/illumos-gate/usr/src/uts/common/io/
H A Dbusra.c1049 (uint64_t)regs[i].pci_phys_low, in pci_resource_setup()
1059 ((uint64_t)(regs[i].pci_phys_low)), in pci_resource_setup()
1069 (uint64_t)regs[i].pci_phys_low, in pci_resource_setup()
1238 (void) ndi_ra_free(dip, (uint64_t)avail_p->pci_phys_low, in pci_resource_setup_avail()
1246 (void) ndi_ra_free(dip, (uint64_t)avail_p->pci_phys_low, in pci_resource_setup_avail()
1368 ((uint64_t)(regs[i].pci_phys_low)); in pci_get_available_prop()
1397 newregs[j].pci_phys_low = in pci_get_available_prop()
1409 newregs[j].pci_phys_low = in pci_get_available_prop()
1530 ((uint64_t)(regs[i].pci_phys_low)); in pci_put_available_prop()
1611 newregs[j].pci_phys_low = (uint32_t)(base); in pci_put_available_prop()
[all …]
/illumos-gate/usr/src/uts/sun4/io/efcode/
H A Dfcpci.c565 p.pci_phys_low = fc_cell2uint(fc_arg(cp, 3)); in pfc_map_in()
851 p.pci_phys_mid = p.pci_phys_low = 0; in pfc_config_fetch()
983 p.pci_phys_mid = p.pci_phys_low = 0; in pfc_config_store()
1350 config.pci_phys_mid = config.pci_phys_low = 0; in pci_alloc_resource()
1409 phys_spec.pci_phys_low = LOADDR(answer); in pci_alloc_resource()
1425 phys_spec.pci_phys_low, in pci_alloc_resource()
1455 phys_spec.pci_phys_low = LOADDR(answer); in pci_alloc_resource()
1476 phys_spec.pci_phys_low; in pci_alloc_resource()
1502 phys_spec.pci_phys_low = LOADDR(answer); in pci_alloc_resource()
1515 phys_spec.pci_phys_low; in pci_alloc_resource()
[all …]
/illumos-gate/usr/src/uts/sun4u/opl/io/pcicmu/
H A Dpcmu_util.c150 rp->pci_phys_hi, rp->pci_phys_mid, rp->pci_phys_low, in pcmu_reloc_reg()
172 rp->pci_phys_low += assign_p->pci_phys_low; in pcmu_reloc_reg()
179 rp->pci_phys_hi, rp->pci_phys_mid, rp->pci_phys_low, in pcmu_reloc_reg()
195 uint32_t reg_end, reg_begin = pcmu_rp->pci_phys_low; in pcmu_xlate_reg()
/illumos-gate/usr/src/uts/intel/io/hotplug/pcicfg/
H A Dpcicfg.c1463 space_type, assigned[i].pci_phys_low, assigned[i].pci_size_low); in pcicfg_get_ntbridge_child_range()
1466 *boundbase = assigned[i].pci_phys_low; in pcicfg_get_ntbridge_child_range()
1938 reg[i].pci_phys_low = PCICFG_LOADDR(mem_answer); in pcicfg_bridge_assign()
1960 reg[i].pci_phys_low = (uint32_t)mem_answer; in pcicfg_bridge_assign()
1974 reg[i].pci_phys_low = io_answer; in pcicfg_bridge_assign()
2106 reg[i].pci_phys_low = PCICFG_LOADDR(answer); in pcicfg_device_assign()
2141 reg[i].pci_phys_low = PCICFG_LOADDR(answer); in pcicfg_device_assign()
2168 reg[i].pci_phys_low = PCICFG_LOADDR(answer); in pcicfg_device_assign()
2267 assigned[i].pci_phys_low, in pcicfg_device_assign_readonly()
2287 assigned[i].pci_phys_low; in pcicfg_device_assign_readonly()
[all …]
/illumos-gate/usr/src/uts/sun4/io/
H A Dpcicfg.c1530 space_type, assigned[i].pci_phys_low, assigned[i].pci_size_low); in pcicfg_get_ntbridge_child_range()
1533 *boundbase = assigned[i].pci_phys_low; in pcicfg_get_ntbridge_child_range()
1997 reg[i].pci_phys_low = PCICFG_HIADDR(mem_answer); in pcicfg_bridge_assign()
2015 reg[i].pci_phys_low = (uint32_t)mem_answer; in pcicfg_bridge_assign()
2029 reg[i].pci_phys_low = io_answer; in pcicfg_bridge_assign()
2155 reg[i].pci_phys_low = PCICFG_LOADDR(answer); in pcicfg_device_assign()
2184 reg[i].pci_phys_low = PCICFG_LOADDR(answer); in pcicfg_device_assign()
2206 reg[i].pci_phys_low = PCICFG_LOADDR(answer); in pcicfg_device_assign()
2300 assigned[i].pci_phys_low, in pcicfg_device_assign_readonly()
2316 assigned[i].pci_phys_low; in pcicfg_device_assign_readonly()
[all …]
H A Debus.c951 rp->pci_regspec.pci_phys_low, in ebus_vreg_dump()
/illumos-gate/usr/src/uts/intel/io/pci/
H A Dpci_boot.c2572 regs->pci_phys_low = base & PCI_BASE_IO_ADDR_M; in add_bar_reg_props()
2575 regs->pci_phys_low = 0; in add_bar_reg_props()
2652 assigned->pci_phys_low = base; in add_bar_reg_props()
2864 assigned->pci_phys_low = base; in add_bar_reg_props()
2871 assigned->pci_phys_low, in add_bar_reg_props()
2985 assigned[nasgn].pci_phys_low = base; in add_reg_props()
3008 regs[nreg].pci_phys_low = assigned[nasgn].pci_phys_low = 0x3b0; in add_reg_props()
3018 regs[nreg].pci_phys_low = assigned[nasgn].pci_phys_low = 0x3c0; in add_reg_props()
3028 regs[nreg].pci_phys_low = in add_reg_props()
3029 assigned[nasgn].pci_phys_low = 0xa0000; in add_reg_props()
[all …]
/illumos-gate/usr/src/uts/i86pc/io/pciex/
H A Dnpe.c620 (uint64_t)pci_rp->pci_phys_low; in npe_bus_map()
712 pci_rp->pci_phys_low = (uint32_t)addr; in npe_bus_map()
716 pci_rp->pci_phys_low += ((cfp->c_busnum << 20) | in npe_bus_map()
761 (uint64_t)pci_rp->pci_phys_low; in npe_bus_map()
/illumos-gate/usr/src/uts/intel/io/intel_nhm/
H A Dnhm_pci_cfg.c53 reg.pci_phys_low = 0; in nhm_pci_cfg_setup()
/illumos-gate/usr/src/uts/sun4u/sys/
H A Dsbbcvar.h73 uint32_t pci_phys_low; /* Parent low rng addr */ member
/illumos-gate/usr/src/uts/intel/io/intel_nb5000/
H A Dnb_pci_cfg.c54 reg.pci_phys_low = 0; in nb_pci_cfg_setup()
/illumos-gate/usr/src/uts/common/io/cardbus/
H A Dcardbus_cfg.c911 reg[i].pci_phys_low = PCICFG_HIADDR(mem_answer); in cardbus_bridge_assign()
925 reg[i].pci_phys_low = (uint32_t)mem_answer; in cardbus_bridge_assign()
960 reg[i].pci_phys_low = io_answer; in cardbus_bridge_assign()
1047 reg[i].pci_phys_low = io_answer; in cardbus_isa_bridge_ranges()
1052 range.par_phys_low = reg[i].pci_phys_low; in cardbus_isa_bridge_ranges()
2278 assigned[i].pci_phys_low, in cardbus_free_device_resources()
2289 assigned[i].pci_phys_low, in cardbus_free_device_resources()
2299 assigned[i].pci_phys_low, in cardbus_free_device_resources()
3386 addition.pci_phys_low = (uint32_t)(base & 0xffffffff);
3555 addition.pci_phys_low = 0;
/illumos-gate/usr/src/uts/common/os/
H A Dpcifm.c1263 (uint64_t)drv_regp[rn].pci_phys_low + in pci_check_regs()
1266 (uint64_t)drv_regp[rn].pci_phys_low + in pci_check_regs()
1288 (uint64_t)drv_regp[rn].pci_phys_low + in pci_check_regs()
1291 (uint64_t)drv_regp[rn].pci_phys_low + in pci_check_regs()
/illumos-gate/usr/src/uts/i86pc/io/pci/
H A Dpci.c440 (uint64_t)pci_rp->pci_phys_low; in pci_bus_map()
514 (uint64_t)pci_rp->pci_phys_low; in pci_bus_map()
H A Dpci_common.c1041 assigned_addr[i].pci_phys_low == 0) { in pci_common_get_reg_prop()
1048 pci_rp->pci_phys_low = assigned_addr[i].pci_phys_low; in pci_common_get_reg_prop()
/illumos-gate/usr/src/uts/i86pc/io/gfx_private/
H A Dgfxp_vgatext.c1246 if (reg[index].pci_phys_low > addr) in vgatext_get_pci_reg_index()
1248 if (reg[index].pci_phys_low + reg[index].pci_size_low <= addr) in vgatext_get_pci_reg_index()
1251 *offset = addr - reg[index].pci_phys_low; in vgatext_get_pci_reg_index()
/illumos-gate/usr/src/uts/sparc/io/pciex/
H A Dpcieb_sparc.c411 reg_spec[rnum].pci_phys_low = 0; in plx_ro_disable()
/illumos-gate/usr/src/uts/sun4u/io/
H A Dsbbc.c922 rp->pci_phys_low = in sbbc_apply_range()
923 rangep->pci_phys_low + addr_offset; in sbbc_apply_range()
H A Dpmubus.c616 pci_regp->pci_phys_low = rangep->rng_parent_low + offset; in pmubus_apply_range()
/illumos-gate/usr/src/uts/i86pc/io/
H A Disa.c450 pci_reg_p->pci_phys_low = rng_p->parent_low + offset; in isa_apply_range()
485 pci_reg_p->pci_phys_low = isa_reg_p->regspec_addr; in isa_apply_range()
/illumos-gate/usr/src/uts/common/sys/
H A Dpci.h1169 uint_t pci_phys_low; /* child's address, low word */ member

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