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/illumos-gate/usr/src/uts/sun4u/ml/
H A Dmach_interrupt.S117 TRACE_PTR(%g4, %g6)
118 GET_TRACE_TICK(%g6, %g3)
119 stxa %g6, [%g4 + TRAP_ENT_TICK]%asi
120 rdpr %tl, %g6
121 stha %g6, [%g4 + TRAP_ENT_TL]%asi
122 rdpr %tt, %g6
123 stha %g6, [%g4 + TRAP_ENT_TT]%asi
124 rdpr %tpc, %g6
125 stna %g6, [%g4 + TRAP_ENT_TPC]%asi
126 rdpr %tstate, %g6
[all …]
H A Dmach_xc.S63 TRACE_PTR(%g4, %g6)
64 GET_TRACE_TICK(%g6, %g3)
65 stxa %g6, [%g4 + TRAP_ENT_TICK]%asi
66 rdpr %tl, %g6
67 stha %g6, [%g4 + TRAP_ENT_TL]%asi
68 rdpr %tt, %g6
69 stha %g6, [%g4 + TRAP_ENT_TT]%asi
71 rdpr %tpc, %g6
72 stna %g6, [%g4 + TRAP_ENT_TPC]%asi
73 rdpr %tstate, %g6
[all …]
H A Dwbuf.S59 ! g5 = mmu trap type, g6 = tag access reg (g5 != T_ALIGNMENT) or
74 mov %g6, %g2 ! arg2 = tagaccess
155 FAULT_WINTRACE(%g5, %g6, %g7, TT_F32_SO1)
156 CPU_ADDR(%g5, %g6)
160 ldn [%g5 + CPU_MPCB], %g6
161 ld [%g6 + MPCB_WBCNT], %g5
163 st %g7, [%g6 + MPCB_WBCNT]
168 add %g6, %g7, %g7
171 ldn [%g6 + MPCB_WBUF], %g5
193 ! g5 = mmu trap type, g6 = tag access reg (g5 != T_ALIGNMENT) or
[all …]
H A Dtrap_table.S1023 ldxa [%g5]ASI_DMMU, %g6 /* g6 = primary ctx */ ;\
1024 and %g6, %g4, %g6 /* &= CTXREG_CTX_MASK */ ;\
1025 cmp %g3, %g6 ;\
1029 ldxa [%g5]ASI_DMMU, %g6 /* g6 = secondary ctx */ ;\
1030 and %g6, %g4, %g6 /* &= CTXREG_CTX_MASK */ ;\
1031 cmp %g3, %g6 ;\
1062 mov MMU_TAG_ACCESS, %g6 /* select tag acc */ ;\
1064 ldxa [%g6]ASI_DMMU, %g2 /* g2 = tag access */ ;\
1069 srax %g2, PREDISM_BASESHIFT, %g6 /* g6 > 0 ISM predicted */ ;\
1070 brgz,pn %g6, sfmmu_udtlb_slowpath_ismpred ;\
[all …]
/illumos-gate/usr/src/uts/sfmmu/ml/
H A Dsfmmu_asm.S619 SFMMU_MMUID_GNUM_CNUM(%g2, %g5, %g6, %g4)
621 cmp %g6, INVALID_CONTEXT ! hat cnum == INVALID ??
628 mov %g6, %o1
645 mov %g6, %o1
670 SFMMU_MMUID_GNUM_CNUM(%g2, %g5, %g6, %g4)
672 cmp %g6, INVALID_CONTEXT ! hat cnum == INVALID ??
679 mov %g6, %o1
689 mov %g6, %o1
1579 GET_MMU_BOTH_TAGACC(%g5 /*dtag*/, %g2 /*itag*/, %g6, %g4)
1580 rdpr %tt, %g6
[all …]
H A Dsfmmu_kdi.S121 srlx %g1, %g5, %g6; \
123 sllx %g6, %g5, %g5; \
127 sllx %g3, HTAG_REHASH_SHIFT, %g6; \
128 or %g6, SFMMU_INVALID_SHMERID, %g6; \
129 or %g5, %g6, %g5
168 ldxa [%g4]ASI_MEM, %g6; \
170 cmp %g5, %g6; \
176 ldxa [%g4]ASI_MEM, %g6; \
178 cmp %g6, %g2; \
/illumos-gate/usr/src/uts/sun4v/ml/
H A Dtrap_table.S1038 sethi %hi(FLUSH_ADDR), %g6 ;\
1039 flush %g6 ;\
1040 TRACE_PTR(%g3, %g6) ;\
1041 GET_TRACE_TICK(%g6, %g4) ;\
1042 stxa %g6, [%g3 + TRAP_ENT_TICK]%asi ;\
1045 rdpr %tnpc, %g6 ;\
1046 stna %g6, [%g3 + TRAP_ENT_F2]%asi ;\
1049 rdpr %tpc, %g6 ;\
1050 stna %g6, [%g3 + TRAP_ENT_TPC]%asi ;\
1051 TRACE_SAVE_TL_GL_REGS(%g3, %g6) ;\
[all …]
H A Dmach_xc.S65 TRACE_PTR(%g4, %g6)
66 GET_TRACE_TICK(%g6, %g3)
67 stxa %g6, [%g4 + TRAP_ENT_TICK]%asi
68 rdpr %tl, %g6
69 stha %g6, [%g4 + TRAP_ENT_TL]%asi
70 rdpr %tt, %g6
71 stha %g6, [%g4 + TRAP_ENT_TT]%asi
73 rdpr %tpc, %g6
74 stna %g6, [%g4 + TRAP_ENT_TPC]%asi
75 rdpr %tstate, %g6
[all …]
H A Dwbuf.S60 ! g5 = mmu trap type, g6 = tag access reg (g5 != T_ALIGNMENT) or
75 mov %g6, %g2 ! arg2 = tagaccess
157 FAULT_WINTRACE(%g5, %g6, %g7, TT_F32_SO1)
158 CPU_PADDR(%g5, %g6)
163 ldxa [%g5 + CPU_MPCB_PA]%asi, %g6
164 lda [%g6 + MPCB_WBCNT]%asi, %g5
166 sta %g7, [%g6 + MPCB_WBCNT]%asi
171 add %g6, %g7, %g7
174 ldxa [%g6 + MPCB_WBUF_PA]%asi, %g5
196 ! g5 = mmu trap type, g6 = tag access reg (g5 != T_ALIGNMENT) or
[all …]
H A Dmach_interrupt.S58 ! %g6 head ptr
61 ldxa [%g3]ASI_QUEUE, %g6 ! %g6 = head ptr
64 cmp %g6, %g7
438 mov %g6, %g2
474 mov %g2, %g6 ! save head in %g2
480 add %g6, %g4, %g4 ! %g4 = PA of ER in Q
518 add %g6, Q_ENTRY_SIZE, %g6 ! increment q head to next
519 and %g6, %g5, %g6 ! size mask for warp around
520 cmp %g6, %g3 ! head == tail ??
530 stxa %g6, [%g4]ASI_QUEUE ! update head offset
H A Dmach_subr_asm.S86 mov %o5, %g6
119 mov %g6, %o5
/illumos-gate/usr/src/uts/sun4u/cpu/
H A Dus3_cheetahplus_asm.S177 DO_TL1_CPU_LOGOUT(%g3, %g2, %g4, %g5, %g6, %g3, %g4)
206 GET_CPU_IMPL(%g6)
207 cmp %g6, PANTHER_IMPL
212 mov %g6, %g3
234 CH_DCACHE_FLUSHALL(%g4, %g5, %g6)
257 GET_CPU_IMPL(%g6)
261 cmp %g6, PANTHER_IMPL
264 CH_ICACHE_FLUSHALL(%g4, %g5, %g6, %g3)
279 CPU_INDEX(%g6, %g5)
280 sll %g6, TRAPTR_SIZE_SHIFT, %g6
[all …]
H A Dus3_jalapeno_asm.S390 set CHPR_FECCTL0_LOGOUT, %g6
391 DO_CPU_LOGOUT(%g3, %g2, %g6, %g4, %g5, %g6, %g3, %g4)
405 CHK_JP_ERRATA85_ENABLED(%g6, fast_ecc_err_1);
406 set jp_estar_tl0_data, %g6
407 stx %g2, [%g6 + 0]
408 stx %g3, [%g6 + 8]
409 JP_FORCE_FULL_SPEED(%g2, %g3, %g6, %g7) /* %g2: saved speed */
412 ECACHE_FLUSHALL(%g4, %g5, %g6, %g7)
414 CHK_JP_ERRATA85_ENABLED(%g6, fast_ecc_err_2);
415 JP_RESTORE_SPEED(%g2, %g3, %g6, %g7) /* %g2: saved speed */
[all …]
H A Dus3_cheetah_asm.S106 DO_TL1_CPU_LOGOUT(%g3, %g2, %g4, %g5, %g6, %g3, %g4)
137 ASM_LDX(%g6, ecache_tl1_flushaddr)
138 cmp %g6, -1 ! check if address is valid
141 CH_ECACHE_FLUSHALL(%g4, %g5, %g6)
162 CH_DCACHE_FLUSHALL(%g4, %g5, %g6)
185 CH_ICACHE_FLUSHALL(%g4, %g5, %g6, %g3)
200 CPU_INDEX(%g6, %g5)
201 sll %g6, TRAPTR_SIZE_SHIFT, %g6
203 add %g6, %g5, %g6
204 ld [%g6 + TRAPTR_LIMIT], %g5
[all …]
H A Dus3_common_asm.S283 SFMMU_CPU_CNUM(%g2, %g6, %g3) ! %g6 = sfmmu cnum on this CPU
287 or %g6, %g4, %g6 ! %g6 = pgsz | cnum
293 or %g6, %g2, %g6 /* %g6 = nucleus pgsz | primary pgsz | cnum */
294 stxa %g6, [%g4]ASI_DMMU /* wr new ctxum */
350 SFMMU_CPU_CNUM(%g2, %g5, %g6) ! %g5 = sfmmu cnum on this CPU
359 ldxa [%g4]ASI_DMMU, %g6 /* rd old ctxnum */
360 srlx %g6, CTXREG_NEXT_SHIFT, %g2 /* %g2 = nucleus pgsz */
376 stxa %g6, [%g4]ASI_DMMU /* restore old ctxnum */
1047 set CHPR_FECCTL0_LOGOUT, %g6
1048 DO_CPU_LOGOUT(%g3, %g2, %g6, %g4, %g5, %g6, %g3, %g4)
[all …]
H A Dopl_olympus_asm.S178 SFMMU_CPU_CNUM(%g2, %g6, %g3) ! %g6 = sfmmu cnum on this CPU
182 or %g6, %g4, %g6 ! %g6 = primary pgsz | cnum
188 or %g6, %g2, %g6 ! %g6 = nucleus pgsz | primary pgsz | cnum
189 stxa %g6, [%g4]ASI_DMMU ! wr new ctxum
245 SFMMU_CPU_CNUM(%g2, %g5, %g6) ! %g5 = sfmmu cnum on this CPU
254 ldxa [%g4]ASI_DMMU, %g6 /* rd old ctxnum */
255 srlx %g6, CTXREG_NEXT_SHIFT, %g2 /* %g2 = nucleus pgsz */
271 stxa %g6, [%g4]ASI_DMMU /* restore old ctxnum */
714 mov %g0, %g6 ;\
756 mov %g0, %g6 ;\
[all …]
/illumos-gate/usr/src/uts/sun4/ml/
H A Dinterrupt.S51 ! %g3, %g5, %g6, %g7 - temps
62 add %g1, INTR_HEAD, %g6 ! %g6 = &cpu->m_cpu.intr_head
63 add %g6, %g5, %g6 ! %g6 = &cpu->m_cpu.intr_head[pil]
64 ldn [%g6], %g2 ! %g2 = cpu->m_cpu.intr_head[pil]
80 stn %g3, [%g6] ! update cpu->m_cpu.intr_head[pil]
81 add %g1, INTR_TAIL, %g6 ! %g6 = &cpu->m_cpu.intr_tail
82 stn %g0, [%g5 + %g6] ! clear cpu->m_cpu.intr_tail[pil]
88 TRACE_PTR(%g5, %g6)
89 TRACE_SAVE_TL_GL_REGS(%g5, %g6)
90 rdpr %tt, %g6
[all …]
/illumos-gate/usr/src/stand/lib/sa/sparc/
H A D_setjmp.S115 sub %g7, 2, %g6
117 deccc %g6 ! all windows done?
120 sub %g7, 2, %g6
122 deccc %g6 ! all windows done?
/illumos-gate/usr/src/test/util-tests/tests/dis/sparc/
H A Dtst.regs.s29 add %g4, %g5, %g6
30 add %g5, %g6, %g7
31 add %g6, %g7, %o0
H A Dtst.regs.out5 libdis_test+0x10: 8c 01 00 05 add %g4, %g5, %g6
6 libdis_test+0x14: 8e 01 40 06 add %g5, %g6, %g7
7 libdis_test+0x18: 90 01 80 07 add %g6, %g7, %o0
/illumos-gate/usr/src/uts/sun4u/sys/
H A Dmachthread.h236 CPU_ADDR(%g5, %g6); \
237 ldn [%g5 + CPU_THREAD], %g6; \
238 mov %g6, THREAD_REG; \
H A Dcheetahasm.h1155 stxa %g6, [%g1 + CH_ERR_TL1_G6]%asi; \
1160 rdpr %tl, %g6; \
1161 sub %g6, 1, %g6; \
1162 wrpr %g6, %tl; \
1163 and %g5, 3, %g6; \
1165 or %g3, %g6, %g3; \
1167 srlx %g5, CH_ERR_G2_TO_TSTATE_SHFT, %g6; \
1168 and %g6, 3, %g6; \
1170 or %g6, %g4, %g4; \
1228 ldxa [%g1 + CH_ERR_TL1_G6]%asi, %g6; \
/illumos-gate/usr/src/lib/libm/common/C/
H A D__lgamma.c72 g6 = 5.424138599891070494101986e2, variable
243 p = g0+y*(g1+y*(g2+y*(g3+y*(g4+y*(g5+y*(g6+y*g7)))))); in __k_lgamma()
252 p = g0+y*(g1+y*(g2+y*(g3+y*(g4+y*(g5+y*(g6+y*g7)))))); in __k_lgamma()
/illumos-gate/usr/src/uts/sun4v/cpu/
H A Dcommon_asm.S743 rdpr %tstate, %g6
745 btst TSTATE_PRIV, %g6 ! trap from supervisor mode?
828 mov %o5, %g6
847 mov %g6, %o5
870 SFMMU_CPU_CNUM(%g2, %o1, %g6) /* %o1 = sfmmu cnum on this CPU */
912 SFMMU_CPU_CNUM(%o0, %g2, %g6) /* %g2 = sfmmu cnum on this CPU */
914 set MMU_PAGESIZE, %g6 /* g6 = pgsize */
928 add %g1, %g6, %g1 /* go to nextpage */
942 mov %o3, %g6 ! XXXQ not used?
955 mov %g6, %o3 ! XXXQ not used?
/illumos-gate/usr/src/uts/sun4u/vm/
H A Dmach_sfmmu.h691 or %g0, TTE4M, %g6 ;\
694 sllx %g6, TTE_SZ_SHFT, %g6 ;\
703 or %g5, %g6, %g5 ;\

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