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Searched refs:enc_rxq_limit (Results 1 – 9 of 9) sorted by relevance

/illumos-gate/usr/src/uts/common/io/sfxge/common/
H A Dsiena_nic.c138 encp->enc_rxq_limit = MIN(EFX_RXQ_LIMIT_TARGET, nrxq); in siena_board_cfg()
143 (encp->enc_rxq_limit * EFX_RXQ_DC_NDESCS(EFX_RXQ_DC_SIZE)); in siena_board_cfg()
H A Dsiena_sram.c48 tx_base = rx_base + (encp->enc_rxq_limit * in siena_sram_init()
H A Dhunt_nic.c249 encp->enc_rxq_limit = EFX_RXQ_LIMIT_TARGET; in hunt_board_cfg()
H A Dmedford_nic.c232 encp->enc_rxq_limit = EFX_RXQ_LIMIT_TARGET; in medford_board_cfg()
H A Def10_rx.c753 EFSYS_ASSERT3U(enp->en_rx_qcount + 1, <, encp->enc_rxq_limit); in ef10_rx_qcreate()
762 if (index >= encp->enc_rxq_limit) { in ef10_rx_qcreate()
H A Def10_nic.c1167 MIN(128, MAX(encp->enc_rxq_limit, encp->enc_txq_limit)); in ef10_nic_probe()
1239 min_rxq_count = MIN(edlp->edl_min_rxq_count, encp->enc_rxq_limit); in ef10_nic_set_drv_limits()
1246 max_rxq_count = MIN(edlp->edl_max_rxq_count, encp->enc_rxq_limit); in ef10_nic_set_drv_limits()
H A Defx_rx.c1130 EFSYS_ASSERT3U(enp->en_rx_qcount + 1, <, encp->enc_rxq_limit); in siena_rx_qcreate()
1139 if (index >= encp->enc_rxq_limit) { in siena_rx_qcreate()
H A Defx_nic.c460 *rxq_countp = encp->enc_rxq_limit; in efx_nic_get_vi_pool()
H A Defx.h1048 uint32_t enc_rxq_limit; member