/illumos-gate/usr/src/uts/common/io/qede/579xx/drivers/ecore/ |
H A D | ecore_int.c | 139 u32 tmp = ecore_rd(p_hwfn, p_hwfn->p_dpc_ptt, MCP_REG_CPU_STATE); in ecore_mcp_attn_cb() 175 u32 tmp = ecore_rd(p_hwfn, p_hwfn->p_dpc_ptt, PSWHST_REG_VF_DISABLED_ERROR_VALID); in ecore_pswhst_attn_cb() 181 addr = ecore_rd(p_hwfn, p_hwfn->p_dpc_ptt, in ecore_pswhst_attn_cb() 183 data = ecore_rd(p_hwfn, p_hwfn->p_dpc_ptt, in ecore_pswhst_attn_cb() 199 tmp = ecore_rd(p_hwfn, p_hwfn->p_dpc_ptt, in ecore_pswhst_attn_cb() 204 addr = ecore_rd(p_hwfn, p_hwfn->p_dpc_ptt, in ecore_pswhst_attn_cb() 206 data = ecore_rd(p_hwfn, p_hwfn->p_dpc_ptt, in ecore_pswhst_attn_cb() 208 length = ecore_rd(p_hwfn, p_hwfn->p_dpc_ptt, in ecore_pswhst_attn_cb() 270 tmp = ecore_rd(p_hwfn, p_hwfn->p_dpc_ptt, in ecore_grc_attn_cb() 276 tmp = ecore_rd(p_hwfn, p_hwfn->p_dpc_ptt, in ecore_grc_attn_cb() [all …]
|
H A D | ecore_mcp.c | 69 ecore_rd(_p_hwfn, _p_ptt, (_p_hwfn->mcp_info->_ptr + _offset)) 101 u32 mfw_mb_offsize = ecore_rd(p_hwfn, p_ptt, addr); in ecore_mcp_cmd_port_init() 126 tmp = ecore_rd(p_hwfn, p_ptt, in ecore_mcp_read_mb() 166 p_info->public_base = ecore_rd(p_hwfn, p_ptt, MISC_REG_SHARED_MEM_ADDR); in ecore_load_mcp_offsets() 173 drv_mb_offsize = ecore_rd(p_hwfn, p_ptt, in ecore_load_mcp_offsets() 182 mfw_mb_offsize = ecore_rd(p_hwfn, p_ptt, in ecore_load_mcp_offsets() 186 p_info->mfw_mb_length = (u16)ecore_rd(p_hwfn, p_ptt, in ecore_load_mcp_offsets() 199 p_info->mcp_hist = (u16)ecore_rd(p_hwfn, p_ptt, in ecore_load_mcp_offsets() 319 org_mcp_reset_seq = ecore_rd(p_hwfn, p_ptt, MISCS_REG_GENERIC_POR_0); in ecore_mcp_reset() 326 } while ((org_mcp_reset_seq == ecore_rd(p_hwfn, p_ptt, in ecore_mcp_reset() [all …]
|
H A D | ecore_dev.c | 106 val = ecore_rd(p_hwfn, p_hwfn->p_main_ptt, bar_reg); in ecore_hw_bar_size() 1285 if (ecore_rd(p_hwfn, p_ptt, PSWRQ2_REG_CFG_DONE) == 1) in ecore_hw_init_chip() 1334 val = ecore_rd(p_hwfn, p_ptt, PSWRQ2_REG_WR_MBS0); in ecore_init_cache_line_size() 1482 ecore_rd(p_hwfn, p_ptt, CNIG_REG_PMEG_IF_CMD_BB) | in ecore_wr_nw_port() 1489 (ecore_rd(p_hwfn, p_ptt, CNIG_REG_PMEG_IF_CMD_BB) & in ecore_wr_nw_port() 1630 xmac_rxctrl = ecore_rd(p_hwfn, p_ptt, in ecore_link_init_bb() 1867 val = ecore_rd(p_hwfn, p_ptt, MISCS_REG_RESET_PL_HV); in ecore_hw_init_port() 2013 prs_reg = ecore_rd(p_hwfn, p_ptt, PRS_REG_SEARCH_TAG1); in ecore_hw_init_pf() 2027 prs_reg = ecore_rd(p_hwfn, p_ptt, PRS_REG_SEARCH_TCP); in ecore_hw_init_pf() 2030 prs_reg = ecore_rd(p_hwfn, p_ptt, PRS_REG_SEARCH_UDP); in ecore_hw_init_pf() [all …]
|
H A D | ecore_phy.c | 207 nvm_cfg_addr = ecore_rd(p_hwfn, p_ptt, MISC_REG_GEN_PURP_CR0); in ecore_phy_get_nvm_cfg1_addr() 208 nvm_cfg1_offset = ecore_rd(p_hwfn, p_ptt, nvm_cfg_addr + in ecore_phy_get_nvm_cfg1_addr() 225 u8 is_bb = ((ecore_rd(p_hwfn, p_ptt, MISCS_REG_CHIP_NUM) & 0x8070) in ecore_phy_info() 235 core_cfg = ecore_rd(p_hwfn, p_ptt, nvm_cfg1_addr + in ecore_phy_info() 640 data_lo = ecore_rd(p_hwfn, p_ptt, in ecore_ah_e5_phy_mac_stat() 644 data_hi = ecore_rd(p_hwfn, p_ptt, in ecore_ah_e5_phy_mac_stat() 1334 u32 mfw_mb_offsize = ecore_rd(p_hwfn, p_ptt, addr); in ecore_phy_sfp_get_inserted() 1337 transceiver_state = ecore_rd(p_hwfn, p_ptt, in ecore_phy_sfp_get_inserted() 1454 nvm_cfg_addr = ecore_rd(p_hwfn, p_ptt, in ecore_phy_sfp_set_txdisable() 1456 nvm_cfg1_offset = ecore_rd(p_hwfn, p_ptt, in ecore_phy_sfp_set_txdisable() [all …]
|
H A D | ecore_dbg_fw_funcs.c | 381 …, ptt, addr, arr, arr_size) for (i = 0; i < (arr_size); i++) (arr)[i] = ecore_rd(dev, ptt, addr) 1866 if (ecore_rd(p_hwfn, p_ptt, MISCS_REG_ECO_RESERVED) & 0x20000000) { in ecore_dbg_dev_init() 1941 dest[i] = ecore_rd(p_hwfn, p_ptt, addr); in ecore_read_fw_info() 1948 dest[i] = ecore_rd(p_hwfn, p_ptt, addr); in ecore_read_fw_info() 2113 public_data_addr = ecore_rd(p_hwfn, p_ptt, MISC_REG_SHARED_MEM_ADDR) | MCP_REG_SCRATCH; in ecore_dump_mfw_ver_param() 2117 global_section_offsize = ecore_rd(p_hwfn, p_ptt, global_section_offsize_addr); in ecore_dump_mfw_ver_param() 2121 mfw_ver = ecore_rd(p_hwfn, p_ptt, global_section_addr + offsetof(struct public_global, mfw_ver)); in ecore_dump_mfw_ver_param() 2203 reg_val[i] = ecore_rd(p_hwfn, p_ptt, s_reset_regs_defs[i].addr); in ecore_update_blocks_reset_state() 2229 old_reset_reg_val = ecore_rd(p_hwfn, p_ptt, dbg_reset_reg_addr); in ecore_bus_reset_dbg_block() 2350 …if (dev_data->block_in_reset[storm->block_id] || ecore_rd(p_hwfn, p_ptt, storm->sem_sync_dbg_empty… in ecore_bus_disable_inputs() [all …]
|
H A D | ecore_init_fw_funcs.c | 604 reg_val = ecore_rd(p_hwfn, p_ptt, QM_REG_SDMCMDREADY); in ecore_poll_on_qm_cmd_ready() 1256 reg_val = ecore_rd(p_hwfn, p_ptt, PRS_REG_ENCAPSULATION_TYPE_EN); in ecore_set_vxlan_enable() 1263 reg_val = ecore_rd(p_hwfn, p_ptt, NIG_REG_ENC_TYPE_ENABLE); in ecore_set_vxlan_enable() 1279 reg_val = ecore_rd(p_hwfn, p_ptt, PRS_REG_ENCAPSULATION_TYPE_EN); in ecore_set_gre_enable() 1287 reg_val = ecore_rd(p_hwfn, p_ptt, NIG_REG_ENC_TYPE_ENABLE); in ecore_set_gre_enable() 1320 reg_val = ecore_rd(p_hwfn, p_ptt, PRS_REG_ENCAPSULATION_TYPE_EN); in ecore_set_geneve_enable() 1386 rfs_cm_hdr_event_id = ecore_rd(p_hwfn, p_ptt, PRS_REG_CM_HDR_GFT); in ecore_set_gft_event_id_cm_hdr() 1405 rfs_cm_hdr_event_id = ecore_rd(p_hwfn, p_ptt, PRS_REG_CM_HDR_GFT); in ecore_set_rfs_mode_enable() 1452 cam_line.cam_line_mapped.camline = ecore_rd(p_hwfn, p_ptt, PRS_REG_GFT_CAM + CAM_LINE_SIZE*pf_id); in ecore_set_rfs_mode_enable()
|
H A D | ecore_init_ops.c | 393 val = ecore_rd(p_hwfn, p_ptt, addr); 419 val = ecore_rd(p_hwfn, p_ptt, addr); 587 val = ecore_rd(p_hwfn, p_hwfn->p_main_ptt,
|
H A D | ecore_hw.h | 191 u32 ecore_rd(struct ecore_hwfn *p_hwfn,
|
H A D | ecore_hw.c | 288 u32 ecore_rd(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, u32 hw_addr) in ecore_rd() function 470 lock_status = ecore_rd(p_hwfn, p_ptt, hw_lock_cntr_reg); 485 lock_status = ecore_rd(p_hwfn, p_ptt, hw_lock_cntr_reg); 525 lock_status = ecore_rd(p_hwfn, p_ptt, hw_lock_cntr_reg);
|
/illumos-gate/usr/src/uts/common/io/qede/579xx/drivers/ecore/documentation/snippets/ |
H A D | ptt.h | 46 u32 ecore_rd(struct ecore_hwfn *p_hwfn,
|
/illumos-gate/usr/src/uts/common/io/qede/ |
H A D | qede_gld.c | 624 transceiver_state = ecore_rd(hwfn, ptt, hwfn->mcp_info->port_addr + 1448 ret = ecore_rd(p_hwfn, p_hwfn->p_main_ptt, addr);
|