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Searched refs:cp_eax (Results 1 – 15 of 15) sorted by relevance

/illumos-gate/usr/src/uts/i86pc/os/
H A Dtscc_vmware.c58 regs.cp_eax = CPUID_VM_LEAF_MAX; in tsc_calibrate_vmware()
60 if (regs.cp_eax < CPUID_VM_LEAF_FREQ) { in tsc_calibrate_vmware()
64 regs.cp_eax = CPUID_VM_LEAF_FREQ; in tsc_calibrate_vmware()
71 if (regs.cp_eax == 0) { in tsc_calibrate_vmware()
76 *freqp = (uint64_t)regs.cp_eax * 1000; in tsc_calibrate_vmware()
H A Dxpv_platform.c117 cp.cp_eax = base; in xen_hvm_init()
125 cp.cp_eax >= (base + 2)) in xen_hvm_init()
136 cp.cp_eax = base + 1; in xen_hvm_init()
138 xen_major = cp.cp_eax >> 16; in xen_hvm_init()
139 xen_minor = cp.cp_eax & 0xffff; in xen_hvm_init()
158 cp.cp_eax = base + 2; in xen_hvm_init()
H A Dpci_mech1_amd.c52 cp.cp_eax = 0; in pci_check_amd_ioecs()
64 cp.cp_eax = 1; in pci_check_amd_ioecs()
66 family = ((cp.cp_eax >> 8) & 0xf) + ((cp.cp_eax >> 20) & 0xff); in pci_check_amd_ioecs()
/illumos-gate/usr/src/uts/intel/os/
H A Dcpuid.c1939 #define CPI_FAMILY_XTD(cpi) BITX((cpi)->cpi_std[1].cp_eax, 27, 20)
1940 #define CPI_MODEL_XTD(cpi) BITX((cpi)->cpi_std[1].cp_eax, 19, 16)
1941 #define CPI_TYPE(cpi) BITX((cpi)->cpi_std[1].cp_eax, 13, 12)
1942 #define CPI_FAMILY(cpi) BITX((cpi)->cpi_std[1].cp_eax, 11, 8)
1943 #define CPI_STEP(cpi) BITX((cpi)->cpi_std[1].cp_eax, 3, 0)
1944 #define CPI_MODEL(cpi) BITX((cpi)->cpi_std[1].cp_eax, 7, 4)
1953 #define CPI_FEATURES_7_1_EAX(cpi) ((cpi)->cpi_sub7[0].cp_eax)
1970 #define CPI_NUM_CORES(regs) BITX((regs)->cp_eax, 31, 26)
1971 #define CPI_NTHR_SHR_CACHE(regs) BITX((regs)->cp_eax, 25, 14)
1972 #define CPI_FULL_ASSOC_CACHE(regs) BITX((regs)->cp_eax, 9, 9)
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H A Dcpc_subr.c129 cpuid.cp_eax = 0x0; in kcpc_hw_init()
131 if (cpuid.cp_eax < 0xa) { in kcpc_hw_init()
134 cpuid.cp_eax = 0xa; in kcpc_hw_init()
137 versionid = cpuid.cp_eax & 0xFF; in kcpc_hw_init()
H A Dhma_fpu.c243 .cp_eax = 0xD, in hma_fpu_describe_xsave_state()
250 size = regs.cp_eax; in hma_fpu_describe_xsave_state()
H A Dcpuid_subr.c875 cp.cp_eax = 0x80000001; in synth_amd_skt_cpuid()
H A Dhma.c980 regs.cp_eax = 0x8000000a; in hma_svm_init()
/illumos-gate/usr/src/uts/i86pc/os/cpupm/
H A Dspeedstep.c291 cpu_regs.cp_eax = 0x1; in speedstep_supported()
314 cpu_regs.cp_eax = 0x6; in speedstep_turbo_supported()
316 if (!(cpu_regs.cp_eax & CPUID_TURBO_SUPPORT)) { in speedstep_turbo_supported()
H A Dpwrnow.c253 cpu_regs.cp_eax = 0x80000007; in pwrnow_supported()
292 cpu_regs.cp_eax = 0x80000007; in pwrnow_cpb_supported()
/illumos-gate/usr/src/uts/intel/pcbe/
H A Dcore_pcbe.c634 cp.cp_eax = 0x0; in core_pcbe_init()
638 if (cp.cp_eax < 0xa) { in core_pcbe_init()
643 cp.cp_eax = 0xa; in core_pcbe_init()
646 versionid = cp.cp_eax & 0xFF; in core_pcbe_init()
725 num_gpc = (cp.cp_eax >> 8) & 0xFF; in core_pcbe_init()
726 width_gpc = (cp.cp_eax >> 16) & 0xFF; in core_pcbe_init()
777 arch_events_vector_length = (cp.cp_eax >> 24) & 0xFF; in core_pcbe_init()
/illumos-gate/usr/src/uts/common/io/
H A Dcpuid_drv.c131 crs.cp_eax = (uint32_t)uoff; in cpuid_read()
/illumos-gate/usr/src/lib/libgrubmgmt/common/
H A Dlibgrub_cmd.c69 uint32_t cp_eax, cp_ebx, cp_ecx, cp_edx; in cpuid_64bit_capable() member
/illumos-gate/usr/src/uts/intel/sys/
H A Dx86_archext.h1733 uint32_t cp_eax; member
/illumos-gate/usr/src/uts/intel/io/vmm/amd/
H A Dsvm.c145 .cp_eax = 0x8000000a, in svm_init()