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Searched refs:bar0 (Results 1 – 16 of 16) sorted by relevance

/illumos-gate/usr/src/uts/common/io/xge/hal/xgehal/
H A Dxgehal-device.c167 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; in __hal_device_wait_quiescent() local
171 (void) __hal_device_register_poll(hldev, &bar0->adapter_status, 1, in __hal_device_wait_quiescent()
182 (void) __hal_device_register_poll(hldev, &bar0->adapter_status, 1, in __hal_device_wait_quiescent()
211 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; in xge_hal_device_is_slot_freeze() local
215 &bar0->adapter_status); in xge_hal_device_is_slot_freeze()
224 &bar0->pcc_enable); in xge_hal_device_is_slot_freeze()
242 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; in __hal_device_led_actifity_fix() local
310 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; __hal_device_xena_fix_mac() local
349 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; xge_hal_device_bcast_enable() local
379 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; xge_hal_device_bcast_disable() local
407 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; __hal_device_shared_splits_configure() local
429 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; __hal_device_rmac_padding_configure() local
474 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; __hal_device_pause_frames_configure() local
610 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; __hal_device_intr_mgmt() local
953 xge_hal_pci_bar0_t *bar0; __hal_device_tti_apply() local
1101 xge_hal_pci_bar0_t *bar0; __hal_device_rti_configure() local
1308 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; __hal_device_xaui_configure() local
1359 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; __hal_device_mac_link_util_set() local
1382 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; __hal_device_set_swapper() local
1490 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; __hal_device_rts_mac_configure() local
1518 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; __hal_device_rts_port_configure() local
1605 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; __hal_device_rts_qos_configure() local
1832 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; __hal_device_rth_it_configure() local
1927 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; __hal_spdm_entry_add() local
2020 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0; __hal_device_rth_spdm_configure() local
2321 xge_hal_pci_bar0_t *bar0 = __hal_device_pci_info_get() local
2447 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; __hal_device_handle_link_up_ind() local
2547 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; __hal_device_handle_link_down_ind() local
2641 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; __hal_device_handle_link_state_change() local
2763 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; __hal_device_hw_initialize() local
3023 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; __hal_device_reset() local
3161 xge_hal_pci_bar0_t *bar0; __hal_device_poll() local
4004 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; xge_hal_device_enable() local
4268 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; xge_hal_device_disable() local
4368 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; xge_hal_device_status() local
4449 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0; __hal_device_msix_intr_endis() local
4580 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; xge_hal_device_intr_disable() local
4677 xge_hal_pci_bar0_t *bar0; xge_hal_device_mcast_enable() local
4732 xge_hal_pci_bar0_t *bar0; xge_hal_device_mcast_disable() local
4785 xge_hal_pci_bar0_t *bar0; xge_hal_device_promisc_enable() local
4824 xge_hal_pci_bar0_t *bar0; xge_hal_device_promisc_disable() local
4874 xge_hal_pci_bar0_t *bar0; xge_hal_device_macaddr_get() local
4959 xge_hal_pci_bar0_t *bar0 = xge_hal_device_macaddr_set() local
5666 xge_hal_pci_bar0_t *bar0 = xge_hal_device_handle_tcode() local
5759 xge_hal_pci_bar0_t *bar0 = xge_hal_device_sched_timer() local
5891 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; __hal_read_spdm_entry_line() local
6076 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; xge_hal_spdm_entry_add() local
6220 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; xge_hal_spdm_entry_remove() local
6454 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0; __hal_device_rti_set() local
6480 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0; __hal_device_tti_set() local
6511 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0; xge_hal_channel_msi_set() local
6621 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0; __hal_set_msix_vals() local
6658 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0; xge_hal_channel_msix_set() local
6913 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; xge_hal_rts_rth_init() local
6940 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; xge_hal_rts_rth_clr() local
6975 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; xge_hal_rts_rth_set() local
7001 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; xge_hal_rts_rth_start() local
7023 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; xge_hal_rts_rth_stop() local
7048 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; xge_hal_rts_rth_itable_set() local
7094 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *) hldev->bar0; xge_hal_device_rts_rth_key_set() local
7151 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; xge_hal_device_rts_section_enable() local
7217 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0; xge_hal_fix_rldram_ecc_error() local
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H A Dxgehal-mgmt.c149 (void *)(hldev->bar0 + offset)); in xge_hal_mgmt_reg_read()
206 (void *)(hldev->bar0 + offset)); in xge_hal_mgmt_reg_write()
500 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0; in __hal_update_ring_bump() local
505 addr = (reg == 1)? (&bar0->ring_bump_counter2) : in __hal_update_ring_bump()
506 (&bar0->ring_bump_counter1); in __hal_update_ring_bump()
780 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0; in xge_hal_restore_link_led() local
795 &bar0->adapter_control); in xge_hal_restore_link_led()
803 &bar0->adapter_control); in xge_hal_restore_link_led()
819 &bar0->beacon_control); in xge_hal_restore_link_led()
822 val64, &bar0->beacon_control); in xge_hal_restore_link_led()
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H A Dxgehal-ring.c386 xge_hal_pci_bar0_t *bar0; in __hal_ring_prc_enable() local
395 bar0 = (xge_hal_pci_bar0_t *) (void *) in __hal_ring_prc_enable()
396 ((xge_hal_device_t *)ring->channel.devh)->bar0; in __hal_ring_prc_enable()
411 val64, &bar0->prc_rxd0_n[ring->channel.post_qid]); in __hal_ring_prc_enable()
417 ring->channel.regh0, &bar0->prc_ctrl_n[ring->channel.post_qid]); in __hal_ring_prc_enable()
441 val64, &bar0->prc_ctrl_n[ring->channel.post_qid]); in __hal_ring_prc_enable()
445 ring->channel.regh0, &bar0->rx_pa_cfg); in __hal_ring_prc_enable()
453 val64, &bar0->rx_pa_cfg); in __hal_ring_prc_enable()
463 xge_hal_pci_bar0_t *bar0; in __hal_ring_prc_disable() local
468 bar0 = (xge_hal_pci_bar0_t *) (void *) in __hal_ring_prc_disable()
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H A Dxgehal-fifo.c343 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; in __hal_fifo_hw_initialize() local
352 tx_fifo_partitions[0] = &bar0->tx_fifo_partition_0; in __hal_fifo_hw_initialize()
353 tx_fifo_partitions[1] = &bar0->tx_fifo_partition_1; in __hal_fifo_hw_initialize()
354 tx_fifo_partitions[2] = &bar0->tx_fifo_partition_2; in __hal_fifo_hw_initialize()
355 tx_fifo_partitions[3] = &bar0->tx_fifo_partition_3; in __hal_fifo_hw_initialize()
357 tx_fifo_wrr[0] = &bar0->tx_w_round_robin_0; in __hal_fifo_hw_initialize()
358 tx_fifo_wrr[1] = &bar0->tx_w_round_robin_1; in __hal_fifo_hw_initialize()
359 tx_fifo_wrr[2] = &bar0->tx_w_round_robin_2; in __hal_fifo_hw_initialize()
360 tx_fifo_wrr[3] = &bar0->tx_w_round_robin_3; in __hal_fifo_hw_initialize()
361 tx_fifo_wrr[4] = &bar0->tx_w_round_robin_4; in __hal_fifo_hw_initialize()
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H A Dxgehal-stats.c217 xge_hal_pci_bar0_t *bar0; in __hal_stats_disable() local
224 bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; in __hal_stats_disable()
227 &bar0->stat_cfg); in __hal_stats_disable()
230 &bar0->stat_cfg); in __hal_stats_disable()
233 &bar0->stat_cfg); in __hal_stats_disable()
308 xge_hal_pci_bar0_t *bar0; in __hal_stats_enable() local
317 bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0; in __hal_stats_enable()
323 stats->dma_addr, &bar0->stat_addr); in __hal_stats_enable()
335 val64, &bar0->stat_byte_cnt); in __hal_stats_enable()
356 val64, &bar0->stat_cfg); in __hal_stats_enable()
H A Dxgehal-device-fp.c45 return hldev->bar0; in xge_hal_device_bar0()
79 xge_hal_device_bar0_set(xge_hal_device_t *hldev, char *bar0) in xge_hal_device_bar0_set() argument
81 xge_assert(bar0); in xge_hal_device_bar0_set()
82 hldev->bar0 = bar0; in xge_hal_device_bar0_set()
/illumos-gate/usr/src/uts/intel/io/vmxnet3s/
H A Dvmxnet3.h125 caddr_t bar0, bar1; member
227 ddi_get32((Device)->bar0Handle, (uint32_t *)((Device)->bar0 + (Reg)))
229 ddi_put32((Device)->bar0Handle, (uint32_t *)((Device)->bar0 + (Reg)), \
H A Dvmxnet3_main.c1298 if (ddi_regs_map_setup(dip, 1, &dp->bar0, 0, 0, &vmxnet3_dev_attr, in vmxnet3_attach()
/illumos-gate/usr/src/uts/common/sys/
H A Dpci_tools.h89 bar0 = PCITOOL_BAR0, enumerator
/illumos-gate/usr/src/uts/common/io/xge/hal/include/
H A Dxgehal-device.h99 char *bar0; member
331 char *bar0; member
885 xge_hal_device_bar0_set(xge_hal_device_t *hldev, char *bar0);
/illumos-gate/usr/src/uts/sun4u/sys/pci/
H A Ddb21554_config.h231 uint32_t bar0; member
/illumos-gate/usr/src/cmd/pcitool/
H A Dpcitool_ui.c1070 bar0 = 6, in parse_device_opts() enumerator
1184 case bar0: in parse_device_opts()
/illumos-gate/usr/src/uts/common/io/cxgbe/t4nex/
H A Dt4_nexus.c1650 uintptr_t bar0; in setup_memwin() local
1663 bar0 = ((uint64_t)data[0].pci_phys_mid << 32) | data[0].pci_phys_low; in setup_memwin()
1667 mem_win0_base = bar0 + MEMWIN0_BASE; in setup_memwin()
1668 mem_win1_base = bar0 + MEMWIN1_BASE; in setup_memwin()
1669 mem_win2_base = bar0 + MEMWIN2_BASE; in setup_memwin()
/illumos-gate/usr/src/uts/common/io/xge/drv/
H A Dxge.c1120 ret = ddi_regs_map_setup(dev_info, 1, (caddr_t *)&attr.bar0, in xge_attach()
/illumos-gate/usr/src/uts/common/io/cxgbe/common/
H A Dt4_hw.c1024 u32 bar0; in t4_get_window() local
1036 bar0 = t4_read_pcie_cfg4(adap, pci_base, drv_fw_attach); in t4_get_window()
1037 bar0 &= pci_mask; in t4_get_window()
1038 adap->t4_bar0 = bar0; in t4_get_window()
1040 return bar0 + memwin_base; in t4_get_window()
/illumos-gate/usr/src/uts/sun4u/io/pci/
H A Ddb21554.c1633 ph->bar0 = pci_config_get32(config_handle, hdr_off + PCI_CONF_BASE0); in db_pci_get_header()