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Searched refs:__le32 (Results 1 – 25 of 49) sorted by relevance

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/illumos-gate/usr/src/uts/common/io/qede/579xx/drivers/ecore/hsi_repository/
H A Discsi_common.h146 __le32 data[12] /* iscsi header data */;
162 __le32 hdr_second_dword;
168 __le32 all_ones /* should be 0xffffffff */;
169 __le32 reserved1 /* reserved */;
170 __le32 stat_sn /* stat_sn */;
171 __le32 exp_cmd_sn /* exp_cmd_sn */;
172 __le32 max_cmd_sn /* max_cmd_sn */;
178 __le32 reserved7 /* reserved */;
206 __le32 hdr_second_dword;
212 __le32 itt /* Initiator Task Tag (only 2 bytes are significant). [constant, initialized] */;
[all …]
H A Dtcp_common.h50 __le32 cid /* connection ID */;
74 __le32 two_msl_timer /* 2MSL (used for TIME_WAIT state) timeout value */;
122 __le32 remote_ip[4];
123 __le32 local_ip[4];
124 __le32 flow_label;
133 __le32 cwnd /* absolute congestion window */;
134 __le32 ss_thresh;
138 __le32 rcv_next;
139 __le32 snd_una;
140 __le32 snd_next;
[all …]
H A Dtesting.h44 __le32 cid;
45 __le32 tid;
46 __le32 reserved2;
53 __le32 dmaParams0;
64 __le32 dmaParams1;
83 __le32 dmaParams2;
86 __le32 dmaParams3;
92 __le32 unusedPad;
93 __le32 immediateDataValues[16];
107 __le32 reg00Value /* Value to write to register, or value read back from register */;
[all …]
H A Dqed_hsi_rdma.h56 …__le32 imm_data_or_inv_r_Key /* immediate data in case imm_flg is set, or invalidated r_key in cas…
57 __le32 length;
58 __le32 imm_data_hi /* High bytes of immediate data in case imm_flg is set in iWARP only */;
80 __le32 reserved1;
83 __le32 reserved3;
202 __le32 error_intervals /* Total number of error intervals in the IO. */;
203 …__le32 dif_error_1st_interval /* Number of the first interval that contained error. Set to 0xFFFFF…
254 __le32 length;
255 __le32 flags;
267 __le32 reserved1;
[all …]
H A Decore_hsi_iscsi.h54 __le32 reserved[4];
62 __le32 tcp[32];
63 __le32 iscsi[4];
71 __le32 reserved_iscsi[40];
72 __le32 reserved_tcp[4];
298 __le32 reg0 /* reg0 */;
299 __le32 reg1 /* reg1 */;
300 __le32 reg2 /* reg2 */;
301 __le32 more_to_send_seq /* reg3 */;
302 __le32 reg4 /* reg4 */;
[all …]
H A Decore_hsi_toe.h62 __le32 reserved[24];
71 __le32 reserved[36];
80 __le32 reserved[8];
88 __le32 reserved[44];
126 __le32 rel_seq /* reg0 */;
127 __le32 rel_seq_threshold /* reg1 */;
132 __le32 reg2 /* reg2 */;
133 __le32 reg3 /* reg3 */;
359 __le32 reg0 /* reg0 */;
360 __le32 reg1 /* reg1 */;
[all …]
H A Decore_hsi_iwarp.h57 __le32 reserved[4];
65 __le32 reserved[36];
73 __le32 reserved[44];
299 __le32 reg0 /* reg0 */;
300 __le32 reg1 /* reg1 */;
301 __le32 reg2 /* reg2 */;
302 __le32 more_to_send_seq /* reg3 */;
303 __le32 reg4 /* reg4 */;
304 __le32 rewinded_snd_max /* cf_array0 */;
305 __le32 rd_msn /* cf_array1 */;
[all …]
H A Decore_hsi_roce.h143 __le32 flow_label;
144 __le32 dst_qp_id;
145 __le32 ack_timeout_val;
146 __le32 initial_psn;
157 …__le32 src_gid[4] /* BE order. In case of RRoCE on IPv4 the high register will hold the address. L…
158 …__le32 dst_gid[4] /* BE order. In case of RRoCE on IPv4 the high register will hold the address. L…
163 __le32 cq_cid;
198 __le32 flow_label;
199 __le32 dst_qp_id;
203 __le32 initial_psn;
[all …]
H A Decore_hsi_common.h85 __le32 reserved[4];
93 __le32 reserved[4];
101 __le32 spq_base_lo /* SPQ Ring Base Address low dword */;
102 __le32 spq_base_hi /* SPQ Ring Base Address high dword */;
106 __le32 reserved0[55] /* Pad to 15 cycles */;
332 __le32 reg0 /* reg0 */;
333 __le32 reg1 /* reg1 */;
334 __le32 reg2 /* reg2 */;
335 __le32 reg3 /* reg3 */;
336 __le32 reg4 /* reg4 */;
[all …]
H A Dfcoe_common.h53 __le32 abts_rsp_fc_payload_lo /* Abts flow: last 32 bits of fcPayload, out of 96 */;
65 …__le32 previous_tid /* Previous tid. Used for Send XFER WQEs in Multiple continuation mode - Targe…
66 __le32 parent_tid /* Parent tid. Used for write tasks in a continuation mode - Target only */;
67 __le32 burst_length /* The desired burst length. */;
68 __le32 seq_rec_updated_offset /* The updated offset in SGL - Used in sequence recovery */;
77 __le32 data_offset /* data-offset */;
78 __le32 reserved /* High data-offset */;
205 …__le32 sgl_byte_offset /* Byte offset from the beginning of the first page in the SGL. In case SGL…
216 __le32 opaque[8] /* The FCP_CMD payload */;
225 __le32 opaque[6] /* The FCP_RSP payload */;
[all …]
H A Decore_hsi_init_tool.h87 __le32 timestamp /* FW Timestamp in unix time (sec. since 1970) */;
88 __le32 reserved2;
100 __le32 grc_addr /* GRC address where the fw_info struct is located. */;
101 __le32 size /* Size of the fw_info structure (thats located at the grc_addr). */;
156 __le32 offset /* buffer offset in bytes from the beginning of the binary file */;
157 __le32 length /* buffer length in bytes */;
180 __le32 data;
192 __le32 data;
204 __le32 data;
216 __le32 data;
[all …]
H A Decore_hsi_rdma.h73 __le32 reserved;
87 __le32 max_cqes;
104 __le32 itid;
105 __le32 reserved;
116 __le32 reserved1;
212 __le32 flags;
252 __le32 length_lo /* lower 32 bits of the registered MR length. */;
253 __le32 itid;
254 __le32 reserved2;
259 __le32 reserved3[2];
[all …]
H A Dqedf_hsi.h67 __le32 reserved2[2];
68 __le32 fc_payload[3] /* ABTS FC payload response frame */;
105 __le32 fcp_cmd_payload[8];
138 __le32 fcp_resid;
139 __le32 fcp_sns_len;
140 __le32 fcp_rsp_len;
148 __le32 fw_residual /* Residual bytes calculated by FW */;
158 __le32 reserved1[5];
166 __le32 err_warn_bitmap_lo /* Error bitmap lower 32 bits */;
167 __le32 err_warn_bitmap_hi /* Error bitmap higher 32 bits */;
[all …]
H A Decore_hsi_eth.h48 __le32 reserved[4];
56 __le32 reserved[8];
64 __le32 reserved[60];
290 __le32 reg0 /* reg0 */;
291 __le32 reg1 /* reg1 */;
292 __le32 reg2 /* reg2 */;
293 __le32 reg3 /* reg3 */;
294 __le32 reg4 /* reg4 */;
295 __le32 reg5 /* cf_array0 */;
296 __le32 reg6 /* cf_array1 */;
[all …]
H A Decore_hsi_fcoe.h467 __le32 remain_io /* reg0 */;
468 __le32 reg1 /* reg1 */;
469 __le32 reg2 /* reg2 */;
470 __le32 reg3 /* reg3 */;
471 __le32 reg4 /* reg4 */;
472 __le32 reg5 /* cf_array0 */;
473 __le32 reg6 /* cf_array1 */;
478 __le32 reg7 /* reg7 */;
479 __le32 reg8 /* reg8 */;
579 __le32 reg0 /* reg0 */;
[all …]
/illumos-gate/usr/src/uts/common/io/qede/579xx/drivers/ecore/
H A Decore_hsi_iscsi.h54 __le32 reserved[4];
62 __le32 tcp[32];
63 __le32 iscsi[4];
71 __le32 reserved_iscsi[40];
72 __le32 reserved_tcp[4];
298 __le32 reg0 /* reg0 */;
299 __le32 reg1 /* reg1 */;
300 __le32 reg2 /* reg2 */;
301 __le32 more_to_send_seq /* reg3 */;
302 __le32 reg4 /* reg4 */;
[all …]
H A Decore_hsi_toe.h62 __le32 reserved[24];
71 __le32 reserved[36];
80 __le32 reserved[8];
88 __le32 reserved[44];
126 __le32 rel_seq /* reg0 */;
127 __le32 rel_seq_threshold /* reg1 */;
132 __le32 reg2 /* reg2 */;
133 __le32 reg3 /* reg3 */;
359 __le32 reg0 /* reg0 */;
360 __le32 reg1 /* reg1 */;
[all …]
H A Decore_hsi_roce.h143 __le32 flow_label;
144 __le32 dst_qp_id;
145 __le32 ack_timeout_val;
146 __le32 initial_psn;
157 …__le32 src_gid[4] /* BE order. In case of RRoCE on IPv4 the high register will hold the address. L…
158 …__le32 dst_gid[4] /* BE order. In case of RRoCE on IPv4 the high register will hold the address. L…
163 __le32 cq_cid;
198 __le32 flow_label;
199 __le32 dst_qp_id;
203 __le32 initial_psn;
[all …]
H A Decore_hsi_common.h85 __le32 reserved[4];
93 __le32 reserved[4];
101 __le32 spq_base_lo /* SPQ Ring Base Address low dword */;
102 __le32 spq_base_hi /* SPQ Ring Base Address high dword */;
106 __le32 reserved0[55] /* Pad to 15 cycles */;
332 __le32 reg0 /* reg0 */;
333 __le32 reg1 /* reg1 */;
334 __le32 reg2 /* reg2 */;
335 __le32 reg3 /* reg3 */;
336 __le32 reg4 /* reg4 */;
[all …]
H A Decore_hsi_init_tool.h87 __le32 timestamp /* FW Timestamp in unix time (sec. since 1970) */;
88 __le32 reserved2;
100 __le32 grc_addr /* GRC address where the fw_info struct is located. */;
101 __le32 size /* Size of the fw_info structure (thats located at the grc_addr). */;
156 __le32 offset /* buffer offset in bytes from the beginning of the binary file */;
157 __le32 length /* buffer length in bytes */;
180 __le32 data;
192 __le32 data;
204 __le32 data;
216 __le32 data;
[all …]
H A Decore_hsi_rdma.h73 __le32 reserved;
87 __le32 max_cqes;
104 __le32 itid;
105 __le32 reserved;
116 __le32 reserved1;
212 __le32 flags;
252 __le32 length_lo /* lower 32 bits of the registered MR length. */;
253 __le32 itid;
254 __le32 reserved2;
259 __le32 reserved3[2];
[all …]
H A Decore_hsi_fcoe.h467 __le32 remain_io /* reg0 */;
468 __le32 reg1 /* reg1 */;
469 __le32 reg2 /* reg2 */;
470 __le32 reg3 /* reg3 */;
471 __le32 reg4 /* reg4 */;
472 __le32 reg5 /* cf_array0 */;
473 __le32 reg6 /* cf_array1 */;
478 __le32 reg7 /* reg7 */;
479 __le32 reg8 /* reg8 */;
579 __le32 reg0 /* reg0 */;
[all …]
/illumos-gate/usr/src/uts/common/io/i40e/core/
H A Di40e_adminq_cmd.h67 __le32 cookie_high;
68 __le32 cookie_low;
71 __le32 param0;
72 __le32 param1;
73 __le32 param2;
74 __le32 param3;
77 __le32 param0;
78 __le32 param1;
79 __le32 addr_high;
80 __le32 addr_low;
[all …]
/illumos-gate/usr/src/uts/common/io/qede/579xx/hsi/hw/
H A Dinit_tool_hsi.h70 __le32 offset /* buffer offset in bytes from the beginning of the binary file */;
71 __le32 length /* buffer length in bytes */;
94 __le32 data;
107 __le32 data;
120 __le32 data;
133 __le32 data;
172 __le32 op_data;
187 __le32 op_data;
192 __le32 delay /* delay in us */;
201 __le32 op_data;
[all …]
/illumos-gate/usr/src/uts/common/io/igc/core/
H A Digc_base.h21 __le32 cmd_type_len;
22 __le32 olinfo_status;
26 __le32 nxtseq_seed;
27 __le32 status;
33 __le32 vlan_macip_lens;
35 __le32 launch_time;
36 __le32 seqnum_seed;
38 __le32 type_tucmd_mlhl;
39 __le32 mss_l4len_idx;
95 __le32 data;
[all …]

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