Home
last modified time | relevance | path

Searched refs:_CONST (Results 1 – 21 of 21) sorted by relevance

/illumos-gate/usr/src/uts/intel/amd64/ml/
H A Dmach_offsets.in123 \#define LABEL_RBP _CONST(_MUL(2, LABEL_VAL_INCR) + LABEL_VAL)
124 \#define LABEL_RBX _CONST(_MUL(3, LABEL_VAL_INCR) + LABEL_VAL)
125 \#define LABEL_R12 _CONST(_MUL(4, LABEL_VAL_INCR) + LABEL_VAL)
126 \#define LABEL_R13 _CONST(_MUL(5, LABEL_VAL_INCR) + LABEL_VAL)
127 \#define LABEL_R14 _CONST(_MUL(6, LABEL_VAL_INCR) + LABEL_VAL)
128 \#define LABEL_R15 _CONST(_MUL(7, LABEL_VAL_INCR) + LABEL_VAL)
129 \#define T_RBP _CONST(T_LABEL + LABEL_RBP)
130 \#define T_RBX _CONST(T_LABEL + LABEL_RBX)
131 \#define T_R12 _CONST(T_LABEL + LABEL_R12)
132 \#define T_R13 _CONST(T_LABEL + LABEL_R13)
[all …]
/illumos-gate/usr/src/uts/intel/ml/
H A Dfloat.S77 movl $_CONST(FPU_VALID|FPU_EN), FPU_CTX_FPU_FLAGS(%rdi)
88 movl $_CONST(FPU_VALID|FPU_EN), FPU_CTX_FPU_FLAGS(%rdi)
100 movl $_CONST(FPU_VALID|FPU_EN), FPU_CTX_FPU_FLAGS(%rdi)
124 movl $_CONST(FPU_VALID|FPU_EN), FPU_CTX_FPU_FLAGS(%rdi)
147 movl $_CONST(FPU_VALID|FPU_EN), FPU_CTX_FPU_FLAGS(%rdi)
164 movl $_CONST(FPU_VALID|FPU_EN), FPU_CTX_FPU_FLAGS(%rdi)
222 cmpl $_CONST(FPU_EN|FPU_VALID), FPU_CTX_FPU_FLAGS(%rdi)
224 movl $_CONST(FPU_EN), FPU_CTX_FPU_FLAGS(%rdi)
233 cmpl $_CONST(FPU_EN|FPU_VALID), FPU_CTX_FPU_FLAGS(%rdi)
235 movl $_CONST(FPU_EN), FPU_CTX_FPU_FLAGS(%rdi)
H A Dddi_i86_asm.S39 cmpl $_CONST(DDI_ACCATTR_IO_SPACE|DDI_ACCATTR_DIRECT), %edx
46 cmpl $_CONST(DDI_ACCATTR_CPU_VADDR|DDI_ACCATTR_DIRECT), %edx
62 cmpl $_CONST(DDI_ACCATTR_IO_SPACE|DDI_ACCATTR_DIRECT), %edx
69 cmpl $_CONST(DDI_ACCATTR_CPU_VADDR|DDI_ACCATTR_DIRECT), %edx
85 cmpl $_CONST(DDI_ACCATTR_IO_SPACE|DDI_ACCATTR_DIRECT), %edx
91 cmpl $_CONST(DDI_ACCATTR_CPU_VADDR|DDI_ACCATTR_DIRECT), %edx
115 cmpl $_CONST(DDI_ACCATTR_IO_SPACE|DDI_ACCATTR_DIRECT), %ecx
122 cmpl $_CONST(DDI_ACCATTR_CPU_VADDR|DDI_ACCATTR_DIRECT), %ecx
138 cmpl $_CONST(DDI_ACCATTR_IO_SPACE|DDI_ACCATTR_DIRECT), %ecx
145 cmpl $_CONST(DDI_ACCATTR_CPU_VADDR|DDI_ACCATTR_DIRECT), %ecx
[all …]
H A Dsseblk.S217 movl $_CONST(32 - 1), %ecx
H A Dexception.S657 pushq $_CONST(_MUL(T_FASTTRAP, GATE_DESC_SIZE) + 2)
H A Dcopy.S53 #define NTA_ALIGN_MASK _CONST(NTA_ALIGN_SIZE-1)
55 #define COUNT_ALIGN_MASK _CONST(COUNT_ALIGN_SIZE-1)
/illumos-gate/usr/src/uts/intel/sys/
H A Dasm_linkage.h55 #define _CONST(const) (const) macro
56 #define _BITNOT(const) ~_CONST(const)
57 #define _MUL(a, b) _CONST(a * b)
100 subq $_CONST(_MUL(XMM_SIZE, nreg)), %rsp; \
104 addq $_CONST(_MUL(XMM_SIZE, nreg)), %rsp
109 subl $_CONST(_MUL(XMM_SIZE, nreg) + XMM_ALIGN), %esp; \
115 addl $_CONST(_MUL(XMM_SIZE, nreg) + XMM_ALIGN), %esp;
/illumos-gate/usr/src/uts/intel/kdi/
H A Dkdi_offsets.in65 \#define DRADDR_IDX(num) _CONST(_MUL(num, DR_ADDR_INCR))
66 \#define DRADDR_OFF(num) _CONST(DRADDR_IDX(num) + DR_ADDR)
67 \#define KRS_DROFF(num) _CONST(DRADDR_OFF(num) + KRS_DR)
68 \#define REG_OFF(reg) _CONST(_CONST(reg) << REG_SHIFT)
69 \#define KDIREG_OFF(reg) _CONST(_MUL(KREG_SIZE, reg) + KRS_GREGS)
/illumos-gate/usr/src/uts/i86pc/ml/
H A Dcpr_wakecode.S224 D16 orl $_CONST(CR0_PE|CR0_WP|CR0_AM), %eax
409 D16 movl $_CONST(COM1+LCR), %edx
413 D16 movl $_CONST(COM1+DLL), %edx / divisor latch lsb
417 D16 movl $_CONST(COM1+DLH), %edx / divisor latch hsb
421 D16 movl $_CONST(COM1+LCR), %edx / select COM1
422 D16 movb $_CONST(STOP1|BITS8), %al / 1 stop bit, 8bit word len
425 D16 movl $_CONST(COM1+MCR), %edx / select COM1
426 D16 movb $_CONST(RTS|DTR), %al / data term ready & req to send
430 D16 movl $_CONST(COM2+LCR), %edx
434 D16 movl $_CONST(COM2+DLL), %edx / divisor latch lsb
[all …]
H A Dcomm_page.S65 .fill 1, 4, _CONST(TSC_RDTSC_CPUID)
83 .fill _CONST(NCPU), 8, 0
86 .fill _CONST(COMM_PAGE_SIZE - COMM_PAGE_S_SIZE), 1, 0
H A Doffsets.in139 \#define LABEL_SP _CONST(LABEL_VAL + LABEL_VAL_INCR)
140 \#define T_PC _CONST(T_LABEL + LABEL_PC)
141 \#define T_SP _CONST(T_LABEL + LABEL_SP)
160 \#define LWP_ACCT_USER _CONST(LWP_MS_ACCT + _MUL(LMS_USER, LWP_MS_ACCT_INCR))
161 \#define LWP_ACCT_SYSTEM _CONST(LWP_MS_ACCT + _MUL(LMS_SYSTEM, LWP_MS_ACCT_INCR))
212 \#define CPU_INTR_ACTV_REF _CONST(CPU_INTR_ACTV + 2)
H A Dlocore.S149 addq $_CONST(DEFAULTSTKSZ - REGSIZE), %rsp
179 orq $_CONST(CR0_WP|CR0_AM), %rax
H A Dsyscall_asm_amd64.S188 movq _CONST(_MUL(callback_id, CPTRSIZE))(%r15), %r15 ;\
233 andb $_CONST(0xffff - PS_C), REGOFF_RFL(%rsp)
/illumos-gate/usr/src/uts/i86xpv/ml/
H A Dhyperevent.S85 addq $_CONST(_MUL(4, CLONGSIZE)), %rsp
/illumos-gate/usr/src/lib/commpage/amd64/
H A Dcp_subr.S293 shrdq $_CONST(32 - NSEC_SHIFT), %rdx, %rax
409 movq _CONST(CP_HRESTIME + CP_HRESTIME_INCR)(%rdi), %r10
/illumos-gate/usr/src/uts/i86pc/sys/
H A Dmachparam.h97 #define MMU_PAGEOFFSET _CONST(MMU_PAGESIZE-1) /* assembler lameness */
/illumos-gate/usr/src/cmd/mdb/intel/kmdb/
H A Dkmdb_context_off.in35 \#define UC_GREG(name) _CONST(UC_GREGS + _MUL(name, UC_GREGS_INCR))
/illumos-gate/usr/src/lib/brand/shared/brand/i386/
H A Dhandler.S32 pushl $_CONST(. - brand_handler_table); \
/illumos-gate/usr/src/uts/i86pc/dboot/
H A Ddboot_grub.S281 orl $_CONST(CR0_PG | CR0_WP | CR0_AM), %eax
/illumos-gate/usr/src/lib/brand/shared/brand/amd64/
H A Dhandler.S31 pushq $_CONST(. - brand_handler_table); \
/illumos-gate/usr/src/cmd/sgs/rtld/amd64/
H A Dboot_elf.S252 movq $_CONST(XFEATURE_FP_ALL), %rdx
260 movq $_CONST(XFEATURE_FP_ALL), %rdx