Searched refs:XHRE (Results 1 – 4 of 4) sorted by relevance
47 #define XHRE 0x20 /* ... xmit hold buffer empty */ macro
873 while (((inb(port + LSR) & XHRE) == 0) && checks--) in serial_putchar()
107 #define XHRE 0x20 /* tx hold reg is now empty */ macro
1529 while ((INB(LSR) & XHRE) == 0) { in asyputchar()1763 if (lsr & XHRE) { in async_txint()2719 if (INB(LSR) & XHRE) { in async_nstart()2748 if (INB(LSR) & XHRE) { in async_resume()3717 if ((ss = async->async_flowc) != '\0' && (INB(LSR) & XHRE)) { in asycheckflowcontrol_sw()