xref: /illumos-gate/usr/src/uts/common/sys/nvme/wdc_sn840.h (revision 7655c6d53c36750b508636f48c73a2de57754e5a)
1 /*
2  * This file and its contents are supplied under the terms of the
3  * Common Development and Distribution License ("CDDL"), version 1.0.
4  * You may only use this file in accordance with the terms of version
5  * 1.0 of the CDDL.
6  *
7  * A full copy of the text of the CDDL should have accompanied this
8  * source.  A copy of the CDDL is also available via the Internet at
9  * http://www.illumos.org/license/CDDL.
10  */
11 
12 /*
13  * Copyright 2024 Oxide Computer Company
14  */
15 
16 #ifndef _SYS_NVME_WDC_SN840_H
17 #define	_SYS_NVME_WDC_SN840_H
18 
19 /*
20  * This header defines vendor-specific NVMe interfaces and is not a committed
21  * interface. Its contents and existence are subject to change.
22  *
23  * Vendor-specific definitions for the WDC SN840 NVMe device.
24  */
25 
26 #include <sys/debug.h>
27 #include <sys/stdint.h>
28 #include <sys/debug.h>
29 
30 #ifdef __cplusplus
31 extern "C" {
32 #endif
33 
34 #define	WDC_SN840_DID	0x2500
35 
36 typedef enum {
37 	/*
38 	 * This log is the fixed wdc_vul_sn840_eol_t structure.
39 	 */
40 	WDC_SN840_LOG_EOL		= 0xc0,
41 	/*
42 	 * This log uses the wdc_log_vsd_t with a series of different entry
43 	 * types.
44 	 */
45 	WDC_SN840_LOG_DEV_MANAGE	= 0xc2,
46 	/*
47 	 * While this log exists, we do not know the data format of it.
48 	 */
49 	WDC_SN840_LOG_PCIE_SI		= 0xc4,
50 	/*
51 	 * This uses the common wdc_vul_power_t structure.
52 	 */
53 	WDC_SN840_LOG_POWER		= 0xc5,
54 	/*
55 	 * This uses the common wdc_vul_temp_t structure. The specific
56 	 * measurements are recorded in the wdc_log_sn840_temp_t.
57 	 */
58 	WDC_SN840_LOG_TEMP		= 0xc6,
59 	/*
60 	 * The firmware activation log uses the wdc_sn840_fw_act_hdr_t stucture
61 	 * as a header and then is followed by one or more
62 	 * wdc_vul_sn840_fw_act_ent_t structures that have entry information.
63 	 */
64 	WDC_SN840_LOG_FW_ACT		= 0xcb,
65 	/*
66 	 * This log uses the wdc_vul_sn840_ccds_info_t structure.
67 	 */
68 	WDC_SN840_LOG_CCDS		= 0xfa
69 } wdc_sn840_vul_t;
70 
71 /*
72  * All data structures must be packed to account for the layout from the various
73  * programmer's manuals.
74  */
75 #pragma pack(1)
76 
77 /*
78  * Device EOL Log Page
79  */
80 typedef struct {
81 	uint8_t		eol_rsvd0[76];
82 	uint32_t	eol_rbc;
83 	uint8_t		eol_rsvd1[4];
84 	uint32_t	eol_waf;
85 	uint32_t	eol_plr;
86 	uint8_t		eol_rsvd2[4];
87 	uint32_t	eol_pfc;
88 	uint32_t	eol_efc;
89 	uint8_t		eol_rss3[4];
90 	uint32_t	eol_vendor;
91 	uint16_t	eol_cust_sts;
92 	uint16_t	eol_sys_sts;
93 	uint8_t		eol_cust_state;
94 	uint8_t		eol_sys_state;
95 } wdc_vul_sn840_eol_t;
96 
97 /*
98  * Smatch can't handle packed structure sizeof calculations correctly,
99  * unfortunately.
100  */
101 #ifndef __CHECKER__
102 CTASSERT(sizeof (wdc_vul_sn840_eol_t) == 118);
103 #endif
104 
105 typedef enum {
106 	WDC_SN840_VSD_ID		= 0x01,		/* uint32_t */
107 	WDC_SN840_VSD_UEFI_VER		= 0x02,		/* CBS */
108 	WDC_SN840_VSD_SBL_VER		= 0x03,		/* CBS */
109 	WDC_SN840_VSD_DEF_USER_CAP	= 0x04,		/* uint64_t */
110 	WDC_SN840_VSD_MAX_USER_CAP	= 0x05,		/* uint64_t */
111 	WDC_SN840_VSD_MIN_USER_CAP	= 0x06,		/* uint64_t */
112 	WDC_SN840_VSD_NAME		= 0x07,		/* CBS */
113 	WDC_SN840_VSD_LOG_SUP		= 0x08,		/* CBS */
114 	WDC_SN840_VSD_FEAT_SUP		= 0x09,		/* CBS */
115 	WDC_SN840_VSD_FORM_FACTOR	= 0x0a,		/* uint32_t */
116 	WDC_SN840_VSD_RESIZE_GRAN	= 0x0b,		/* uint64_t */
117 	WDC_SN840_VSD_NS_ALLOC_SIZE	= 0x0c,		/* uint64_t */
118 	WDC_SN840_VSD_NS_REG_AVAIL	= 0x0d,		/* uint64_t */
119 	WDC_SN840_VSD_RAW_NVM		= 0x0e,		/* uint64_t */
120 	WDC_SN840_VSD_PORT_CFG_STS	= 0x0f,		/* uint32_t */
121 	WDC_SN840_VSD_MPN		= 0x10,		/* CBS */
122 	WDC_SN840_VSD_SN		= 0x11,		/* CBS */
123 	WDC_SN840_VSD_DEF_NS_ATTRS	= 0x12,		/* uint32_t */
124 	WDC_SN840_VSD_GIT_DESCR		= 0x13,		/* CBS */
125 	WDC_SN840_VSD_SMB_BL		= 0x14,		/* CBS */
126 	WDC_SN840_VSD_CUST_ID		= 0x15,		/* uint32_t */
127 	WDC_SN840_VSD_PROD_DESC		= 0x16,		/* CBS */
128 	WDC_SN840_VSD_TMM_VER		= 0x17,		/* CBS */
129 	WDC_SN840_VSD_THERM_THROT_STS	= 0x18,		/* uint32_t */
130 	WDC_SN840_VSD_ASSERT_DUMP	= 0x19,		/* uint32_t */
131 	WDC_SN840_VSD_CUST_EOL_STS	= 0x1a,		/* uint32_t */
132 	WDC_SN840_VSD_IFS_EOL_STS	= 0x1b,		/* uint32_t */
133 	WDC_SN840_VSD_CUST_EOL_STATE	= 0x1c,		/* uint32_t */
134 	WDC_SN840_VSD_IFS_EOL_STATE	= 0x1d,		/* uint32_t */
135 	WDC_SN840_VSD_FCR		= 0x1e,		/* uint32_t */
136 	WDC_SN840_VSD_VCA_BPC_REV	= 0x1f,		/* uint32_t */
137 	WDC_SN840_VSD_VCA_BPC_MIN_REV	= 0x20,		/* uint32_t */
138 	WDC_SN840_VSD_VCA_BPC_RST_SEQ	= 0x21,		/* uint32_t */
139 	WDC_SN840_VSD_VCA_TPC_RST_SEQ	= 0x22,		/* uint32_t */
140 	WDC_SN840_VSD_VCA_TPC_FSS_SEQ	= 0x23		/* uint32_t */
141 } wdc_sn840_vsd_id_t;
142 
143 typedef enum {
144 	WDC_SN840_VSD_NS_LIDS		= 0x08,		/* CBS */
145 	WDC_SN840_VSD_NS_FIDS		= 0x09		/* CBS */
146 } wdc_sn840_vsd_ns_id_t;
147 
148 typedef enum {
149 	WDC_SN840_TEMP_NAND	= 0,
150 	WDC_SN840_TEMP_BOARD,
151 	WDC_SN840_TEMP_FE,
152 	WDC_SN840_TEMP_FM0,
153 	WDC_SN840_TEMP_FM1,
154 	WDC_SN840_TEMP_AVG_NAND,
155 	WDC_SN840_TEMP_AVG_FE,
156 	WDC_SN840_TEMP_MAX_ASIC,
157 	WDC_SN840_TEMP_TOUCH,
158 	WDC_SN840_TEMP_COMP,
159 	WDC_SN840_TEMP_NSMAPLES
160 } wdc_sn840_temp_sample_t;
161 
162 /*
163  * These are structures for the firmware activation log. The first structure is
164  * an individual entry. The second is the header which points to these. The data
165  * is versioned and the entries have a specific size, but right now we only know
166  * of the one.
167  */
168 typedef struct {
169 	uint32_t	fah_ent_no;
170 	uint32_t	fah_pow_cyc;
171 	uint64_t	fah_pow_sec;
172 	uint64_t	fah_cur_fw_ver;
173 	uint64_t	fah_new_fw_ver;
174 	uint8_t		fah_slot_no;
175 	uint8_t		fah_commit_type;
176 	uint16_t	fah_result;
177 	uint8_t		fah_rsvd[12];
178 } wdc_vul_sn840_fw_act_ent_t;
179 
180 CTASSERT(sizeof (wdc_vul_sn840_fw_act_ent_t) == 48);
181 
182 typedef struct {
183 	uint8_t		fah_hdr[4];
184 	uint8_t		fah_vers;
185 	uint8_t		fah_rsvd0;
186 	uint8_t		fah_nent;
187 	uint8_t		fah_rsvd1;
188 	uint32_t	fah_entlen;
189 	uint32_t	fah_rsvd;
190 } wdc_vul_sn840_fw_act_hdr_t;
191 
192 CTASSERT(sizeof (wdc_vul_sn840_fw_act_hdr_t) == 16);
193 
194 typedef struct {
195 	uint8_t		cbi_hdr[8];
196 	uint32_t	cbi_cust_id;
197 	uint16_t	cbi_vers_id;
198 	uint16_t	cbi_rev_id;
199 	uint32_t	cbi_build_id;
200 	uint8_t		cbi_nand_head[8];
201 	uint32_t	cbi_cust_nand_id;
202 	uint16_t	cbi_nand_vers_id;
203 	uint16_t	cbi_nand_rev_id;
204 } wdc_vul_sn840_ccds_info_t;
205 
206 CTASSERT(sizeof (wdc_vul_sn840_ccds_info_t) == 36);
207 
208 #pragma	pack()	/* pack(1) */
209 
210 #ifdef __cplusplus
211 }
212 #endif
213 
214 #endif /* _SYS_NVME_WDC_SN840_H */
215