Searched refs:UNM_PCIX_PS_REG (Results 1 – 4 of 4) sorted by relevance
84 #define ISR_INT_TARGET_STATUS (UNM_PCIX_PS_REG(PCIX_TARGET_STATUS))85 #define ISR_INT_TARGET_STATUS_F1 (UNM_PCIX_PS_REG(PCIX_TARGET_STATUS_F1))86 #define ISR_INT_TARGET_STATUS_F2 (UNM_PCIX_PS_REG(PCIX_TARGET_STATUS_F2))87 #define ISR_INT_TARGET_STATUS_F3 (UNM_PCIX_PS_REG(PCIX_TARGET_STATUS_F3))88 #define ISR_INT_TARGET_STATUS_F4 (UNM_PCIX_PS_REG(PCIX_TARGET_STATUS_F4))89 #define ISR_INT_TARGET_STATUS_F5 (UNM_PCIX_PS_REG(PCIX_TARGET_STATUS_F5))90 #define ISR_INT_TARGET_STATUS_F6 (UNM_PCIX_PS_REG(PCIX_TARGET_STATUS_F6))91 #define ISR_INT_TARGET_STATUS_F7 (UNM_PCIX_PS_REG(PCIX_TARGET_STATUS_F7))93 #define ISR_INT_TARGET_MASK (UNM_PCIX_PS_REG(PCIX_TARGET_MASK))94 #define ISR_INT_TARGET_MASK_F1 (UNM_PCIX_PS_REG(PCIX_TARGET_MASK_F1))[all …]
165 #define D3_CRB_REG_FUN2 (UNM_PCIX_PS_REG(0x2084))166 #define D3_CRB_REG_FUN3 (UNM_PCIX_PS_REG(0x3084))
542 #define D3_CRB_REG_FUN0 (UNM_PCIX_PS_REG(0x0084))543 #define D3_CRB_REG_FUN1 (UNM_PCIX_PS_REG(0x1084))544 #define D3_CRB_REG_FUN2 (UNM_PCIX_PS_REG(0x2084))545 #define D3_CRB_REG_FUN3 (UNM_PCIX_PS_REG(0x3084))548 #define ISR_I2Q_CLR_PCI_LO (UNM_PCIX_PS_REG(UNM_I2Q_CLR_PCI_LO))549 #define ISR_I2Q_CLR_PCI_HI (UNM_PCIX_PS_REG(UNM_I2Q_CLR_PCI_HI))1276 #define UNM_PCIX_PS_REG(reg) (UNM_CRB_PCIX_MD + (reg)) macro
680 #define D3_CRB_REG_FUN0 (UNM_PCIX_PS_REG(0x0084))681 #define D3_CRB_REG_FUN1 (UNM_PCIX_PS_REG(0x1084))682 #define D3_CRB_REG_FUN2 (UNM_PCIX_PS_REG(0x2084))683 #define D3_CRB_REG_FUN3 (UNM_PCIX_PS_REG(0x3084))686 #define ISR_I2Q_CLR_PCI_LO (UNM_PCIX_PS_REG(UNM_I2Q_CLR_PCI_LO))687 #define ISR_I2Q_CLR_PCI_HI (UNM_PCIX_PS_REG(UNM_I2Q_CLR_PCI_HI))895 #define UNM_PCIX_PS_REG(reg) (UNM_CRB_PCIX_MD + (reg)) macro1037 #define ISR_INT_TARGET_STATUS (UNM_PCIX_PS_REG(PCIX_TARGET_STATUS))1038 #define ISR_INT_TARGET_STATUS_F1 (UNM_PCIX_PS_REG(PCIX_TARGET_STATUS_F1))1039 #define ISR_INT_TARGET_STATUS_F2 (UNM_PCIX_PS_REG(PCIX_TARGET_STATUS_F2))[all …]