| /illumos-gate/usr/src/uts/common/io/hxge/ |
| H A D | hpi_txdma.c | 48 TXDMA_REG_WRITE64(handle, TDC_PAGE_HANDLE, channel, hdl_p->value); in hpi_txdma_log_page_handle_set()
105 TXDMA_REG_WRITE64(handle, TDC_TDR_CFG, channel, cfg.value); in hpi_txdma_channel_control()
112 TXDMA_REG_WRITE64(handle, TDC_TDR_CFG, channel, cfg.value); in hpi_txdma_channel_control()
122 TXDMA_REG_WRITE64(handle, TDC_TDR_CFG, channel, cfg.value); in hpi_txdma_channel_control()
129 TXDMA_REG_WRITE64(handle, TDC_TDR_CFG, channel, cfg.value); in hpi_txdma_channel_control()
136 TXDMA_REG_WRITE64(handle, TDC_TDR_CFG, channel, cfg.value); in hpi_txdma_channel_control()
151 TXDMA_REG_WRITE64(handle, TDC_STAT, channel, cs.value); in hpi_txdma_channel_control()
183 TXDMA_REG_WRITE64(handle, TDC_STAT, channel, cs_p->value); in hpi_txdma_control_status()
188 TXDMA_REG_WRITE64(handle, TDC_STAT, channel, in hpi_txdma_control_status()
221 TXDMA_REG_WRITE64(handle, TDC_INT_MASK, channel, mask_p->value); in hpi_txdma_event_mask()
[all …]
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| H A D | hpi_txdma.h | 55 #define TXDMA_REG_WRITE64(handle, reg, channel, data) \ macro
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| H A D | hxge_txdma.c | 175 TXDMA_REG_WRITE64(handle, TDC_TDR_KICK, channel, 0); in hxge_reset_txdma_channel()
2641 TXDMA_REG_WRITE64(hxgep->hpi_handle, TDC_STAT_INT_DBG, channel, 0); in hxge_tx_err_evnts()
2774 TXDMA_REG_WRITE64(handle, TDC_TDR_KICK, channel, 0); in hxge_txdma_fatal_err_recover()
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| H A D | hxge_send.c | 767 TXDMA_REG_WRITE64(HXGE_DEV_HPI_HANDLE(hxgep), in hxge_start()
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| /illumos-gate/usr/src/uts/common/io/nxge/npi/ |
| H A D | npi_tx_wr64.h | 35 static void TXDMA_REG_WRITE64(npi_handle_t, uint64_t, int, uint64_t);
36 #pragma inline(TXDMA_REG_WRITE64)
120 TXDMA_REG_WRITE64( in TXDMA_REG_WRITE64() function
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| H A D | npi_txdma.c | 223 TXDMA_REG_WRITE64(handle, tdc_dmc_offset[i], tdc, value); in npi_txdma_tdc_regs_zero()
933 TXDMA_REG_WRITE64(handle, TX_CS_REG, channel, cs.value); in npi_txdma_channel_control()
938 TXDMA_REG_WRITE64(handle, TX_CS_REG, channel, cs.value); in npi_txdma_channel_control()
948 TXDMA_REG_WRITE64(handle, TX_CS_REG, channel, cs.value); in npi_txdma_channel_control()
955 TXDMA_REG_WRITE64(handle, TX_CS_REG, channel, cs.value); in npi_txdma_channel_control()
962 TXDMA_REG_WRITE64(handle, TX_CS_REG, channel, cs.value); in npi_txdma_channel_control()
975 TXDMA_REG_WRITE64(handle, TX_CS_REG, channel, cs.value); in npi_txdma_channel_control()
982 TXDMA_REG_WRITE64(handle, TX_CS_REG, channel, cs.value); in npi_txdma_channel_control()
992 TXDMA_REG_WRITE64(handle, TX_CS_REG, channel, cs.value); in npi_txdma_channel_control()
1051 TXDMA_REG_WRITE64(handle, TX_CS_REG, channel, cs_p->value); in npi_txdma_control_status()
[all …]
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| /illumos-gate/usr/src/uts/common/io/nxge/ |
| H A D | nxge_txdma.c | 288 TXDMA_REG_WRITE64(handle, TX_RING_KICK_REG, channel, 0); in nxge_reset_txdma_channel()
3261 TXDMA_REG_WRITE64(nxgep->npi_handle, TDMC_INTR_DBG_REG, channel, 0); in nxge_tx_err_evnts()
3332 TXDMA_REG_WRITE64(handle, TX_RING_KICK_REG, channel, 0); in nxge_txdma_fatal_err_recover()
3513 TXDMA_REG_WRITE64(handle, TX_RING_KICK_REG, tdc, 0); in nxge_tx_port_fatal_err_recover()
3673 TXDMA_REG_WRITE64(nxgep->npi_handle, TDMC_INTR_DBG_REG, in nxge_txdma_inject_err()
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| H A D | nxge_send.c | 995 TXDMA_REG_WRITE64( in nxge_start()
1038 TXDMA_REG_WRITE64(NXGE_DEV_NPI_HANDLE(nxgep), in nxge_start()
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