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Searched refs:REG (Results 1 – 19 of 19) sorted by relevance

/illumos-gate/usr/src/uts/sun4u/sys/
H A Depic.h95 #define EPIC_READ(HANDLE, REG, LHS, ADDR)\ argument
98 (uint8_t *)(REG)+\
102 (uint8_t *)(REG)+\
105 #define EPIC_WRITE(HANDLE, REG, ADDR, MASK, DATA)\ argument
108 (uint8_t *)(REG)+\
112 (uint8_t *)(REG)+\
116 (uint8_t *)(REG)+\
123 #define EPIC_RD(HANDLE, REG, LHS)\ argument
126 (uint8_t *)(REG)+\
129 #define EPIC_WR(HANDLE, REG, DATA)\ argument
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/illumos-gate/usr/src/cmd/picl/plugins/sun4u/daktari/conf/
H A Dpsvcobj.conf89 …1,VERSION=0,ACTIVE_LOW=0,BIT_NUM=1,INVERT=0,PORT=2,BITSHIFT=1,BYTEMASK=0x2,REG=0,TYPE=7,BUSADDR=0x…
100 …,VERSION=0,ACTIVE_LOW=1,BIT_NUM=6,INVERT=0,PORT=0,BITSHIFT=6,BYTEMASK=0x40,REG=0,TYPE=7,BUSADDR=0x…
101 …,VERSION=0,ACTIVE_LOW=1,BIT_NUM=7,INVERT=0,PORT=0,BITSHIFT=7,BYTEMASK=0x80,REG=0,TYPE=7,BUSADDR=0x…
102 …1,VERSION=0,ACTIVE_LOW=1,BIT_NUM=0,INVERT=0,PORT=1,BITSHIFT=0,BYTEMASK=0x1,REG=0,TYPE=7,BUSADDR=0x…
103 …1,VERSION=0,ACTIVE_LOW=1,BIT_NUM=1,INVERT=1,PORT=1,BITSHIFT=1,BYTEMASK=0x2,REG=0,TYPE=7,BUSADDR=0x…
104 …1,VERSION=0,ACTIVE_LOW=1,BIT_NUM=2,INVERT=0,PORT=1,BITSHIFT=2,BYTEMASK=0x4,REG=0,TYPE=7,BUSADDR=0x…
105 …1,VERSION=0,ACTIVE_LOW=1,BIT_NUM=3,INVERT=0,PORT=1,BITSHIFT=3,BYTEMASK=0x8,REG=0,TYPE=7,BUSADDR=0x…
106 …1,VERSION=0,ACTIVE_LOW=1,BIT_NUM=0,INVERT=0,PORT=0,BITSHIFT=0,BYTEMASK=0x1,REG=0,TYPE=5,BUSADDR=0x…
107 …1,VERSION=0,ACTIVE_LOW=1,BIT_NUM=1,INVERT=1,PORT=0,BITSHIFT=1,BYTEMASK=0x2,REG=0,TYPE=5,BUSADDR=0x…
108 …1,VERSION=0,ACTIVE_LOW=1,BIT_NUM=2,INVERT=0,PORT=0,BITSHIFT=2,BYTEMASK=0x4,REG=0,TYPE=5,BUSADDR=0x…
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/illumos-gate/usr/src/cmd/picl/plugins/sun4u/silverstone/conf/
H A Dpsvcobj.conf89 …1,VERSION=0,ACTIVE_LOW=0,BIT_NUM=1,INVERT=0,PORT=2,BITSHIFT=1,BYTEMASK=0x2,REG=0,TYPE=7,BUSADDR=0x…
100 …,VERSION=0,ACTIVE_LOW=1,BIT_NUM=6,INVERT=0,PORT=0,BITSHIFT=6,BYTEMASK=0x40,REG=0,TYPE=7,BUSADDR=0x…
101 …,VERSION=0,ACTIVE_LOW=1,BIT_NUM=7,INVERT=0,PORT=0,BITSHIFT=7,BYTEMASK=0x80,REG=0,TYPE=7,BUSADDR=0x…
102 …1,VERSION=0,ACTIVE_LOW=1,BIT_NUM=0,INVERT=0,PORT=1,BITSHIFT=0,BYTEMASK=0x1,REG=0,TYPE=7,BUSADDR=0x…
103 …1,VERSION=0,ACTIVE_LOW=1,BIT_NUM=1,INVERT=1,PORT=1,BITSHIFT=1,BYTEMASK=0x2,REG=0,TYPE=7,BUSADDR=0x…
104 …1,VERSION=0,ACTIVE_LOW=1,BIT_NUM=2,INVERT=0,PORT=1,BITSHIFT=2,BYTEMASK=0x4,REG=0,TYPE=7,BUSADDR=0x…
105 …1,VERSION=0,ACTIVE_LOW=1,BIT_NUM=3,INVERT=0,PORT=1,BITSHIFT=3,BYTEMASK=0x8,REG=0,TYPE=7,BUSADDR=0x…
106 …1,VERSION=0,ACTIVE_LOW=1,BIT_NUM=0,INVERT=0,PORT=0,BITSHIFT=0,BYTEMASK=0x1,REG=0,TYPE=5,BUSADDR=0x…
107 …1,VERSION=0,ACTIVE_LOW=1,BIT_NUM=1,INVERT=1,PORT=0,BITSHIFT=1,BYTEMASK=0x2,REG=0,TYPE=5,BUSADDR=0x…
108 …1,VERSION=0,ACTIVE_LOW=1,BIT_NUM=2,INVERT=0,PORT=0,BITSHIFT=2,BYTEMASK=0x4,REG=0,TYPE=5,BUSADDR=0x…
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/illumos-gate/usr/src/cmd/picl/plugins/sun4u/cherrystone/conf/
H A Dpsvcobj.conf93 …1,VERSION=0,ACTIVE_LOW=1,BIT_NUM=2,INVERT=0,PORT=1,BITSHIFT=2,BYTEMASK=0x4,REG=0,TYPE=7,BUSADDR=0x…
94 …1,VERSION=0,ACTIVE_LOW=1,BIT_NUM=3,INVERT=0,PORT=1,BITSHIFT=3,BYTEMASK=0x8,REG=0,TYPE=7,BUSADDR=0x…
95 …1,VERSION=0,ACTIVE_LOW=1,BIT_NUM=0,INVERT=0,PORT=2,BITSHIFT=0,BYTEMASK=0x1,REG=0,TYPE=7,BUSADDR=0x…
96 …1,VERSION=0,ACTIVE_LOW=1,BIT_NUM=1,INVERT=0,PORT=2,BITSHIFT=1,BYTEMASK=0x2,REG=0,TYPE=7,BUSADDR=0x…
97 …1,VERSION=0,ACTIVE_LOW=1,BIT_NUM=2,INVERT=0,PORT=2,BITSHIFT=2,BYTEMASK=0x4,REG=0,TYPE=7,BUSADDR=0x…
98 …,VERSION=0,ACTIVE_LOW=1,BIT_NUM=4,INVERT=0,PORT=1,BITSHIFT=4,BYTEMASK=0x10,REG=0,TYPE=7,BUSADDR=0x…
99 …1,VERSION=0,ACTIVE_LOW=1,BIT_NUM=0,INVERT=0,PORT=2,BITSHIFT=0,BYTEMASK=0x1,REG=0,TYPE=7,BUSADDR=0x…
100 …1,VERSION=0,ACTIVE_LOW=1,BIT_NUM=1,INVERT=0,PORT=2,BITSHIFT=1,BYTEMASK=0x2,REG=0,TYPE=7,BUSADDR=0x…
101 …1,VERSION=0,ACTIVE_LOW=1,BIT_NUM=2,INVERT=0,PORT=2,BITSHIFT=2,BYTEMASK=0x4,REG=0,TYPE=7,BUSADDR=0x…
102 …1,VERSION=0,ACTIVE_LOW=0,BIT_NUM=0,INVERT=0,PORT=2,BITSHIFT=6,BYTEMASK=0x0,REG=0,TYPE=7,BUSADDR=0x…
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/illumos-gate/usr/src/cmd/picl/plugins/sun4u/sebring/conf/
H A Dpsvcobj.conf93 …1,VERSION=0,ACTIVE_LOW=1,BIT_NUM=2,INVERT=0,PORT=1,BITSHIFT=2,BYTEMASK=0x4,REG=0,TYPE=7,BUSADDR=0x…
94 …1,VERSION=0,ACTIVE_LOW=1,BIT_NUM=3,INVERT=0,PORT=1,BITSHIFT=3,BYTEMASK=0x8,REG=0,TYPE=7,BUSADDR=0x…
95 …1,VERSION=0,ACTIVE_LOW=1,BIT_NUM=0,INVERT=0,PORT=2,BITSHIFT=0,BYTEMASK=0x1,REG=0,TYPE=7,BUSADDR=0x…
96 …1,VERSION=0,ACTIVE_LOW=1,BIT_NUM=1,INVERT=0,PORT=2,BITSHIFT=1,BYTEMASK=0x2,REG=0,TYPE=7,BUSADDR=0x…
97 …1,VERSION=0,ACTIVE_LOW=1,BIT_NUM=2,INVERT=0,PORT=2,BITSHIFT=2,BYTEMASK=0x4,REG=0,TYPE=7,BUSADDR=0x…
98 …,VERSION=0,ACTIVE_LOW=1,BIT_NUM=4,INVERT=0,PORT=1,BITSHIFT=4,BYTEMASK=0x10,REG=0,TYPE=7,BUSADDR=0x…
99 …1,VERSION=0,ACTIVE_LOW=1,BIT_NUM=0,INVERT=0,PORT=2,BITSHIFT=0,BYTEMASK=0x1,REG=0,TYPE=7,BUSADDR=0x…
100 …1,VERSION=0,ACTIVE_LOW=1,BIT_NUM=1,INVERT=0,PORT=2,BITSHIFT=1,BYTEMASK=0x2,REG=0,TYPE=7,BUSADDR=0x…
101 …1,VERSION=0,ACTIVE_LOW=1,BIT_NUM=2,INVERT=0,PORT=2,BITSHIFT=2,BYTEMASK=0x4,REG=0,TYPE=7,BUSADDR=0x…
102 …1,VERSION=0,ACTIVE_LOW=0,BIT_NUM=0,INVERT=0,PORT=2,BITSHIFT=6,BYTEMASK=0x0,REG=0,TYPE=7,BUSADDR=0x…
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/illumos-gate/usr/src/uts/common/fs/zfs/
H A Dvdev_raidz_math_avx2.c36 #define VR0_(REG, ...) "ymm"#REG argument
37 #define VR1_(_1, REG, ...) "ymm"#REG argument
38 #define VR2_(_1, _2, REG, ...) "ymm"#REG argument
39 #define VR3_(_1, _2, _3, REG, ...) "ymm"#REG argument
40 #define VR4_(_1, _2, _3, _4, REG, ...) "ymm"#REG argument
41 #define VR5_(_1, _2, _3, _4, _5, REG, ...) "ymm"#REG argument
42 #define VR6_(_1, _2, _3, _4, _5, _6, REG, ...) "ymm"#REG argument
43 #define VR7_(_1, _2, _3, _4, _5, _6, _7, REG, ...) "ymm"#REG argument
56 #define R_23(REG...) _R_23(REG, 1, 2, 3) argument
H A Dvdev_raidz_math_ssse3.c37 #define VR0_(REG, ...) "xmm"#REG argument
38 #define VR1_(_1, REG, ...) "xmm"#REG argument
39 #define VR2_(_1, _2, REG, ...) "xmm"#REG argument
40 #define VR3_(_1, _2, _3, REG, ...) "xmm"#REG argument
41 #define VR4_(_1, _2, _3, _4, REG, ...) "xmm"#REG argument
42 #define VR5_(_1, _2, _3, _4, _5, REG, ...) "xmm"#REG argument
43 #define VR6_(_1, _2, _3, _4, _5, _6, REG, ...) "xmm"#REG argument
44 #define VR7_(_1, _2, _3, _4, _5, _6, _7, REG, ...) "xmm"#REG argument
57 #define R_23(REG...) _R_23(REG, 1, 2, 3) argument
H A Dvdev_raidz_math_sse2.c38 #define VR0_(REG, ...) "xmm"#REG argument
39 #define VR1_(_1, REG, ...) "xmm"#REG argument
40 #define VR2_(_1, _2, REG, ...) "xmm"#REG argument
41 #define VR3_(_1, _2, _3, REG, ...) "xmm"#REG argument
42 #define VR4_(_1, _2, _3, _4, REG, ...) "xmm"#REG argument
43 #define VR5_(_1, _2, _3, _4, _5, REG, ...) "xmm"#REG argument
44 #define VR6_(_1, _2, _3, _4, _5, _6, REG, ...) "xmm"#REG argument
45 #define VR7_(_1, _2, _3, _4, _5, _6, _7, REG, ...) "xmm"#REG argument
/illumos-gate/usr/src/cmd/picl/plugins/sun4u/littleneck/conf/
H A Dpsvcobj.conf83 …1,VERSION=0,ACTIVE_LOW=1,BIT_NUM=0,INVERT=0,PORT=0,BITSHIFT=0,BYTEMASK=0x1,REG=0,TYPE=5,BUSADDR=0x…
84 …1,VERSION=0,ACTIVE_LOW=1,BIT_NUM=1,INVERT=1,PORT=0,BITSHIFT=1,BYTEMASK=0x2,REG=0,TYPE=5,BUSADDR=0x…
85 …1,VERSION=0,ACTIVE_LOW=1,BIT_NUM=2,INVERT=0,PORT=0,BITSHIFT=2,BYTEMASK=0x4,REG=0,TYPE=5,BUSADDR=0x…
86 …1,VERSION=0,ACTIVE_LOW=1,BIT_NUM=3,INVERT=0,PORT=0,BITSHIFT=3,BYTEMASK=0x8,REG=0,TYPE=5,BUSADDR=0x…
87 …,VERSION=0,ACTIVE_LOW=0,BIT_NUM=5,INVERT=0,PORT=0,BITSHIFT=5,BYTEMASK=0x20,REG=0,TYPE=5,BUSADDR=0x…
88 …,VERSION=0,ACTIVE_LOW=0,BIT_NUM=6,INVERT=0,PORT=0,BITSHIFT=6,BYTEMASK=0x40,REG=0,TYPE=5,BUSADDR=0x…
90 …,VERSION=0,ACTIVE_LOW=1,BIT_NUM=7,INVERT=0,PORT=0,BITSHIFT=7,BYTEMASK=0x80,REG=0,TYPE=5,BUSADDR=0x…
91 …,VERSION=0,ACTIVE_LOW=1,BIT_NUM=4,INVERT=0,PORT=0,BITSHIFT=4,BYTEMASK=0x10,REG=0,TYPE=5,BUSADDR=0x…
92 …,VERSION=0,ACTIVE_LOW=1,BIT_NUM=4,INVERT=0,PORT=0,BITSHIFT=4,BYTEMASK=0x10,REG=0,TYPE=5,BUSADDR=0x…
95 …1,VERSION=0,ACTIVE_LOW=1,BIT_NUM=0,INVERT=0,PORT=0,BITSHIFT=0,BYTEMASK=0x1,REG=0,TYPE=5,BUSADDR=0x…
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/illumos-gate/usr/src/uts/sun4v/sys/
H A Dmachasi.h64 #define MMU_FAULT_STATUS_AREA(REG) \ argument
65 ldxa [%g0]ASI_SCRATCHPAD, REG
/illumos-gate/usr/src/lib/libslp/javalib/com/sun/slp/
H A DPermSARegTable.java60 private final static int REG = 1; field in PermSARegTable
135 send((SrvLocMsg)rec[REG]); in walk()
/illumos-gate/usr/src/uts/intel/ml/
H A Dcopy.S1675 #define FUWORD(NAME, INSTR, REG, COPYOP, DISNUM, EN1, EN2) \ argument
1683 INSTR (%rdi), REG; \
1685 INSTR REG, (%rsi); \
1719 #define SUWORD(NAME, INSTR, REG, COPYOP, DISNUM, EN1, EN2) \ argument
1727 INSTR REG, (%rdi); \
1753 #define FUWORD_NOERR(NAME, INSTR, REG) \ argument
1757 INSTR (%rdi), REG; \
1758 INSTR REG, (%rsi); \
1769 #define SUWORD_NOERR(NAME, INSTR, REG) \ argument
1773 INSTR REG, (%rdi); \
/illumos-gate/usr/src/cmd/geniconvtbl/
H A Dgeniconvtbl.c147 #define REG(n) (*(ist->regs + (n))) macro
1144 REG(expr0->data.itm_exnum) : \ in eval_op()
1222 c = REG(expr->data.itm_exnum); in eval_op()
1440 #define EVAL_EXPR_R(n) (REG((itm_num_t)(expr->data.operand[(n)].itm_ptr))) in eval_expr()
1452 REG(expr0->data.itm_exnum) : \ in eval_expr()
1544 return (REG(expr->data.itm_exnum)); in eval_expr()
/illumos-gate/usr/src/cmd/cmd-inet/usr.sbin/snoop/
H A Dsnoop_mip.c47 enum EXT_TYPE { ADV, REG }; enumerator
626 fraglen = interpret_extensions(regext_data, regext_size, REG); in interpret_mip_cntrlmsg()
/illumos-gate/usr/src/uts/sun4v/ml/
H A Dtrap_table.S1905 #define STDF_REG(REG, ADDR, TMP) \ argument
1906 sll REG, 3, REG ;\
1908 jmp REG + TMP ;\
1976 #define LDDF_REG(REG, ADDR, TMP) \ argument
1977 sll REG, 3, REG ;\
1979 jmp REG + TMP ;\
/illumos-gate/usr/src/uts/sun4u/ml/
H A Dtrap_table.S2138 #define STDF_REG(REG, ADDR, TMP) \ argument
2139 sll REG, 3, REG ;\
2141 jmp REG + TMP ;\
2209 #define LDDF_REG(REG, ADDR, TMP) \ argument
2210 sll REG, 3, REG ;\
2212 jmp REG + TMP ;\
/illumos-gate/usr/src/uts/common/io/qede/579xx/drivers/ecore/documentation/
H A Decore.tex399 \item \myindex{REG\_RD}
400 \item \myindex{REG\_WR}
443 …nitialized those before calling this function, and must guarantee that its REG\_WR/RD functions ac…
516 Following this, REG\_RD/REG\_WR are no longer operational - upper layer can disable the PCI BAR.
/illumos-gate/usr/src/uts/common/io/qede/579xx/drivers/ecore/
H A Drelease.txt1003 in REG FIFO.
/illumos-gate/usr/src/uts/intel/io/acpica/
H A Dchanges.txt16333 execution of the various _INI and REG methods.