Searched refs:PCI_CBUS_MEM_LIMIT0 (Results 1 – 2 of 2) sorted by relevance
135 #define PCI_CBUS_MEM_LIMIT0 0x20 /* Memory limit reg 0, 4 bytes */ macro
1598 pci_config_put32(handle, PCI_CBUS_MEM_LIMIT0, in cardbus_update_bridge()4172 pci_config_put32(config_handle, PCI_CBUS_MEM_LIMIT0, 0);4435 pci_config_get32(config_handle, PCI_CBUS_MEM_LIMIT0));