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Searched refs:NIG_REG_EGRESS_DRAIN0_MODE (Results 1 – 2 of 2) sorted by relevance

/illumos-gate/usr/src/uts/common/io/bnxe/577xx/common/
H A Dbnxe_clc.c7364 REG_WR(cb, NIG_REG_EGRESS_DRAIN0_MODE + port*4, 1); in elink_update_link_down()
7478 REG_WR(cb, NIG_REG_EGRESS_DRAIN0_MODE + port*4, 0); in elink_update_link_up()
7711 REG_WR(cb, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, in elink_link_update()
13722 REG_WR(cb, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0); in elink_init_emul()
13786 REG_WR(cb, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0); in elink_init_fpga()
13811 REG_WR(cb, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0); in elink_init_bmac_loopback()
13830 REG_WR(cb, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0); in elink_init_emac_loopback()
13856 REG_WR(cb, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0); in elink_init_xmac_loopback()
13871 REG_WR(cb, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0); in elink_init_umac_loopback()
13921 REG_WR(cb, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0); in elink_init_xgxs_loopback()
[all …]
/illumos-gate/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/
H A D57712_reg.h6911 #define NIG_REG_EGRESS_DRAIN0_MODE macro