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Searched refs:MISC_REG_RESET_PL_UA (Results 1 – 7 of 7) sorted by relevance

/illumos-gate/usr/src/uts/common/io/qede/579xx/hsi/hw/
H A Dmisc_bits.h113 #define MISC_REG_RESET_PL_UA_SET (MISC_REG_RESET_PL_UA + 4)
114 #define MISC_REG_RESET_PL_UA_CLEAR (MISC_REG_RESET_PL_UA + 8)
H A Dreg_addr_ah_compile15.h29939 #define MISC_REG_RESET_PL_UA … macro
H A Dreg_addr_e5.h33415 #define MISC_REG_RESET_PL_UA … macro
H A Dreg_addr_k2.h33415 #define MISC_REG_RESET_PL_UA … macro
H A Dreg_addr_bb.h33415 #define MISC_REG_RESET_PL_UA … macro
H A Dreg_addr.h33447 #define MISC_REG_RESET_PL_UA … macro
/illumos-gate/usr/src/uts/common/io/qede/579xx/drivers/ecore/
H A Decore_dbg_fw_funcs.c1736 { MISC_REG_RESET_PL_UA, 0x0, { true, true } },