Searched refs:MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1 (Results 1 – 2 of 2) sorted by relevance
618 #define MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1 0x8300 macro
4152 MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1, 0x10); in elink_warpcore_enable_AN_KR()4283 MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1, in elink_warpcore_set_10G_XFI()4343 MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1, 0xd); in elink_warpcore_set_10G_XFI()4531 MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1, &digctrl_kx1); in elink_warpcore_set_sgmii_speed()4538 MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1, in elink_warpcore_set_sgmii_speed()4555 MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1, in elink_warpcore_set_sgmii_speed()4592 {MDIO_WC_DEVAD, MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1, in elink_warpcore_clear_regs()