Searched refs:MDIO_WC_REG_CL49_USERB0_CTRL (Results 1 – 2 of 2) sorted by relevance
633 #define MDIO_WC_REG_CL49_USERB0_CTRL 0x8368 macro
3957 MDIO_WC_REG_CL49_USERB0_CTRL, (3<<6)); in elink_warpcore_enable_AN_KR2()5223 MDIO_WC_REG_CL49_USERB0_CTRL, in elink_warpcore_set_dual_mode()