Searched refs:MDIO_REG_BANK_AER_BLOCK (Results 1 – 3 of 3) sorted by relevance
/illumos-gate/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/ |
H A D | phy_reg.h | 230 #define MDIO_REG_BANK_AER_BLOCK 0xFFD0 // Address Expansion Register macro
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H A D | clc_reg.h | 257 #define MDIO_REG_BANK_AER_BLOCK 0xFFD0 macro
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/illumos-gate/usr/src/uts/common/io/bnxe/577xx/common/ |
H A D | bnxe_clc.c | 3597 CL22_WR_OVER_CL45(cb, phy, MDIO_REG_BANK_AER_BLOCK, in elink_set_aer_mmd() 4021 CL22_WR_OVER_CL45(cb, phy, MDIO_REG_BANK_AER_BLOCK, in elink_warpcore_restart_AN_KR() 4076 CL22_WR_OVER_CL45(cb, phy, MDIO_REG_BANK_AER_BLOCK, in elink_warpcore_enable_AN_KR() 4137 CL22_WR_OVER_CL45(cb, phy, MDIO_REG_BANK_AER_BLOCK, in elink_warpcore_enable_AN_KR() 4207 CL22_WR_OVER_CL45(cb, phy, MDIO_REG_BANK_AER_BLOCK, in elink_warpcore_set_10G_KR() 4372 CL22_WR_OVER_CL45(cb, phy, MDIO_REG_BANK_AER_BLOCK, in elink_warpcore_set_20G_force_KR2() 4410 CL22_WR_OVER_CL45(cb, phy, MDIO_REG_BANK_AER_BLOCK, in elink_warpcore_set_20G_force_KR2() 4917 CL22_WR_OVER_CL45(cb, phy, MDIO_REG_BANK_AER_BLOCK, in elink_warpcore_link_reset() 4968 CL22_WR_OVER_CL45(cb, phy, MDIO_REG_BANK_AER_BLOCK, in elink_set_warpcore_loopback() 5176 CL22_WR_OVER_CL45(cb, phy, MDIO_REG_BANK_AER_BLOCK, in elink_warpcore_set_quad_mode() [all …]
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