1 /* 2 * Copyright 2014-2017 Cavium, Inc. 3 * The contents of this file are subject to the terms of the Common Development 4 * and Distribution License, v.1, (the "License"). 5 * 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the License at available 9 * at http://opensource.org/licenses/CDDL-1.0 10 * 11 * See the License for the specific language governing permissions and 12 * limitations under the License. 13 */ 14 15 #ifndef _LM_H 16 #define _LM_H 17 18 #include "lm_defs.h" 19 #include "listq.h" 20 21 22 23 /******************************************************************************* 24 * Constants. 25 ******************************************************************************/ 26 27 #define BAD_DEFAULT_VALUE 0xffffffff 28 29 #define ETHERNET_ADDRESS_SIZE 6 30 #define ETHERNET_PACKET_HEADER_SIZE 14 31 #define MIN_ETHERNET_PACKET_SIZE 60 32 #define MAX_ETHERNET_PACKET_SIZE 1514 33 #define MAX_ETHERNET_PACKET_BUFFER_SIZE 1536 /* A nice even number. */ 34 #define MIN_JMBO_ETHERNET_PACKET_SIZE 2014 35 #define MAX_JMBO_ETHERNET_PACKET_SIZE 9014 36 37 38 39 /******************************************************************************* 40 * Forward definition. 41 ******************************************************************************/ 42 43 /* Main device structure. */ 44 /* typedef struct _lm_device_t lm_device_t; */ 45 struct _lm_device_t; 46 47 /* Packet descriptor for sending/receiving packets. */ 48 /* typedef struct _lm_packet_t lm_packet_t; */ 49 struct _lm_packet_t; 50 51 52 53 /******************************************************************************* 54 * Mutlicast address table. 55 ******************************************************************************/ 56 57 #ifndef LM_MAX_MC_TABLE_SIZE 58 #define LM_MAX_MC_TABLE_SIZE 64 59 #endif 60 61 typedef struct _lm_mc_entry_t 62 { 63 u8_t mc_addr[ETHERNET_ADDRESS_SIZE]; 64 u16_t ref_cnt; 65 } lm_mc_entry_t; 66 67 typedef struct _lm_mc_table_t 68 { 69 u32_t entry_cnt; 70 lm_mc_entry_t addr_arr[LM_MAX_MC_TABLE_SIZE]; 71 } lm_mc_table_t; 72 73 74 75 /******************************************************************************* 76 * Network wake-up frame. 77 ******************************************************************************/ 78 79 #ifndef LM_NWUF_PATTERN_SIZE 80 #define LM_NWUF_PATTERN_SIZE 128 81 #endif 82 #define LM_NWUF_PATTERN_MASK_SIZE (LM_NWUF_PATTERN_SIZE/8) 83 84 /* Wake-up frame pattern. */ 85 typedef struct _lm_nwuf_pattern_t 86 { 87 u32_t size; /* Mask size. */ 88 u8_t mask[LM_NWUF_PATTERN_MASK_SIZE]; 89 u8_t pattern[LM_NWUF_PATTERN_SIZE]; 90 } lm_nwuf_t; 91 92 93 #ifndef LM_MAX_NWUF_CNT 94 #define LM_MAX_NWUF_CNT 7 95 #endif 96 97 #ifndef LM_MAX_NWUF_CNT_5709 98 #define LM_MAX_NWUF_CNT_5709 8 99 #endif 100 101 typedef struct _lm_nwuf_list_t 102 { 103 lm_nwuf_t nwuf_arr[LM_MAX_NWUF_CNT_5709]; 104 u32_t cnt; 105 } lm_nwuf_list_t; 106 107 108 109 /******************************************************************************* 110 * Interrupts. 111 ******************************************************************************/ 112 113 #define LM_NO_EVENT_ACTIVE 0x00000000 114 115 #define LM_TX0_EVENT_BIT 0 116 117 #define LM_TX0_EVENT_ACTIVE (1UL<<0) 118 #define LM_TX1_EVENT_ACTIVE (1UL<<1) 119 #define LM_TX2_EVENT_ACTIVE (1UL<<2) 120 #define LM_TX3_EVENT_ACTIVE (1UL<<3) 121 #define LM_TX4_EVENT_ACTIVE (1UL<<4) 122 #define LM_TX5_EVENT_ACTIVE (1UL<<5) 123 #define LM_TX6_EVENT_ACTIVE (1UL<<6) 124 #define LM_TX7_EVENT_ACTIVE (1UL<<7) 125 #define LM_TX8_EVENT_ACTIVE (1UL<<8) 126 #define LM_TX9_EVENT_ACTIVE (1UL<<9) 127 #define LM_TX10_EVENT_ACTIVE (1UL<<10) 128 #define LM_TX11_EVENT_ACTIVE (1UL<<11) 129 130 #define LM_TX_EVENT_MASK 0xfffUL 131 132 #define LM_RX0_EVENT_BIT 16 133 134 #define LM_RX0_EVENT_ACTIVE (1UL<<16) 135 #define LM_RX1_EVENT_ACTIVE (1UL<<17) 136 #define LM_RX2_EVENT_ACTIVE (1UL<<18) 137 #define LM_RX3_EVENT_ACTIVE (1UL<<19) 138 #define LM_RX4_EVENT_ACTIVE (1UL<<20) 139 #define LM_RX5_EVENT_ACTIVE (1UL<<21) 140 #define LM_RX6_EVENT_ACTIVE (1UL<<22) 141 #define LM_RX7_EVENT_ACTIVE (1UL<<23) 142 #define LM_RX8_EVENT_ACTIVE (1UL<<24) 143 #define LM_RX9_EVENT_ACTIVE (1UL<<25) 144 #define LM_RX10_EVENT_ACTIVE (1UL<<26) 145 #define LM_RX11_EVENT_ACTIVE (1UL<<27) 146 147 #define LM_RX_EVENT_MASK 0xfff0000UL 148 149 #define LM_PHY_CONFIG_CHANGED (1UL<<13) 150 #define LM_KWQ_EVENT_ACTIVE (1UL<<14) 151 #define LM_KCQ_EVENT_ACTIVE (1UL<<15) 152 #define LM_PHY_EVENT_ACTIVE (1UL<<30) 153 #define LM_KNOCK_KNOCK_EVENT (1UL<<31) 154 155 typedef u32_t lm_interrupt_status_t; 156 157 158 159 /******************************************************************************* 160 * Function prototypes. 161 ******************************************************************************/ 162 163 /* Description: 164 * 1. Retrieves the adapter information, such as IRQ, BAR, chip 165 * IDs, MAC address, etc. 166 * 2. Maps the BAR to system address space so hardware registers are 167 * accessible. 168 * 3. Initializes the default parameters in 'pdev'. 169 * 4. Reads user configurations. 170 * 5. Resets the transceiver. 171 * This routine calls the following mm routines: 172 * mm_map_io_base, mm_get_user_config. */ 173 lm_status_t 174 lm_get_dev_info( 175 struct _lm_device_t *pdev); 176 177 /* Description: 178 * This routine is called during driver initialization. It is responsible 179 * for allocating memory resources needed by the driver. Packet 180 * descriptors are allocated here and put into various queues. OS 181 * independent initialization of packets descriptors are done here and 182 * finished up in mm_init_packet_desc. 183 * This routine calls the following mm routines: 184 * mm_alloc_mem, mm_alloc_phys_mem, and mm_init_packet_desc. */ 185 lm_status_t 186 lm_init_resc( 187 struct _lm_device_t *pdev); 188 189 /* Description: 190 * This routine is responsible for stopping the hardware from running, 191 * cleaning up various request queues, aborting transmit requests, and 192 * reclaiming all the receive buffers. 193 * This routine calls the following mm routines: 194 * mm_indicate_tx, mm_free_rx_buf. */ 195 void 196 lm_abort( 197 struct _lm_device_t *pdev, 198 u32_t abort_op, 199 u32_t idx); 200 #define ABORT_OP_RX_CHAIN 1 201 #define ABORT_OP_TX_CHAIN 2 202 203 void 204 lm_recv_abort( 205 struct _lm_device_t *pdev, 206 u32_t idx); 207 208 void 209 lm_send_abort( 210 struct _lm_device_t *pdev, 211 u32_t idx); 212 213 /* Description: 214 * This routine is called to initialize the first stage of reset which 215 * only initializes all the device configurations; however states machines 216 * if any, are not enabled yet. */ 217 lm_status_t 218 lm_reset_setup( 219 struct _lm_device_t *pdev, 220 u32_t reset_reason); 221 222 /* Description: 223 * This routine finishes up the final stage of reset. Various state 224 * machines are enabled here. Upon exit, interrupt will not yet enabled 225 * and receive buffers are not queued. However, the chip is initialized 226 * and is ready to send and receive packets. 227 * receive buffers are not queued. */ 228 lm_status_t 229 lm_reset_run( 230 struct _lm_device_t *pdev); 231 232 /* Description: 233 * The main function of this routine is to reset and initialize the 234 * hardware. Upon exit, interrupt generation is not enable; however, 235 * the hardware is ready to accept transmit requests and receive receive 236 * packets. 'lm_abort' must be called prior to calling 'lm_reset'. 237 * This routine is a wrapper for lm_reset_setup and lm_reset_run. */ 238 lm_status_t 239 lm_reset( 240 struct _lm_device_t *pdev, 241 u32_t reset_reason); 242 243 /* Description: 244 * The main responsibility of this routine is to gracefully restore the 245 * chip to its initial power-on state. */ 246 void 247 lm_chip_reset( 248 struct _lm_device_t *pdev, 249 lm_reason_t reason); 250 251 /* Description: 252 * This routine post the indicate buffer or receive buffers in the 253 * free buffer pool. If 'packet' is null, all buffers in the free poll 254 * will be posted; otherwise, only the 'packet' will be posted. */ 255 #if defined(LM_NON_LEGACY_MODE_SUPPORT) 256 u32_t 257 lm_post_buffers( 258 struct _lm_device_t *pdev, 259 u32_t chain_idx, 260 struct _lm_packet_t *packet, 261 lm_frag_list_t *frags); 262 #else 263 u32_t 264 lm_post_buffers( 265 struct _lm_device_t *pdev, 266 u32_t chain_idx, 267 struct _lm_packet_t *packet); 268 #endif 269 /* Description: 270 * This routine sends the given packet. Resources required to send this 271 * must have already been reserved. The upper moduel is resposible for 272 * any necessary queueing. */ 273 lm_status_t 274 lm_send_packet( 275 struct _lm_device_t *pdev, 276 u32_t chain_idx, 277 struct _lm_packet_t *packet, 278 lm_frag_list_t *frags); 279 280 /* Description: 281 * This routine is called to get all pending interrupts. */ 282 lm_interrupt_status_t 283 lm_get_interrupt_status( 284 struct _lm_device_t *pdev); 285 286 /* Description: 287 * This routine is called to service receive interrupts. 288 * This routine calls the following mm routines: 289 * mm_indicate_rx */ 290 void 291 lm_service_rx_int( 292 struct _lm_device_t *pdev, 293 u32_t chain_idx); 294 295 u32_t 296 lm_get_packets_rcvd( 297 struct _lm_device_t *pdev, 298 u32_t qidx, 299 u32_t con_idx, 300 s_list_t *rcvd_list); 301 302 303 /* Description: 304 * This routine is called to service transmit complete interrupts. 305 * This routine calls the following mm routines: 306 * mm_indicate_tx, mm_complete_tx. */ 307 void 308 lm_service_tx_int( 309 struct _lm_device_t *pdev, 310 u32_t chain_idx); 311 312 u32_t 313 lm_get_packets_sent( 314 struct _lm_device_t *pdev, 315 u32_t qidx, 316 u32_t con_idx, 317 s_list_t *sent_list); 318 319 320 /* Description: 321 * This routine is called to service PHY interrupt. 322 * This routine calls the following mm routines: 323 * mm_indicate_link */ 324 void 325 lm_service_phy_int( 326 struct _lm_device_t *pdev, 327 u32_t force_service_int); 328 329 /* Description: 330 * This routine is called to mask out interrupt from the hardware. */ 331 void 332 lm_disable_int( 333 struct _lm_device_t *pdev); 334 335 /* Description: 336 * This routine is called to enable interrupt generation. */ 337 void 338 lm_enable_int( 339 struct _lm_device_t *pdev); 340 341 /* Description: 342 * This routine is called to set the receive filter. */ 343 lm_status_t 344 lm_set_rx_mask( 345 struct _lm_device_t *pdev, 346 u32_t user_idx, 347 lm_rx_mask_t rx_mask); 348 349 /* Description: 350 * This routine is called to add a multicast address to the multicast 351 * address table. Multicast filtering is enabled independently via 352 * lm_set_rx_mask call. */ 353 lm_status_t 354 lm_add_mc( 355 struct _lm_device_t *pdev, 356 u8_t *mc_addr); 357 358 /* Description: 359 * This routine is called to remove a multicast address from the multicast 360 * address table. Multicast filtering is enabled independently via 361 * lm_set_rx_mask call. */ 362 lm_status_t 363 lm_del_mc( 364 struct _lm_device_t *pdev, 365 u8_t *mc_addr); 366 367 /* Description: 368 * This routine is called to remove all multicast addresses from the 369 * multicast address table. Multicast filtering is enabled independently 370 * via lm_set_rx_mask call. */ 371 void 372 lm_clear_mc( 373 struct _lm_device_t *pdev); 374 375 /* Description: 376 * This routine is called to set the current MAC address. The 'addr_idx' 377 * allows the caller to set multiple MAC addresses if the hardware is 378 * capable of filtering multiple unicast addresses. */ 379 lm_status_t 380 lm_set_mac_addr( 381 struct _lm_device_t *pdev, 382 u32_t addr_idx, /* zero based address index. */ 383 u8_t *mac_addr); 384 385 /* Description: 386 * This routine is called to retrieve statistics. */ 387 lm_status_t 388 lm_get_stats( 389 struct _lm_device_t *pdev, 390 lm_stats_t stats_type, 391 u64_t *stats_cnt); 392 393 /* Description: 394 * This routine is called to add a wake-up pattern to the main list that 395 * contains all the wake-up frame. */ 396 lm_status_t 397 lm_add_nwuf( 398 struct _lm_device_t *pdev, 399 u32_t byte_pattern_size, 400 u32_t byte_mask_size, 401 u8_t *byte_mask, 402 u8_t *byte_pattern); 403 404 /* Description: 405 * This routine is called to remove the wake-up pattern from the main list 406 * that contains all the wake-up frame. */ 407 lm_status_t 408 lm_del_nwuf( 409 struct _lm_device_t *pdev, 410 u32_t byte_mask_size, 411 u8_t *byte_mask, 412 u8_t *byte_pattern); 413 414 /* Description: 415 * Delete all the NWUF entries. */ 416 void 417 lm_clear_nwuf( 418 struct _lm_device_t *pdev); 419 420 421 /* Description: 422 * This routine is called to set up the device power state. */ 423 void 424 lm_set_power_state( 425 struct _lm_device_t *pdev, 426 lm_power_state_t power_state, 427 lm_wake_up_mode_t wake_up_mode, /* Valid when power_state is D3. */ 428 u8_t set_pci_pm); 429 430 /* Description: 431 * This routine is called to initialize the PHY based one 'media_type' 432 * setting. 'wait_for_link_timeout' specifies how long to poll for 433 * link before returning. */ 434 lm_status_t 435 lm_init_phy( 436 struct _lm_device_t *pdev, 437 lm_medium_t req_medium, 438 lm_flow_control_t flow_control, 439 u32_t selective_autoneg, 440 u32_t wire_speed, 441 u32_t wait_for_link_timeout); 442 443 u8_t lm_is_mmio_ok(struct _lm_device_t *pdev); 444 445 #if INCLUDE_OFLD_SUPPORT 446 void 447 lm_get_ooo_pkts_rcvd( 448 struct _lm_device_t *pdev, 449 struct _lm_rx_chain_t *rxq, 450 u32_t con_idx, 451 s_list_t *rx_done_list); 452 #endif 453 454 /******************************************************************************* 455 * OS dependent functions called by the 'lm' routines. 456 ******************************************************************************/ 457 458 /* Busy delay for the specified microseconds. */ 459 void 460 mm_wait( 461 struct _lm_device_t *pdev, 462 u32_t delay_us); 463 464 /* This routine is called to read a PCI configuration register. The register 465 * must be 32-bit aligned. */ 466 lm_status_t 467 mm_read_pci( 468 struct _lm_device_t *pdev, 469 u32_t pci_reg, 470 u32_t *reg_value); 471 472 /* This routine is called to write a PCI configuration register. The 473 * register must be 32-bit aligned. */ 474 lm_status_t 475 mm_write_pci( 476 struct _lm_device_t *pdev, 477 u32_t pci_reg, 478 u32_t reg_value); 479 480 /* This routine is called to map the base address of the device registers 481 * to system address space so that registers are accessible. The base 482 * address will be unmapped when the driver unloads. */ 483 void * 484 mm_map_io_base( 485 struct _lm_device_t *pdev, 486 lm_address_t base_addr, 487 u32_t size); 488 489 /* This routine is called to read driver configuration. It is called from 490 * lm_get_dev_info. */ 491 lm_status_t 492 mm_get_user_config( 493 struct _lm_device_t *pdev); 494 495 /* This routine returns the size of a packet descriptor. */ 496 u32_t 497 mm_desc_size( 498 struct _lm_device_t *pdev, 499 u32_t desc_type); 500 #define DESC_TYPE_L2TX_PACKET 0 501 #define DESC_TYPE_L2RX_PACKET 1 502 503 /* This routine is responsible for allocating system memory and keeping track 504 * of it. The memory will be freed later when the driver unloads. This 505 * routine is called during driver initialization. */ 506 void * 507 mm_alloc_mem( 508 struct _lm_device_t *pdev, 509 u32_t mem_size, 510 void *resc_list); 511 512 /* This routine is responsible for physical memory and keeping track 513 * of it. The memory will be freed later when the driver unloads. */ 514 void * 515 mm_alloc_phys_mem( 516 struct _lm_device_t *pdev, 517 u32_t mem_size, 518 lm_address_t *phys_mem, 519 u8_t mem_type, 520 void *resc_list); 521 #define PHYS_MEM_TYPE_UNSPECIFIED 0 522 #define PHYS_MEM_TYPE_NONCACHED 1 523 524 525 /* This routine flushes a memory block from caches of all processors. */ 526 //#if defined(_X86_) || defined(_AMD64_) 527 #define mm_flush_cache(_pdev, _mem_virt, _mem_phy, _mem_size, _flush_type) 528 //#else 529 //void 530 //mm_flush_cache( 531 // struct _lm_device_t *pdev, 532 // u8_t *mem_virt, 533 // lm_address_t mem_phy, 534 // u32_t mem_size, 535 // u8_t flush_type); 536 //#define FLUSH_CACHE_BEFORE_DMA_READ 0 537 //#define FLUSH_CACHE_AFTER_DMA_WRITE 1 538 //#endif 539 540 541 /* This routine is called to indicate completion of a transmit request. 542 * If 'packet' is not NULL, all the packets in the completion queue will be 543 * indicated. Otherwise, only 'packet' will be indicated. */ 544 void 545 mm_indicate_tx( 546 struct _lm_device_t *pdev, 547 u32_t chain_idx, 548 struct _lm_packet_t *packet_arr[], 549 u32_t num_packets); 550 551 /* This routine is called to indicate received packets. If 'packet' is not 552 * NULL, all the packets in the received queue will be indicated. Otherwise, 553 * only 'packet' will be indicated. */ 554 #if defined(LM_NON_LEGACY_MODE_SUPPORT) 555 void 556 mm_indicate_rx( 557 struct _lm_device_t *pdev, 558 u32_t chain_idx, 559 struct _lm_packet_t *packet_arr[], 560 u32_t num_packets, 561 u8_t ind_as_resc); 562 #else 563 void 564 mm_indicate_rx( 565 struct _lm_device_t *pdev, 566 u32_t chain_idx, 567 struct _lm_packet_t *packet_arr[], 568 u32_t num_packets); 569 #endif 570 571 #if INCLUDE_OFLD_SUPPORT 572 void 573 mm_return_ooo_pkts( 574 struct _lm_device_t *pdev, 575 u32_t qidx, 576 s_list_t *rcvd_list, 577 u32_t l2pkt_type 578 ); 579 #endif 580 581 /* lm_service_phy_int calls this routine to indicate the current link. */ 582 void 583 mm_indicate_link( 584 struct _lm_device_t *pdev, 585 lm_status_t link, 586 lm_medium_t medium); 587 588 /* indirect register access lock. */ 589 void 590 mm_acquire_ind_reg_lock( 591 struct _lm_device_t *pdev); 592 593 void 594 mm_release_ind_reg_lock( 595 struct _lm_device_t *pdev); 596 597 void 598 mm_comp_l2_filter_chng_req( 599 struct _lm_device_t *pdev, 600 lm_status_t lm_status, 601 u32_t q_grp_id); 602 603 void 604 mm_q_grp_abort_rx_request( 605 struct _lm_device_t *pdev, 606 u32_t qidx); 607 608 609 #endif /* _LM_H */ 610 611