1 /** @file 2 PCI Root Bridge I/O protocol as defined in the UEFI 2.0 specification. 3 4 PCI Root Bridge I/O protocol is used by PCI Bus Driver to perform PCI Memory, PCI I/O, 5 and PCI Configuration cycles on a PCI Root Bridge. It also provides services to perform 6 defferent types of bus mastering DMA. 7 8 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR> 9 SPDX-License-Identifier: BSD-2-Clause-Patent 10 11 **/ 12 13 #ifndef __PCI_ROOT_BRIDGE_IO_H__ 14 #define __PCI_ROOT_BRIDGE_IO_H__ 15 16 #define EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GUID \ 17 { \ 18 0x2f707ebb, 0x4a1a, 0x11d4, {0x9a, 0x38, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \ 19 } 20 21 typedef struct _EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL; 22 23 /// 24 /// ******************************************************* 25 /// EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH 26 /// ******************************************************* 27 /// 28 typedef enum { 29 EfiPciWidthUint8, 30 EfiPciWidthUint16, 31 EfiPciWidthUint32, 32 EfiPciWidthUint64, 33 EfiPciWidthFifoUint8, 34 EfiPciWidthFifoUint16, 35 EfiPciWidthFifoUint32, 36 EfiPciWidthFifoUint64, 37 EfiPciWidthFillUint8, 38 EfiPciWidthFillUint16, 39 EfiPciWidthFillUint32, 40 EfiPciWidthFillUint64, 41 EfiPciWidthMaximum 42 } EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH; 43 44 /// 45 /// ******************************************************* 46 /// EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION 47 /// ******************************************************* 48 /// 49 typedef enum { 50 /// 51 /// A read operation from system memory by a bus master that is not capable of producing 52 /// PCI dual address cycles. 53 /// 54 EfiPciOperationBusMasterRead, 55 /// 56 /// A write operation from system memory by a bus master that is not capable of producing 57 /// PCI dual address cycles. 58 /// 59 EfiPciOperationBusMasterWrite, 60 /// 61 /// Provides both read and write access to system memory by both the processor and a bus 62 /// master that is not capable of producing PCI dual address cycles. 63 /// 64 EfiPciOperationBusMasterCommonBuffer, 65 /// 66 /// A read operation from system memory by a bus master that is capable of producing PCI 67 /// dual address cycles. 68 /// 69 EfiPciOperationBusMasterRead64, 70 /// 71 /// A write operation to system memory by a bus master that is capable of producing PCI 72 /// dual address cycles. 73 /// 74 EfiPciOperationBusMasterWrite64, 75 /// 76 /// Provides both read and write access to system memory by both the processor and a bus 77 /// master that is capable of producing PCI dual address cycles. 78 /// 79 EfiPciOperationBusMasterCommonBuffer64, 80 EfiPciOperationMaximum 81 } EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION; 82 83 #define EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO 0x0001 84 #define EFI_PCI_ATTRIBUTE_ISA_IO 0x0002 85 #define EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO 0x0004 86 #define EFI_PCI_ATTRIBUTE_VGA_MEMORY 0x0008 87 #define EFI_PCI_ATTRIBUTE_VGA_IO 0x0010 88 #define EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO 0x0020 89 #define EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO 0x0040 90 #define EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080 91 #define EFI_PCI_ATTRIBUTE_MEMORY_CACHED 0x0800 92 #define EFI_PCI_ATTRIBUTE_MEMORY_DISABLE 0x1000 93 #define EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000 94 #define EFI_PCI_ATTRIBUTE_ISA_IO_16 0x10000 95 #define EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16 0x20000 96 #define EFI_PCI_ATTRIBUTE_VGA_IO_16 0x40000 97 98 #define EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER (EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE | EFI_PCI_ATTRIBUTE_MEMORY_CACHED | EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE) 99 100 #define EFI_PCI_ATTRIBUTE_INVALID_FOR_ALLOCATE_BUFFER (~EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER) 101 102 #define EFI_PCI_ADDRESS(bus, dev, func, reg) \ 103 (UINT64) ( \ 104 (((UINTN) bus) << 24) | \ 105 (((UINTN) dev) << 16) | \ 106 (((UINTN) func) << 8) | \ 107 (((UINTN) (reg)) < 256 ? ((UINTN) (reg)) : (UINT64) (LShiftU64 ((UINT64) (reg), 32)))) 108 109 typedef struct { 110 UINT8 Register; 111 UINT8 Function; 112 UINT8 Device; 113 UINT8 Bus; 114 UINT32 ExtendedRegister; 115 } EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS; 116 117 /** 118 Reads from the I/O space of a PCI Root Bridge. Returns when either the polling exit criteria is 119 satisfied or after a defined duration. 120 121 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. 122 @param Width Signifies the width of the memory or I/O operations. 123 @param Address The base address of the memory or I/O operations. 124 @param Mask Mask used for the polling criteria. 125 @param Value The comparison value used for the polling exit criteria. 126 @param Delay The number of 100 ns units to poll. 127 @param Result Pointer to the last value read from the memory location. 128 129 @retval EFI_SUCCESS The last data returned from the access matched the poll exit criteria. 130 @retval EFI_TIMEOUT Delay expired before a match occurred. 131 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. 132 @retval EFI_INVALID_PARAMETER One or more parameters are invalid. 133 134 **/ 135 typedef 136 EFI_STATUS 137 (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM)( 138 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, 139 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, 140 IN UINT64 Address, 141 IN UINT64 Mask, 142 IN UINT64 Value, 143 IN UINT64 Delay, 144 OUT UINT64 *Result 145 ); 146 147 /** 148 Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space. 149 150 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. 151 @param Width Signifies the width of the memory operations. 152 @param Address The base address of the memory operations. 153 @param Count The number of memory operations to perform. 154 @param Buffer For read operations, the destination buffer to store the results. For write 155 operations, the source buffer to write data from. 156 157 @retval EFI_SUCCESS The data was read from or written to the PCI root bridge. 158 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. 159 @retval EFI_INVALID_PARAMETER One or more parameters are invalid. 160 161 **/ 162 typedef 163 EFI_STATUS 164 (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM)( 165 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, 166 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, 167 IN UINT64 Address, 168 IN UINTN Count, 169 IN OUT VOID *Buffer 170 ); 171 172 typedef struct { 173 /// 174 /// Read PCI controller registers in the PCI root bridge memory space. 175 /// 176 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM Read; 177 /// 178 /// Write PCI controller registers in the PCI root bridge memory space. 179 /// 180 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM Write; 181 } EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS; 182 183 /** 184 Enables a PCI driver to copy one region of PCI root bridge memory space to another region of PCI 185 root bridge memory space. 186 187 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL instance. 188 @param Width Signifies the width of the memory operations. 189 @param DestAddress The destination address of the memory operation. 190 @param SrcAddress The source address of the memory operation. 191 @param Count The number of memory operations to perform. 192 193 @retval EFI_SUCCESS The data was copied from one memory region to another memory region. 194 @retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge. 195 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. 196 197 **/ 198 typedef 199 EFI_STATUS 200 (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_COPY_MEM)( 201 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, 202 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, 203 IN UINT64 DestAddress, 204 IN UINT64 SrcAddress, 205 IN UINTN Count 206 ); 207 208 /** 209 Provides the PCI controller-specific addresses required to access system memory from a 210 DMA bus master. 211 212 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. 213 @param Operation Indicates if the bus master is going to read or write to system memory. 214 @param HostAddress The system memory address to map to the PCI controller. 215 @param NumberOfBytes On input the number of bytes to map. On output the number of bytes 216 that were mapped. 217 @param DeviceAddress The resulting map address for the bus master PCI controller to use to 218 access the hosts HostAddress. 219 @param Mapping A resulting value to pass to Unmap(). 220 221 @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes. 222 @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer. 223 @retval EFI_INVALID_PARAMETER One or more parameters are invalid. 224 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. 225 @retval EFI_DEVICE_ERROR The system hardware could not map the requested address. 226 227 **/ 228 typedef 229 EFI_STATUS 230 (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_MAP)( 231 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, 232 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION Operation, 233 IN VOID *HostAddress, 234 IN OUT UINTN *NumberOfBytes, 235 OUT EFI_PHYSICAL_ADDRESS *DeviceAddress, 236 OUT VOID **Mapping 237 ); 238 239 /** 240 Completes the Map() operation and releases any corresponding resources. 241 242 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. 243 @param Mapping The mapping value returned from Map(). 244 245 @retval EFI_SUCCESS The range was unmapped. 246 @retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map(). 247 @retval EFI_DEVICE_ERROR The data was not committed to the target system memory. 248 249 **/ 250 typedef 251 EFI_STATUS 252 (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_UNMAP)( 253 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, 254 IN VOID *Mapping 255 ); 256 257 /** 258 Allocates pages that are suitable for an EfiPciOperationBusMasterCommonBuffer or 259 EfiPciOperationBusMasterCommonBuffer64 mapping. 260 261 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. 262 @param Type This parameter is not used and must be ignored. 263 @param MemoryType The type of memory to allocate, EfiBootServicesData or 264 EfiRuntimeServicesData. 265 @param Pages The number of pages to allocate. 266 @param HostAddress A pointer to store the base system memory address of the 267 allocated range. 268 @param Attributes The requested bit mask of attributes for the allocated range. 269 270 @retval EFI_SUCCESS The requested memory pages were allocated. 271 @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are 272 MEMORY_WRITE_COMBINE and MEMORY_CACHED. 273 @retval EFI_INVALID_PARAMETER One or more parameters are invalid. 274 @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated. 275 276 **/ 277 typedef 278 EFI_STATUS 279 (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ALLOCATE_BUFFER)( 280 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, 281 IN EFI_ALLOCATE_TYPE Type, 282 IN EFI_MEMORY_TYPE MemoryType, 283 IN UINTN Pages, 284 IN OUT VOID **HostAddress, 285 IN UINT64 Attributes 286 ); 287 288 /** 289 Frees memory that was allocated with AllocateBuffer(). 290 291 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. 292 @param Pages The number of pages to free. 293 @param HostAddress The base system memory address of the allocated range. 294 295 @retval EFI_SUCCESS The requested memory pages were freed. 296 @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages 297 was not allocated with AllocateBuffer(). 298 299 **/ 300 typedef 301 EFI_STATUS 302 (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FREE_BUFFER)( 303 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, 304 IN UINTN Pages, 305 IN VOID *HostAddress 306 ); 307 308 /** 309 Flushes all PCI posted write transactions from a PCI host bridge to system memory. 310 311 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. 312 313 @retval EFI_SUCCESS The PCI posted write transactions were flushed from the PCI host 314 bridge to system memory. 315 @retval EFI_DEVICE_ERROR The PCI posted write transactions were not flushed from the PCI 316 host bridge due to a hardware error. 317 318 **/ 319 typedef 320 EFI_STATUS 321 (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FLUSH)( 322 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This 323 ); 324 325 /** 326 Gets the attributes that a PCI root bridge supports setting with SetAttributes(), and the 327 attributes that a PCI root bridge is currently using. 328 329 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. 330 @param Supports A pointer to the mask of attributes that this PCI root bridge supports 331 setting with SetAttributes(). 332 @param Attributes A pointer to the mask of attributes that this PCI root bridge is currently 333 using. 334 335 @retval EFI_SUCCESS If Supports is not NULL, then the attributes that the PCI root 336 bridge supports is returned in Supports. If Attributes is 337 not NULL, then the attributes that the PCI root bridge is currently 338 using is returned in Attributes. 339 @retval EFI_INVALID_PARAMETER Both Supports and Attributes are NULL. 340 341 342 **/ 343 typedef 344 EFI_STATUS 345 (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GET_ATTRIBUTES)( 346 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, 347 OUT UINT64 *Supports, 348 OUT UINT64 *Attributes 349 ); 350 351 /** 352 Sets attributes for a resource range on a PCI root bridge. 353 354 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. 355 @param Attributes The mask of attributes to set. 356 @param ResourceBase A pointer to the base address of the resource range to be modified by the 357 attributes specified by Attributes. 358 @param ResourceLength A pointer to the length of the resource range to be modified by the 359 attributes specified by Attributes. 360 361 @retval EFI_SUCCESS The set of attributes specified by Attributes for the resource 362 range specified by ResourceBase and ResourceLength 363 were set on the PCI root bridge, and the actual resource range is 364 returned in ResuourceBase and ResourceLength. 365 @retval EFI_UNSUPPORTED A bit is set in Attributes that is not supported by the PCI Root 366 Bridge. 367 @retval EFI_OUT_OF_RESOURCES There are not enough resources to set the attributes on the 368 resource range specified by BaseAddress and Length. 369 @retval EFI_INVALID_PARAMETER One or more parameters are invalid. 370 371 **/ 372 typedef 373 EFI_STATUS 374 (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_SET_ATTRIBUTES)( 375 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, 376 IN UINT64 Attributes, 377 IN OUT UINT64 *ResourceBase, 378 IN OUT UINT64 *ResourceLength 379 ); 380 381 /** 382 Retrieves the current resource settings of this PCI root bridge in the form of a set of ACPI 383 resource descriptors. 384 385 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. 386 @param Resources A pointer to the resource descriptors that describe the current 387 configuration of this PCI root bridge. 388 389 @retval EFI_SUCCESS The current configuration of this PCI root bridge was returned in 390 Resources. 391 @retval EFI_UNSUPPORTED The current configuration of this PCI root bridge could not be 392 retrieved. 393 394 **/ 395 typedef 396 EFI_STATUS 397 (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_CONFIGURATION)( 398 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, 399 OUT VOID **Resources 400 ); 401 402 /// 403 /// Provides the basic Memory, I/O, PCI configuration, and DMA interfaces that are 404 /// used to abstract accesses to PCI controllers behind a PCI Root Bridge Controller. 405 /// 406 struct _EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL { 407 /// 408 /// The EFI_HANDLE of the PCI Host Bridge of which this PCI Root Bridge is a member. 409 /// 410 EFI_HANDLE ParentHandle; 411 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM PollMem; 412 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM PollIo; 413 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Mem; 414 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Io; 415 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Pci; 416 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_COPY_MEM CopyMem; 417 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_MAP Map; 418 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_UNMAP Unmap; 419 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ALLOCATE_BUFFER AllocateBuffer; 420 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FREE_BUFFER FreeBuffer; 421 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FLUSH Flush; 422 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GET_ATTRIBUTES GetAttributes; 423 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_SET_ATTRIBUTES SetAttributes; 424 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_CONFIGURATION Configuration; 425 426 /// 427 /// The segment number that this PCI root bridge resides. 428 /// 429 UINT32 SegmentNumber; 430 }; 431 432 extern EFI_GUID gEfiPciRootBridgeIoProtocolGuid; 433 434 #endif 435