1 /** @file 2 ACPI 5.1 definitions from the ACPI Specification Revision 5.1 Errata B January, 2016. 3 4 Copyright (c) 2014 Hewlett-Packard Development Company, L.P.<BR> 5 Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR> 6 (C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR> 7 Copyright (c) 2020, ARM Ltd. All rights reserved.<BR> 8 SPDX-License-Identifier: BSD-2-Clause-Patent 9 **/ 10 11 #ifndef _ACPI_5_1_H_ 12 #define _ACPI_5_1_H_ 13 14 #include <IndustryStandard/Acpi50.h> 15 16 // 17 // Ensure proper structure formats 18 // 19 #pragma pack(1) 20 21 /// 22 /// ACPI 5.1 Generic Address Space definition 23 /// 24 typedef struct { 25 UINT8 AddressSpaceId; 26 UINT8 RegisterBitWidth; 27 UINT8 RegisterBitOffset; 28 UINT8 AccessSize; 29 UINT64 Address; 30 } EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE; 31 32 // 33 // Generic Address Space Address IDs 34 // 35 #define EFI_ACPI_5_1_SYSTEM_MEMORY 0 36 #define EFI_ACPI_5_1_SYSTEM_IO 1 37 #define EFI_ACPI_5_1_PCI_CONFIGURATION_SPACE 2 38 #define EFI_ACPI_5_1_EMBEDDED_CONTROLLER 3 39 #define EFI_ACPI_5_1_SMBUS 4 40 #define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL 0x0A 41 #define EFI_ACPI_5_1_FUNCTIONAL_FIXED_HARDWARE 0x7F 42 43 // 44 // Generic Address Space Access Sizes 45 // 46 #define EFI_ACPI_5_1_UNDEFINED 0 47 #define EFI_ACPI_5_1_BYTE 1 48 #define EFI_ACPI_5_1_WORD 2 49 #define EFI_ACPI_5_1_DWORD 3 50 #define EFI_ACPI_5_1_QWORD 4 51 52 // 53 // ACPI 5.1 table structures 54 // 55 56 /// 57 /// Root System Description Pointer Structure 58 /// 59 typedef struct { 60 UINT64 Signature; 61 UINT8 Checksum; 62 UINT8 OemId[6]; 63 UINT8 Revision; 64 UINT32 RsdtAddress; 65 UINT32 Length; 66 UINT64 XsdtAddress; 67 UINT8 ExtendedChecksum; 68 UINT8 Reserved[3]; 69 } EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER; 70 71 /// 72 /// RSD_PTR Revision (as defined in ACPI 5.1 spec.) 73 /// 74 #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 5.1) says current value is 2 75 76 /// 77 /// Common table header, this prefaces all ACPI tables, including FACS, but 78 /// excluding the RSD PTR structure 79 /// 80 typedef struct { 81 UINT32 Signature; 82 UINT32 Length; 83 } EFI_ACPI_5_1_COMMON_HEADER; 84 85 // 86 // Root System Description Table 87 // No definition needed as it is a common description table header, the same with 88 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers. 89 // 90 91 /// 92 /// RSDT Revision (as defined in ACPI 5.1 spec.) 93 /// 94 #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01 95 96 // 97 // Extended System Description Table 98 // No definition needed as it is a common description table header, the same with 99 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers. 100 // 101 102 /// 103 /// XSDT Revision (as defined in ACPI 5.1 spec.) 104 /// 105 #define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01 106 107 /// 108 /// Fixed ACPI Description Table Structure (FADT) 109 /// 110 typedef struct { 111 EFI_ACPI_DESCRIPTION_HEADER Header; 112 UINT32 FirmwareCtrl; 113 UINT32 Dsdt; 114 UINT8 Reserved0; 115 UINT8 PreferredPmProfile; 116 UINT16 SciInt; 117 UINT32 SmiCmd; 118 UINT8 AcpiEnable; 119 UINT8 AcpiDisable; 120 UINT8 S4BiosReq; 121 UINT8 PstateCnt; 122 UINT32 Pm1aEvtBlk; 123 UINT32 Pm1bEvtBlk; 124 UINT32 Pm1aCntBlk; 125 UINT32 Pm1bCntBlk; 126 UINT32 Pm2CntBlk; 127 UINT32 PmTmrBlk; 128 UINT32 Gpe0Blk; 129 UINT32 Gpe1Blk; 130 UINT8 Pm1EvtLen; 131 UINT8 Pm1CntLen; 132 UINT8 Pm2CntLen; 133 UINT8 PmTmrLen; 134 UINT8 Gpe0BlkLen; 135 UINT8 Gpe1BlkLen; 136 UINT8 Gpe1Base; 137 UINT8 CstCnt; 138 UINT16 PLvl2Lat; 139 UINT16 PLvl3Lat; 140 UINT16 FlushSize; 141 UINT16 FlushStride; 142 UINT8 DutyOffset; 143 UINT8 DutyWidth; 144 UINT8 DayAlrm; 145 UINT8 MonAlrm; 146 UINT8 Century; 147 UINT16 IaPcBootArch; 148 UINT8 Reserved1; 149 UINT32 Flags; 150 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ResetReg; 151 UINT8 ResetValue; 152 UINT16 ArmBootArch; 153 UINT8 MinorVersion; 154 UINT64 XFirmwareCtrl; 155 UINT64 XDsdt; 156 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk; 157 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk; 158 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk; 159 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk; 160 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk; 161 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk; 162 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe0Blk; 163 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe1Blk; 164 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepControlReg; 165 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepStatusReg; 166 } EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE; 167 168 /// 169 /// FADT Version (as defined in ACPI 5.1 spec.) 170 /// 171 #define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x05 172 #define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x01 173 174 // 175 // Fixed ACPI Description Table Preferred Power Management Profile 176 // 177 #define EFI_ACPI_5_1_PM_PROFILE_UNSPECIFIED 0 178 #define EFI_ACPI_5_1_PM_PROFILE_DESKTOP 1 179 #define EFI_ACPI_5_1_PM_PROFILE_MOBILE 2 180 #define EFI_ACPI_5_1_PM_PROFILE_WORKSTATION 3 181 #define EFI_ACPI_5_1_PM_PROFILE_ENTERPRISE_SERVER 4 182 #define EFI_ACPI_5_1_PM_PROFILE_SOHO_SERVER 5 183 #define EFI_ACPI_5_1_PM_PROFILE_APPLIANCE_PC 6 184 #define EFI_ACPI_5_1_PM_PROFILE_PERFORMANCE_SERVER 7 185 #define EFI_ACPI_5_1_PM_PROFILE_TABLET 8 186 187 // 188 // Fixed ACPI Description Table Boot Architecture Flags 189 // All other bits are reserved and must be set to 0. 190 // 191 #define EFI_ACPI_5_1_LEGACY_DEVICES BIT0 192 #define EFI_ACPI_5_1_8042 BIT1 193 #define EFI_ACPI_5_1_VGA_NOT_PRESENT BIT2 194 #define EFI_ACPI_5_1_MSI_NOT_SUPPORTED BIT3 195 #define EFI_ACPI_5_1_PCIE_ASPM_CONTROLS BIT4 196 #define EFI_ACPI_5_1_CMOS_RTC_NOT_PRESENT BIT5 197 198 // 199 // Fixed ACPI Description Table Arm Boot Architecture Flags 200 // All other bits are reserved and must be set to 0. 201 // 202 #define EFI_ACPI_5_1_ARM_PSCI_COMPLIANT BIT0 203 #define EFI_ACPI_5_1_ARM_PSCI_USE_HVC BIT1 204 205 // 206 // Fixed ACPI Description Table Fixed Feature Flags 207 // All other bits are reserved and must be set to 0. 208 // 209 #define EFI_ACPI_5_1_WBINVD BIT0 210 #define EFI_ACPI_5_1_WBINVD_FLUSH BIT1 211 #define EFI_ACPI_5_1_PROC_C1 BIT2 212 #define EFI_ACPI_5_1_P_LVL2_UP BIT3 213 #define EFI_ACPI_5_1_PWR_BUTTON BIT4 214 #define EFI_ACPI_5_1_SLP_BUTTON BIT5 215 #define EFI_ACPI_5_1_FIX_RTC BIT6 216 #define EFI_ACPI_5_1_RTC_S4 BIT7 217 #define EFI_ACPI_5_1_TMR_VAL_EXT BIT8 218 #define EFI_ACPI_5_1_DCK_CAP BIT9 219 #define EFI_ACPI_5_1_RESET_REG_SUP BIT10 220 #define EFI_ACPI_5_1_SEALED_CASE BIT11 221 #define EFI_ACPI_5_1_HEADLESS BIT12 222 #define EFI_ACPI_5_1_CPU_SW_SLP BIT13 223 #define EFI_ACPI_5_1_PCI_EXP_WAK BIT14 224 #define EFI_ACPI_5_1_USE_PLATFORM_CLOCK BIT15 225 #define EFI_ACPI_5_1_S4_RTC_STS_VALID BIT16 226 #define EFI_ACPI_5_1_REMOTE_POWER_ON_CAPABLE BIT17 227 #define EFI_ACPI_5_1_FORCE_APIC_CLUSTER_MODEL BIT18 228 #define EFI_ACPI_5_1_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19 229 #define EFI_ACPI_5_1_HW_REDUCED_ACPI BIT20 230 #define EFI_ACPI_5_1_LOW_POWER_S0_IDLE_CAPABLE BIT21 231 232 /// 233 /// Firmware ACPI Control Structure 234 /// 235 typedef struct { 236 UINT32 Signature; 237 UINT32 Length; 238 UINT32 HardwareSignature; 239 UINT32 FirmwareWakingVector; 240 UINT32 GlobalLock; 241 UINT32 Flags; 242 UINT64 XFirmwareWakingVector; 243 UINT8 Version; 244 UINT8 Reserved0[3]; 245 UINT32 OspmFlags; 246 UINT8 Reserved1[24]; 247 } EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE; 248 249 /// 250 /// FACS Version (as defined in ACPI 5.1 spec.) 251 /// 252 #define EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02 253 254 /// 255 /// Firmware Control Structure Feature Flags 256 /// All other bits are reserved and must be set to 0. 257 /// 258 #define EFI_ACPI_5_1_S4BIOS_F BIT0 259 #define EFI_ACPI_5_1_64BIT_WAKE_SUPPORTED_F BIT1 260 261 /// 262 /// OSPM Enabled Firmware Control Structure Flags 263 /// All other bits are reserved and must be set to 0. 264 /// 265 #define EFI_ACPI_5_1_OSPM_64BIT_WAKE_F BIT0 266 267 // 268 // Differentiated System Description Table, 269 // Secondary System Description Table 270 // and Persistent System Description Table, 271 // no definition needed as they are common description table header, the same with 272 // EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block. 273 // 274 #define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02 275 #define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02 276 277 /// 278 /// Multiple APIC Description Table header definition. The rest of the table 279 /// must be defined in a platform specific manner. 280 /// 281 typedef struct { 282 EFI_ACPI_DESCRIPTION_HEADER Header; 283 UINT32 LocalApicAddress; 284 UINT32 Flags; 285 } EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER; 286 287 /// 288 /// MADT Revision (as defined in ACPI 5.1 spec.) 289 /// 290 #define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03 291 292 /// 293 /// Multiple APIC Flags 294 /// All other bits are reserved and must be set to 0. 295 /// 296 #define EFI_ACPI_5_1_PCAT_COMPAT BIT0 297 298 // 299 // Multiple APIC Description Table APIC structure types 300 // All other values between 0x0D and 0x7F are reserved and 301 // will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM. 302 // 303 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC 0x00 304 #define EFI_ACPI_5_1_IO_APIC 0x01 305 #define EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE 0x02 306 #define EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE 0x03 307 #define EFI_ACPI_5_1_LOCAL_APIC_NMI 0x04 308 #define EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE 0x05 309 #define EFI_ACPI_5_1_IO_SAPIC 0x06 310 #define EFI_ACPI_5_1_LOCAL_SAPIC 0x07 311 #define EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES 0x08 312 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC 0x09 313 #define EFI_ACPI_5_1_LOCAL_X2APIC_NMI 0x0A 314 #define EFI_ACPI_5_1_GIC 0x0B 315 #define EFI_ACPI_5_1_GICD 0x0C 316 #define EFI_ACPI_5_1_GIC_MSI_FRAME 0x0D 317 #define EFI_ACPI_5_1_GICR 0x0E 318 319 // 320 // APIC Structure Definitions 321 // 322 323 /// 324 /// Processor Local APIC Structure Definition 325 /// 326 typedef struct { 327 UINT8 Type; 328 UINT8 Length; 329 UINT8 AcpiProcessorId; 330 UINT8 ApicId; 331 UINT32 Flags; 332 } EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_STRUCTURE; 333 334 /// 335 /// Local APIC Flags. All other bits are reserved and must be 0. 336 /// 337 #define EFI_ACPI_5_1_LOCAL_APIC_ENABLED BIT0 338 339 /// 340 /// IO APIC Structure 341 /// 342 typedef struct { 343 UINT8 Type; 344 UINT8 Length; 345 UINT8 IoApicId; 346 UINT8 Reserved; 347 UINT32 IoApicAddress; 348 UINT32 GlobalSystemInterruptBase; 349 } EFI_ACPI_5_1_IO_APIC_STRUCTURE; 350 351 /// 352 /// Interrupt Source Override Structure 353 /// 354 typedef struct { 355 UINT8 Type; 356 UINT8 Length; 357 UINT8 Bus; 358 UINT8 Source; 359 UINT32 GlobalSystemInterrupt; 360 UINT16 Flags; 361 } EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE; 362 363 /// 364 /// Platform Interrupt Sources Structure Definition 365 /// 366 typedef struct { 367 UINT8 Type; 368 UINT8 Length; 369 UINT16 Flags; 370 UINT8 InterruptType; 371 UINT8 ProcessorId; 372 UINT8 ProcessorEid; 373 UINT8 IoSapicVector; 374 UINT32 GlobalSystemInterrupt; 375 UINT32 PlatformInterruptSourceFlags; 376 UINT8 CpeiProcessorOverride; 377 UINT8 Reserved[31]; 378 } EFI_ACPI_5_1_PLATFORM_INTERRUPT_APIC_STRUCTURE; 379 380 // 381 // MPS INTI flags. 382 // All other bits are reserved and must be set to 0. 383 // 384 #define EFI_ACPI_5_1_POLARITY (3 << 0) 385 #define EFI_ACPI_5_1_TRIGGER_MODE (3 << 2) 386 387 /// 388 /// Non-Maskable Interrupt Source Structure 389 /// 390 typedef struct { 391 UINT8 Type; 392 UINT8 Length; 393 UINT16 Flags; 394 UINT32 GlobalSystemInterrupt; 395 } EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE; 396 397 /// 398 /// Local APIC NMI Structure 399 /// 400 typedef struct { 401 UINT8 Type; 402 UINT8 Length; 403 UINT8 AcpiProcessorId; 404 UINT16 Flags; 405 UINT8 LocalApicLint; 406 } EFI_ACPI_5_1_LOCAL_APIC_NMI_STRUCTURE; 407 408 /// 409 /// Local APIC Address Override Structure 410 /// 411 typedef struct { 412 UINT8 Type; 413 UINT8 Length; 414 UINT16 Reserved; 415 UINT64 LocalApicAddress; 416 } EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE; 417 418 /// 419 /// IO SAPIC Structure 420 /// 421 typedef struct { 422 UINT8 Type; 423 UINT8 Length; 424 UINT8 IoApicId; 425 UINT8 Reserved; 426 UINT32 GlobalSystemInterruptBase; 427 UINT64 IoSapicAddress; 428 } EFI_ACPI_5_1_IO_SAPIC_STRUCTURE; 429 430 /// 431 /// Local SAPIC Structure 432 /// This struct followed by a null-terminated ASCII string - ACPI Processor UID String 433 /// 434 typedef struct { 435 UINT8 Type; 436 UINT8 Length; 437 UINT8 AcpiProcessorId; 438 UINT8 LocalSapicId; 439 UINT8 LocalSapicEid; 440 UINT8 Reserved[3]; 441 UINT32 Flags; 442 UINT32 ACPIProcessorUIDValue; 443 } EFI_ACPI_5_1_PROCESSOR_LOCAL_SAPIC_STRUCTURE; 444 445 /// 446 /// Platform Interrupt Sources Structure 447 /// 448 typedef struct { 449 UINT8 Type; 450 UINT8 Length; 451 UINT16 Flags; 452 UINT8 InterruptType; 453 UINT8 ProcessorId; 454 UINT8 ProcessorEid; 455 UINT8 IoSapicVector; 456 UINT32 GlobalSystemInterrupt; 457 UINT32 PlatformInterruptSourceFlags; 458 } EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES_STRUCTURE; 459 460 /// 461 /// Platform Interrupt Source Flags. 462 /// All other bits are reserved and must be set to 0. 463 /// 464 #define EFI_ACPI_5_1_CPEI_PROCESSOR_OVERRIDE BIT0 465 466 /// 467 /// Processor Local x2APIC Structure Definition 468 /// 469 typedef struct { 470 UINT8 Type; 471 UINT8 Length; 472 UINT8 Reserved[2]; 473 UINT32 X2ApicId; 474 UINT32 Flags; 475 UINT32 AcpiProcessorUid; 476 } EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_STRUCTURE; 477 478 /// 479 /// Local x2APIC NMI Structure 480 /// 481 typedef struct { 482 UINT8 Type; 483 UINT8 Length; 484 UINT16 Flags; 485 UINT32 AcpiProcessorUid; 486 UINT8 LocalX2ApicLint; 487 UINT8 Reserved[3]; 488 } EFI_ACPI_5_1_LOCAL_X2APIC_NMI_STRUCTURE; 489 490 /// 491 /// GIC Structure 492 /// 493 typedef struct { 494 UINT8 Type; 495 UINT8 Length; 496 UINT16 Reserved; 497 UINT32 CPUInterfaceNumber; 498 UINT32 AcpiProcessorUid; 499 UINT32 Flags; 500 UINT32 ParkingProtocolVersion; 501 UINT32 PerformanceInterruptGsiv; 502 UINT64 ParkedAddress; 503 UINT64 PhysicalBaseAddress; 504 UINT64 GICV; 505 UINT64 GICH; 506 UINT32 VGICMaintenanceInterrupt; 507 UINT64 GICRBaseAddress; 508 UINT64 MPIDR; 509 } EFI_ACPI_5_1_GIC_STRUCTURE; 510 511 /// 512 /// GIC Flags. All other bits are reserved and must be 0. 513 /// 514 #define EFI_ACPI_5_1_GIC_ENABLED BIT0 515 #define EFI_ACPI_5_1_PERFORMANCE_INTERRUPT_MODEL BIT1 516 #define EFI_ACPI_5_1_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2 517 518 /// 519 /// GIC Distributor Structure 520 /// 521 typedef struct { 522 UINT8 Type; 523 UINT8 Length; 524 UINT16 Reserved1; 525 UINT32 GicId; 526 UINT64 PhysicalBaseAddress; 527 UINT32 SystemVectorBase; 528 UINT8 GicVersion; 529 UINT8 Reserved2[3]; 530 } EFI_ACPI_5_1_GIC_DISTRIBUTOR_STRUCTURE; 531 532 /// 533 /// GIC Version 534 /// 535 #define EFI_ACPI_5_1_GIC_V1 0x01 536 #define EFI_ACPI_5_1_GIC_V2 0x02 537 #define EFI_ACPI_5_1_GIC_V3 0x03 538 #define EFI_ACPI_5_1_GIC_V4 0x04 539 540 /// 541 /// GIC MSI Frame Structure 542 /// 543 typedef struct { 544 UINT8 Type; 545 UINT8 Length; 546 UINT16 Reserved1; 547 UINT32 GicMsiFrameId; 548 UINT64 PhysicalBaseAddress; 549 UINT32 Flags; 550 UINT16 SPICount; 551 UINT16 SPIBase; 552 } EFI_ACPI_5_1_GIC_MSI_FRAME_STRUCTURE; 553 554 /// 555 /// GIC MSI Frame Flags. All other bits are reserved and must be 0. 556 /// 557 #define EFI_ACPI_5_1_SPI_COUNT_BASE_SELECT BIT0 558 559 /// 560 /// GICR Structure 561 /// 562 typedef struct { 563 UINT8 Type; 564 UINT8 Length; 565 UINT16 Reserved; 566 UINT64 DiscoveryRangeBaseAddress; 567 UINT32 DiscoveryRangeLength; 568 } EFI_ACPI_5_1_GICR_STRUCTURE; 569 570 /// 571 /// Smart Battery Description Table (SBST) 572 /// 573 typedef struct { 574 EFI_ACPI_DESCRIPTION_HEADER Header; 575 UINT32 WarningEnergyLevel; 576 UINT32 LowEnergyLevel; 577 UINT32 CriticalEnergyLevel; 578 } EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE; 579 580 /// 581 /// SBST Version (as defined in ACPI 5.1 spec.) 582 /// 583 #define EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01 584 585 /// 586 /// Embedded Controller Boot Resources Table (ECDT) 587 /// The table is followed by a null terminated ASCII string that contains 588 /// a fully qualified reference to the name space object. 589 /// 590 typedef struct { 591 EFI_ACPI_DESCRIPTION_HEADER Header; 592 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcControl; 593 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcData; 594 UINT32 Uid; 595 UINT8 GpeBit; 596 } EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE; 597 598 /// 599 /// ECDT Version (as defined in ACPI 5.1 spec.) 600 /// 601 #define EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01 602 603 /// 604 /// System Resource Affinity Table (SRAT). The rest of the table 605 /// must be defined in a platform specific manner. 606 /// 607 typedef struct { 608 EFI_ACPI_DESCRIPTION_HEADER Header; 609 UINT32 Reserved1; ///< Must be set to 1 610 UINT64 Reserved2; 611 } EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER; 612 613 /// 614 /// SRAT Version (as defined in ACPI 5.1 spec.) 615 /// 616 #define EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03 617 618 // 619 // SRAT structure types. 620 // All other values between 0x04 an 0xFF are reserved and 621 // will be ignored by OSPM. 622 // 623 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00 624 #define EFI_ACPI_5_1_MEMORY_AFFINITY 0x01 625 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02 626 #define EFI_ACPI_5_1_GICC_AFFINITY 0x03 627 628 /// 629 /// Processor Local APIC/SAPIC Affinity Structure Definition 630 /// 631 typedef struct { 632 UINT8 Type; 633 UINT8 Length; 634 UINT8 ProximityDomain7To0; 635 UINT8 ApicId; 636 UINT32 Flags; 637 UINT8 LocalSapicEid; 638 UINT8 ProximityDomain31To8[3]; 639 UINT32 ClockDomain; 640 } EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE; 641 642 /// 643 /// Local APIC/SAPIC Flags. All other bits are reserved and must be 0. 644 /// 645 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0) 646 647 /// 648 /// Memory Affinity Structure Definition 649 /// 650 typedef struct { 651 UINT8 Type; 652 UINT8 Length; 653 UINT32 ProximityDomain; 654 UINT16 Reserved1; 655 UINT32 AddressBaseLow; 656 UINT32 AddressBaseHigh; 657 UINT32 LengthLow; 658 UINT32 LengthHigh; 659 UINT32 Reserved2; 660 UINT32 Flags; 661 UINT64 Reserved3; 662 } EFI_ACPI_5_1_MEMORY_AFFINITY_STRUCTURE; 663 664 // 665 // Memory Flags. All other bits are reserved and must be 0. 666 // 667 #define EFI_ACPI_5_1_MEMORY_ENABLED (1 << 0) 668 #define EFI_ACPI_5_1_MEMORY_HOT_PLUGGABLE (1 << 1) 669 #define EFI_ACPI_5_1_MEMORY_NONVOLATILE (1 << 2) 670 671 /// 672 /// Processor Local x2APIC Affinity Structure Definition 673 /// 674 typedef struct { 675 UINT8 Type; 676 UINT8 Length; 677 UINT8 Reserved1[2]; 678 UINT32 ProximityDomain; 679 UINT32 X2ApicId; 680 UINT32 Flags; 681 UINT32 ClockDomain; 682 UINT8 Reserved2[4]; 683 } EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE; 684 685 /// 686 /// GICC Affinity Structure Definition 687 /// 688 typedef struct { 689 UINT8 Type; 690 UINT8 Length; 691 UINT32 ProximityDomain; 692 UINT32 AcpiProcessorUid; 693 UINT32 Flags; 694 UINT32 ClockDomain; 695 } EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE; 696 697 /// 698 /// GICC Flags. All other bits are reserved and must be 0. 699 /// 700 #define EFI_ACPI_5_1_GICC_ENABLED (1 << 0) 701 702 /// 703 /// System Locality Distance Information Table (SLIT). 704 /// The rest of the table is a matrix. 705 /// 706 typedef struct { 707 EFI_ACPI_DESCRIPTION_HEADER Header; 708 UINT64 NumberOfSystemLocalities; 709 } EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER; 710 711 /// 712 /// SLIT Version (as defined in ACPI 5.1 spec.) 713 /// 714 #define EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01 715 716 /// 717 /// Corrected Platform Error Polling Table (CPEP) 718 /// 719 typedef struct { 720 EFI_ACPI_DESCRIPTION_HEADER Header; 721 UINT8 Reserved[8]; 722 } EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER; 723 724 /// 725 /// CPEP Version (as defined in ACPI 5.1 spec.) 726 /// 727 #define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01 728 729 // 730 // CPEP processor structure types. 731 // 732 #define EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC 0x00 733 734 /// 735 /// Corrected Platform Error Polling Processor Structure Definition 736 /// 737 typedef struct { 738 UINT8 Type; 739 UINT8 Length; 740 UINT8 ProcessorId; 741 UINT8 ProcessorEid; 742 UINT32 PollingInterval; 743 } EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE; 744 745 /// 746 /// Maximum System Characteristics Table (MSCT) 747 /// 748 typedef struct { 749 EFI_ACPI_DESCRIPTION_HEADER Header; 750 UINT32 OffsetProxDomInfo; 751 UINT32 MaximumNumberOfProximityDomains; 752 UINT32 MaximumNumberOfClockDomains; 753 UINT64 MaximumPhysicalAddress; 754 } EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER; 755 756 /// 757 /// MSCT Version (as defined in ACPI 5.1 spec.) 758 /// 759 #define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01 760 761 /// 762 /// Maximum Proximity Domain Information Structure Definition 763 /// 764 typedef struct { 765 UINT8 Revision; 766 UINT8 Length; 767 UINT32 ProximityDomainRangeLow; 768 UINT32 ProximityDomainRangeHigh; 769 UINT32 MaximumProcessorCapacity; 770 UINT64 MaximumMemoryCapacity; 771 } EFI_ACPI_5_1_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE; 772 773 /// 774 /// ACPI RAS Feature Table definition. 775 /// 776 typedef struct { 777 EFI_ACPI_DESCRIPTION_HEADER Header; 778 UINT8 PlatformCommunicationChannelIdentifier[12]; 779 } EFI_ACPI_5_1_RAS_FEATURE_TABLE; 780 781 /// 782 /// RASF Version (as defined in ACPI 5.1 spec.) 783 /// 784 #define EFI_ACPI_5_1_RAS_FEATURE_TABLE_REVISION 0x01 785 786 /// 787 /// ACPI RASF Platform Communication Channel Shared Memory Region definition. 788 /// 789 typedef struct { 790 UINT32 Signature; 791 UINT16 Command; 792 UINT16 Status; 793 UINT16 Version; 794 UINT8 RASCapabilities[16]; 795 UINT8 SetRASCapabilities[16]; 796 UINT16 NumberOfRASFParameterBlocks; 797 UINT32 SetRASCapabilitiesStatus; 798 } EFI_ACPI_5_1_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION; 799 800 /// 801 /// ACPI RASF PCC command code 802 /// 803 #define EFI_ACPI_5_1_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01 804 805 /// 806 /// ACPI RASF Platform RAS Capabilities 807 /// 808 #define EFI_ACPI_5_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED 0x01 809 #define EFI_ACPI_5_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED_AND_EXPOSED_TO_SOFTWARE 0x02 810 811 /// 812 /// ACPI RASF Parameter Block structure for PATROL_SCRUB 813 /// 814 typedef struct { 815 UINT16 Type; 816 UINT16 Version; 817 UINT16 Length; 818 UINT16 PatrolScrubCommand; 819 UINT64 RequestedAddressRange[2]; 820 UINT64 ActualAddressRange[2]; 821 UINT16 Flags; 822 UINT8 RequestedSpeed; 823 } EFI_ACPI_5_1_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE; 824 825 /// 826 /// ACPI RASF Patrol Scrub command 827 /// 828 #define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01 829 #define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02 830 #define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03 831 832 /// 833 /// Memory Power State Table definition. 834 /// 835 typedef struct { 836 EFI_ACPI_DESCRIPTION_HEADER Header; 837 UINT8 PlatformCommunicationChannelIdentifier; 838 UINT8 Reserved[3]; 839 // Memory Power Node Structure 840 // Memory Power State Characteristics 841 } EFI_ACPI_5_1_MEMORY_POWER_STATUS_TABLE; 842 843 /// 844 /// MPST Version (as defined in ACPI 5.1 spec.) 845 /// 846 #define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_REVISION 0x01 847 848 /// 849 /// MPST Platform Communication Channel Shared Memory Region definition. 850 /// 851 typedef struct { 852 UINT32 Signature; 853 UINT16 Command; 854 UINT16 Status; 855 UINT32 MemoryPowerCommandRegister; 856 UINT32 MemoryPowerStatusRegister; 857 UINT32 PowerStateId; 858 UINT32 MemoryPowerNodeId; 859 UINT64 MemoryEnergyConsumed; 860 UINT64 ExpectedAveragePowerComsuned; 861 } EFI_ACPI_5_1_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION; 862 863 /// 864 /// ACPI MPST PCC command code 865 /// 866 #define EFI_ACPI_5_1_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03 867 868 /// 869 /// ACPI MPST Memory Power command 870 /// 871 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01 872 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02 873 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03 874 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04 875 876 /// 877 /// MPST Memory Power Node Table 878 /// 879 typedef struct { 880 UINT8 PowerStateValue; 881 UINT8 PowerStateInformationIndex; 882 } EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE; 883 884 typedef struct { 885 UINT8 Flag; 886 UINT8 Reserved; 887 UINT16 MemoryPowerNodeId; 888 UINT32 Length; 889 UINT64 AddressBase; 890 UINT64 AddressLength; 891 UINT32 NumberOfPowerStates; 892 UINT32 NumberOfPhysicalComponents; 893 // EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates]; 894 // UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents]; 895 } EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE; 896 897 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01 898 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02 899 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04 900 901 typedef struct { 902 UINT16 MemoryPowerNodeCount; 903 UINT8 Reserved[2]; 904 } EFI_ACPI_5_1_MPST_MEMORY_POWER_NODE_TABLE; 905 906 /// 907 /// MPST Memory Power State Characteristics Table 908 /// 909 typedef struct { 910 UINT8 PowerStateStructureID; 911 UINT8 Flag; 912 UINT16 Reserved; 913 UINT32 AveragePowerConsumedInMPS0; 914 UINT32 RelativePowerSavingToMPS0; 915 UINT64 ExitLatencyToMPS0; 916 } EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE; 917 918 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01 919 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02 920 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04 921 922 typedef struct { 923 UINT16 MemoryPowerStateCharacteristicsCount; 924 UINT8 Reserved[2]; 925 } EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE; 926 927 /// 928 /// Memory Topology Table definition. 929 /// 930 typedef struct { 931 EFI_ACPI_DESCRIPTION_HEADER Header; 932 UINT32 Reserved; 933 } EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE; 934 935 /// 936 /// PMTT Version (as defined in ACPI 5.1 spec.) 937 /// 938 #define EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE_REVISION 0x01 939 940 /// 941 /// Common Memory Aggregator Device Structure. 942 /// 943 typedef struct { 944 UINT8 Type; 945 UINT8 Reserved; 946 UINT16 Length; 947 UINT16 Flags; 948 UINT16 Reserved1; 949 } EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; 950 951 /// 952 /// Memory Aggregator Device Type 953 /// 954 #define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x0 955 #define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x1 956 #define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x2 957 958 /// 959 /// Socket Memory Aggregator Device Structure. 960 /// 961 typedef struct { 962 EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header; 963 UINT16 SocketIdentifier; 964 UINT16 Reserved; 965 // EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[]; 966 } EFI_ACPI_5_1_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; 967 968 /// 969 /// MemoryController Memory Aggregator Device Structure. 970 /// 971 typedef struct { 972 EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header; 973 UINT32 ReadLatency; 974 UINT32 WriteLatency; 975 UINT32 ReadBandwidth; 976 UINT32 WriteBandwidth; 977 UINT16 OptimalAccessUnit; 978 UINT16 OptimalAccessAlignment; 979 UINT16 Reserved; 980 UINT16 NumberOfProximityDomains; 981 // UINT32 ProximityDomain[NumberOfProximityDomains]; 982 // EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[]; 983 } EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; 984 985 /// 986 /// DIMM Memory Aggregator Device Structure. 987 /// 988 typedef struct { 989 EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header; 990 UINT16 PhysicalComponentIdentifier; 991 UINT16 Reserved; 992 UINT32 SizeOfDimm; 993 UINT32 SmbiosHandle; 994 } EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; 995 996 /// 997 /// Boot Graphics Resource Table definition. 998 /// 999 typedef struct { 1000 EFI_ACPI_DESCRIPTION_HEADER Header; 1001 /// 1002 /// 2-bytes (16 bit) version ID. This value must be 1. 1003 /// 1004 UINT16 Version; 1005 /// 1006 /// 1-byte status field indicating current status about the table. 1007 /// Bits[7:1] = Reserved (must be zero) 1008 /// Bit [0] = Valid. A one indicates the boot image graphic is valid. 1009 /// 1010 UINT8 Status; 1011 /// 1012 /// 1-byte enumerated type field indicating format of the image. 1013 /// 0 = Bitmap 1014 /// 1 - 255 Reserved (for future use) 1015 /// 1016 UINT8 ImageType; 1017 /// 1018 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy 1019 /// of the image bitmap. 1020 /// 1021 UINT64 ImageAddress; 1022 /// 1023 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image. 1024 /// (X, Y) display offset of the top left corner of the boot image. 1025 /// The top left corner of the display is at offset (0, 0). 1026 /// 1027 UINT32 ImageOffsetX; 1028 /// 1029 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image. 1030 /// (X, Y) display offset of the top left corner of the boot image. 1031 /// The top left corner of the display is at offset (0, 0). 1032 /// 1033 UINT32 ImageOffsetY; 1034 } EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE; 1035 1036 /// 1037 /// BGRT Revision 1038 /// 1039 #define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1 1040 1041 /// 1042 /// BGRT Version 1043 /// 1044 #define EFI_ACPI_5_1_BGRT_VERSION 0x01 1045 1046 /// 1047 /// BGRT Status 1048 /// 1049 #define EFI_ACPI_5_1_BGRT_STATUS_NOT_DISPLAYED 0x00 1050 #define EFI_ACPI_5_1_BGRT_STATUS_DISPLAYED 0x01 1051 1052 /// 1053 /// BGRT Image Type 1054 /// 1055 #define EFI_ACPI_5_1_BGRT_IMAGE_TYPE_BMP 0x00 1056 1057 /// 1058 /// FPDT Version (as defined in ACPI 5.1 spec.) 1059 /// 1060 #define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01 1061 1062 /// 1063 /// FPDT Performance Record Types 1064 /// 1065 #define EFI_ACPI_5_1_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000 1066 #define EFI_ACPI_5_1_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001 1067 1068 /// 1069 /// FPDT Performance Record Revision 1070 /// 1071 #define EFI_ACPI_5_1_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01 1072 #define EFI_ACPI_5_1_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01 1073 1074 /// 1075 /// FPDT Runtime Performance Record Types 1076 /// 1077 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000 1078 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001 1079 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002 1080 1081 /// 1082 /// FPDT Runtime Performance Record Revision 1083 /// 1084 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01 1085 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01 1086 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02 1087 1088 /// 1089 /// FPDT Performance Record header 1090 /// 1091 typedef struct { 1092 UINT16 Type; 1093 UINT8 Length; 1094 UINT8 Revision; 1095 } EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER; 1096 1097 /// 1098 /// FPDT Performance Table header 1099 /// 1100 typedef struct { 1101 UINT32 Signature; 1102 UINT32 Length; 1103 } EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER; 1104 1105 /// 1106 /// FPDT Firmware Basic Boot Performance Pointer Record Structure 1107 /// 1108 typedef struct { 1109 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header; 1110 UINT32 Reserved; 1111 /// 1112 /// 64-bit processor-relative physical address of the Basic Boot Performance Table. 1113 /// 1114 UINT64 BootPerformanceTablePointer; 1115 } EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD; 1116 1117 /// 1118 /// FPDT S3 Performance Table Pointer Record Structure 1119 /// 1120 typedef struct { 1121 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header; 1122 UINT32 Reserved; 1123 /// 1124 /// 64-bit processor-relative physical address of the S3 Performance Table. 1125 /// 1126 UINT64 S3PerformanceTablePointer; 1127 } EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD; 1128 1129 /// 1130 /// FPDT Firmware Basic Boot Performance Record Structure 1131 /// 1132 typedef struct { 1133 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header; 1134 UINT32 Reserved; 1135 /// 1136 /// Timer value logged at the beginning of firmware image execution. 1137 /// This may not always be zero or near zero. 1138 /// 1139 UINT64 ResetEnd; 1140 /// 1141 /// Timer value logged just prior to loading the OS boot loader into memory. 1142 /// For non-UEFI compatible boots, this field must be zero. 1143 /// 1144 UINT64 OsLoaderLoadImageStart; 1145 /// 1146 /// Timer value logged just prior to launching the previously loaded OS boot loader image. 1147 /// For non-UEFI compatible boots, the timer value logged will be just prior 1148 /// to the INT 19h handler invocation. 1149 /// 1150 UINT64 OsLoaderStartImageStart; 1151 /// 1152 /// Timer value logged at the point when the OS loader calls the 1153 /// ExitBootServices function for UEFI compatible firmware. 1154 /// For non-UEFI compatible boots, this field must be zero. 1155 /// 1156 UINT64 ExitBootServicesEntry; 1157 /// 1158 /// Timer value logged at the point just prior to when the OS loader gaining 1159 /// control back from calls the ExitBootServices function for UEFI compatible firmware. 1160 /// For non-UEFI compatible boots, this field must be zero. 1161 /// 1162 UINT64 ExitBootServicesExit; 1163 } EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_RECORD; 1164 1165 /// 1166 /// FPDT Firmware Basic Boot Performance Table signature 1167 /// 1168 #define EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T') 1169 1170 // 1171 // FPDT Firmware Basic Boot Performance Table 1172 // 1173 typedef struct { 1174 EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header; 1175 // 1176 // one or more Performance Records. 1177 // 1178 } EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_TABLE; 1179 1180 /// 1181 /// FPDT "S3PT" S3 Performance Table 1182 /// 1183 #define EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T') 1184 1185 // 1186 // FPDT Firmware S3 Boot Performance Table 1187 // 1188 typedef struct { 1189 EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header; 1190 // 1191 // one or more Performance Records. 1192 // 1193 } EFI_ACPI_5_1_FPDT_FIRMWARE_S3_BOOT_TABLE; 1194 1195 /// 1196 /// FPDT Basic S3 Resume Performance Record 1197 /// 1198 typedef struct { 1199 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header; 1200 /// 1201 /// A count of the number of S3 resume cycles since the last full boot sequence. 1202 /// 1203 UINT32 ResumeCount; 1204 /// 1205 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the 1206 /// OS waking vector. Only the most recent resume cycle's time is retained. 1207 /// 1208 UINT64 FullResume; 1209 /// 1210 /// Average timer value of all resume cycles logged since the last full boot 1211 /// sequence, including the most recent resume. Note that the entire log of 1212 /// timer values does not need to be retained in order to calculate this average. 1213 /// 1214 UINT64 AverageResume; 1215 } EFI_ACPI_5_1_FPDT_S3_RESUME_RECORD; 1216 1217 /// 1218 /// FPDT Basic S3 Suspend Performance Record 1219 /// 1220 typedef struct { 1221 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header; 1222 /// 1223 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3. 1224 /// Only the most recent suspend cycle's timer value is retained. 1225 /// 1226 UINT64 SuspendStart; 1227 /// 1228 /// Timer value recorded at the final firmware write to SLP_TYP (or other 1229 /// mechanism) used to trigger hardware entry to S3. 1230 /// Only the most recent suspend cycle's timer value is retained. 1231 /// 1232 UINT64 SuspendEnd; 1233 } EFI_ACPI_5_1_FPDT_S3_SUSPEND_RECORD; 1234 1235 /// 1236 /// Firmware Performance Record Table definition. 1237 /// 1238 typedef struct { 1239 EFI_ACPI_DESCRIPTION_HEADER Header; 1240 } EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_RECORD_TABLE; 1241 1242 /// 1243 /// Generic Timer Description Table definition. 1244 /// 1245 typedef struct { 1246 EFI_ACPI_DESCRIPTION_HEADER Header; 1247 UINT64 CntControlBasePhysicalAddress; 1248 UINT32 Reserved; 1249 UINT32 SecurePL1TimerGSIV; 1250 UINT32 SecurePL1TimerFlags; 1251 UINT32 NonSecurePL1TimerGSIV; 1252 UINT32 NonSecurePL1TimerFlags; 1253 UINT32 VirtualTimerGSIV; 1254 UINT32 VirtualTimerFlags; 1255 UINT32 NonSecurePL2TimerGSIV; 1256 UINT32 NonSecurePL2TimerFlags; 1257 UINT64 CntReadBasePhysicalAddress; 1258 UINT32 PlatformTimerCount; 1259 UINT32 PlatformTimerOffset; 1260 } EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE; 1261 1262 /// 1263 /// GTDT Version (as defined in ACPI 5.1 spec.) 1264 /// 1265 #define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x02 1266 1267 /// 1268 /// Timer Flags. All other bits are reserved and must be 0. 1269 /// 1270 #define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0 1271 #define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1 1272 #define EFI_ACPI_5_1_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2 1273 1274 /// 1275 /// Platform Timer Type 1276 /// 1277 #define EFI_ACPI_5_1_GTDT_GT_BLOCK 0 1278 #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG 1 1279 1280 /// 1281 /// GT Block Structure 1282 /// 1283 typedef struct { 1284 UINT8 Type; 1285 UINT16 Length; 1286 UINT8 Reserved; 1287 UINT64 CntCtlBase; 1288 UINT32 GTBlockTimerCount; 1289 UINT32 GTBlockTimerOffset; 1290 } EFI_ACPI_5_1_GTDT_GT_BLOCK_STRUCTURE; 1291 1292 /// 1293 /// GT Block Timer Structure 1294 /// 1295 typedef struct { 1296 UINT8 GTFrameNumber; 1297 UINT8 Reserved[3]; 1298 UINT64 CntBaseX; 1299 UINT64 CntEL0BaseX; 1300 UINT32 GTxPhysicalTimerGSIV; 1301 UINT32 GTxPhysicalTimerFlags; 1302 UINT32 GTxVirtualTimerGSIV; 1303 UINT32 GTxVirtualTimerFlags; 1304 UINT32 GTxCommonFlags; 1305 } EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_STRUCTURE; 1306 1307 /// 1308 /// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0. 1309 /// 1310 #define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0 1311 #define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1 1312 1313 /// 1314 /// Common Flags Flags. All other bits are reserved and must be 0. 1315 /// 1316 #define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0 1317 #define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1 1318 1319 /// 1320 /// SBSA Generic Watchdog Structure 1321 /// 1322 typedef struct { 1323 UINT8 Type; 1324 UINT16 Length; 1325 UINT8 Reserved; 1326 UINT64 RefreshFramePhysicalAddress; 1327 UINT64 WatchdogControlFramePhysicalAddress; 1328 UINT32 WatchdogTimerGSIV; 1329 UINT32 WatchdogTimerFlags; 1330 } EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE; 1331 1332 /// 1333 /// SBSA Generic Watchdog Timer Flags. All other bits are reserved and must be 0. 1334 /// 1335 #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0 1336 #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1 1337 #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2 1338 1339 /// 1340 /// Boot Error Record Table (BERT) 1341 /// 1342 typedef struct { 1343 EFI_ACPI_DESCRIPTION_HEADER Header; 1344 UINT32 BootErrorRegionLength; 1345 UINT64 BootErrorRegion; 1346 } EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_HEADER; 1347 1348 /// 1349 /// BERT Version (as defined in ACPI 5.1 spec.) 1350 /// 1351 #define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_REVISION 0x01 1352 1353 /// 1354 /// Boot Error Region Block Status Definition 1355 /// 1356 typedef struct { 1357 UINT32 UncorrectableErrorValid : 1; 1358 UINT32 CorrectableErrorValid : 1; 1359 UINT32 MultipleUncorrectableErrors : 1; 1360 UINT32 MultipleCorrectableErrors : 1; 1361 UINT32 ErrorDataEntryCount : 10; 1362 UINT32 Reserved : 18; 1363 } EFI_ACPI_5_1_ERROR_BLOCK_STATUS; 1364 1365 /// 1366 /// Boot Error Region Definition 1367 /// 1368 typedef struct { 1369 EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus; 1370 UINT32 RawDataOffset; 1371 UINT32 RawDataLength; 1372 UINT32 DataLength; 1373 UINT32 ErrorSeverity; 1374 } EFI_ACPI_5_1_BOOT_ERROR_REGION_STRUCTURE; 1375 1376 // 1377 // Boot Error Severity types 1378 // 1379 #define EFI_ACPI_5_1_ERROR_SEVERITY_RECOVERABLE 0x00 1380 #define EFI_ACPI_5_1_ERROR_SEVERITY_FATAL 0x01 1381 #define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTED 0x02 1382 #define EFI_ACPI_5_1_ERROR_SEVERITY_NONE 0x03 1383 // 1384 // The term 'Correctable' is no longer being used as an error severity of the 1385 // reported error since ACPI Specification Version 5.1 Errata B. 1386 // The below macro is considered as deprecated and should no longer be used. 1387 // 1388 #define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTABLE 0x00 1389 1390 /// 1391 /// Generic Error Data Entry Definition 1392 /// 1393 typedef struct { 1394 UINT8 SectionType[16]; 1395 UINT32 ErrorSeverity; 1396 UINT16 Revision; 1397 UINT8 ValidationBits; 1398 UINT8 Flags; 1399 UINT32 ErrorDataLength; 1400 UINT8 FruId[16]; 1401 UINT8 FruText[20]; 1402 } EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_STRUCTURE; 1403 1404 /// 1405 /// Generic Error Data Entry Version (as defined in ACPI 5.1 spec.) 1406 /// 1407 #define EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0201 1408 1409 /// 1410 /// HEST - Hardware Error Source Table 1411 /// 1412 typedef struct { 1413 EFI_ACPI_DESCRIPTION_HEADER Header; 1414 UINT32 ErrorSourceCount; 1415 } EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_HEADER; 1416 1417 /// 1418 /// HEST Version (as defined in ACPI 5.1 spec.) 1419 /// 1420 #define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01 1421 1422 // 1423 // Error Source structure types. 1424 // 1425 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00 1426 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01 1427 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR 0x02 1428 #define EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER 0x06 1429 #define EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER 0x07 1430 #define EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER 0x08 1431 #define EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR 0x09 1432 1433 // 1434 // Error Source structure flags. 1435 // 1436 #define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0) 1437 #define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_GLOBAL (1 << 1) 1438 1439 /// 1440 /// IA-32 Architecture Machine Check Exception Structure Definition 1441 /// 1442 typedef struct { 1443 UINT16 Type; 1444 UINT16 SourceId; 1445 UINT8 Reserved0[2]; 1446 UINT8 Flags; 1447 UINT8 Enabled; 1448 UINT32 NumberOfRecordsToPreAllocate; 1449 UINT32 MaxSectionsPerRecord; 1450 UINT64 GlobalCapabilityInitData; 1451 UINT64 GlobalControlInitData; 1452 UINT8 NumberOfHardwareBanks; 1453 UINT8 Reserved1[7]; 1454 } EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE; 1455 1456 /// 1457 /// IA-32 Architecture Machine Check Bank Structure Definition 1458 /// 1459 typedef struct { 1460 UINT8 BankNumber; 1461 UINT8 ClearStatusOnInitialization; 1462 UINT8 StatusDataFormat; 1463 UINT8 Reserved0; 1464 UINT32 ControlRegisterMsrAddress; 1465 UINT64 ControlInitData; 1466 UINT32 StatusRegisterMsrAddress; 1467 UINT32 AddressRegisterMsrAddress; 1468 UINT32 MiscRegisterMsrAddress; 1469 } EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE; 1470 1471 /// 1472 /// IA-32 Architecture Machine Check Bank Structure MCA data format 1473 /// 1474 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00 1475 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01 1476 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02 1477 1478 // 1479 // Hardware Error Notification types. All other values are reserved 1480 // 1481 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00 1482 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01 1483 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02 1484 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_SCI 0x03 1485 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_NMI 0x04 1486 1487 /// 1488 /// Hardware Error Notification Configuration Write Enable Structure Definition 1489 /// 1490 typedef struct { 1491 UINT16 Type : 1; 1492 UINT16 PollInterval : 1; 1493 UINT16 SwitchToPollingThresholdValue : 1; 1494 UINT16 SwitchToPollingThresholdWindow : 1; 1495 UINT16 ErrorThresholdValue : 1; 1496 UINT16 ErrorThresholdWindow : 1; 1497 UINT16 Reserved : 10; 1498 } EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE; 1499 1500 /// 1501 /// Hardware Error Notification Structure Definition 1502 /// 1503 typedef struct { 1504 UINT8 Type; 1505 UINT8 Length; 1506 EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable; 1507 UINT32 PollInterval; 1508 UINT32 Vector; 1509 UINT32 SwitchToPollingThresholdValue; 1510 UINT32 SwitchToPollingThresholdWindow; 1511 UINT32 ErrorThresholdValue; 1512 UINT32 ErrorThresholdWindow; 1513 } EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE; 1514 1515 /// 1516 /// IA-32 Architecture Corrected Machine Check Structure Definition 1517 /// 1518 typedef struct { 1519 UINT16 Type; 1520 UINT16 SourceId; 1521 UINT8 Reserved0[2]; 1522 UINT8 Flags; 1523 UINT8 Enabled; 1524 UINT32 NumberOfRecordsToPreAllocate; 1525 UINT32 MaxSectionsPerRecord; 1526 EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure; 1527 UINT8 NumberOfHardwareBanks; 1528 UINT8 Reserved1[3]; 1529 } EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE; 1530 1531 /// 1532 /// IA-32 Architecture NMI Error Structure Definition 1533 /// 1534 typedef struct { 1535 UINT16 Type; 1536 UINT16 SourceId; 1537 UINT8 Reserved0[2]; 1538 UINT32 NumberOfRecordsToPreAllocate; 1539 UINT32 MaxSectionsPerRecord; 1540 UINT32 MaxRawDataLength; 1541 } EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE; 1542 1543 /// 1544 /// PCI Express Root Port AER Structure Definition 1545 /// 1546 typedef struct { 1547 UINT16 Type; 1548 UINT16 SourceId; 1549 UINT8 Reserved0[2]; 1550 UINT8 Flags; 1551 UINT8 Enabled; 1552 UINT32 NumberOfRecordsToPreAllocate; 1553 UINT32 MaxSectionsPerRecord; 1554 UINT32 Bus; 1555 UINT16 Device; 1556 UINT16 Function; 1557 UINT16 DeviceControl; 1558 UINT8 Reserved1[2]; 1559 UINT32 UncorrectableErrorMask; 1560 UINT32 UncorrectableErrorSeverity; 1561 UINT32 CorrectableErrorMask; 1562 UINT32 AdvancedErrorCapabilitiesAndControl; 1563 UINT32 RootErrorCommand; 1564 } EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE; 1565 1566 /// 1567 /// PCI Express Device AER Structure Definition 1568 /// 1569 typedef struct { 1570 UINT16 Type; 1571 UINT16 SourceId; 1572 UINT8 Reserved0[2]; 1573 UINT8 Flags; 1574 UINT8 Enabled; 1575 UINT32 NumberOfRecordsToPreAllocate; 1576 UINT32 MaxSectionsPerRecord; 1577 UINT32 Bus; 1578 UINT16 Device; 1579 UINT16 Function; 1580 UINT16 DeviceControl; 1581 UINT8 Reserved1[2]; 1582 UINT32 UncorrectableErrorMask; 1583 UINT32 UncorrectableErrorSeverity; 1584 UINT32 CorrectableErrorMask; 1585 UINT32 AdvancedErrorCapabilitiesAndControl; 1586 } EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER_STRUCTURE; 1587 1588 /// 1589 /// PCI Express Bridge AER Structure Definition 1590 /// 1591 typedef struct { 1592 UINT16 Type; 1593 UINT16 SourceId; 1594 UINT8 Reserved0[2]; 1595 UINT8 Flags; 1596 UINT8 Enabled; 1597 UINT32 NumberOfRecordsToPreAllocate; 1598 UINT32 MaxSectionsPerRecord; 1599 UINT32 Bus; 1600 UINT16 Device; 1601 UINT16 Function; 1602 UINT16 DeviceControl; 1603 UINT8 Reserved1[2]; 1604 UINT32 UncorrectableErrorMask; 1605 UINT32 UncorrectableErrorSeverity; 1606 UINT32 CorrectableErrorMask; 1607 UINT32 AdvancedErrorCapabilitiesAndControl; 1608 UINT32 SecondaryUncorrectableErrorMask; 1609 UINT32 SecondaryUncorrectableErrorSeverity; 1610 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl; 1611 } EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER_STRUCTURE; 1612 1613 /// 1614 /// Generic Hardware Error Source Structure Definition 1615 /// 1616 typedef struct { 1617 UINT16 Type; 1618 UINT16 SourceId; 1619 UINT16 RelatedSourceId; 1620 UINT8 Flags; 1621 UINT8 Enabled; 1622 UINT32 NumberOfRecordsToPreAllocate; 1623 UINT32 MaxSectionsPerRecord; 1624 UINT32 MaxRawDataLength; 1625 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress; 1626 EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure; 1627 UINT32 ErrorStatusBlockLength; 1628 } EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE; 1629 1630 /// 1631 /// Generic Error Status Definition 1632 /// 1633 typedef struct { 1634 EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus; 1635 UINT32 RawDataOffset; 1636 UINT32 RawDataLength; 1637 UINT32 DataLength; 1638 UINT32 ErrorSeverity; 1639 } EFI_ACPI_5_1_GENERIC_ERROR_STATUS_STRUCTURE; 1640 1641 /// 1642 /// ERST - Error Record Serialization Table 1643 /// 1644 typedef struct { 1645 EFI_ACPI_DESCRIPTION_HEADER Header; 1646 UINT32 SerializationHeaderSize; 1647 UINT8 Reserved0[4]; 1648 UINT32 InstructionEntryCount; 1649 } EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_HEADER; 1650 1651 /// 1652 /// ERST Version (as defined in ACPI 5.1 spec.) 1653 /// 1654 #define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01 1655 1656 /// 1657 /// ERST Serialization Actions 1658 /// 1659 #define EFI_ACPI_5_1_ERST_BEGIN_WRITE_OPERATION 0x00 1660 #define EFI_ACPI_5_1_ERST_BEGIN_READ_OPERATION 0x01 1661 #define EFI_ACPI_5_1_ERST_BEGIN_CLEAR_OPERATION 0x02 1662 #define EFI_ACPI_5_1_ERST_END_OPERATION 0x03 1663 #define EFI_ACPI_5_1_ERST_SET_RECORD_OFFSET 0x04 1664 #define EFI_ACPI_5_1_ERST_EXECUTE_OPERATION 0x05 1665 #define EFI_ACPI_5_1_ERST_CHECK_BUSY_STATUS 0x06 1666 #define EFI_ACPI_5_1_ERST_GET_COMMAND_STATUS 0x07 1667 #define EFI_ACPI_5_1_ERST_GET_RECORD_IDENTIFIER 0x08 1668 #define EFI_ACPI_5_1_ERST_SET_RECORD_IDENTIFIER 0x09 1669 #define EFI_ACPI_5_1_ERST_GET_RECORD_COUNT 0x0A 1670 #define EFI_ACPI_5_1_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B 1671 #define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D 1672 #define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E 1673 #define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F 1674 1675 /// 1676 /// ERST Action Command Status 1677 /// 1678 #define EFI_ACPI_5_1_ERST_STATUS_SUCCESS 0x00 1679 #define EFI_ACPI_5_1_ERST_STATUS_NOT_ENOUGH_SPACE 0x01 1680 #define EFI_ACPI_5_1_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02 1681 #define EFI_ACPI_5_1_ERST_STATUS_FAILED 0x03 1682 #define EFI_ACPI_5_1_ERST_STATUS_RECORD_STORE_EMPTY 0x04 1683 #define EFI_ACPI_5_1_ERST_STATUS_RECORD_NOT_FOUND 0x05 1684 1685 /// 1686 /// ERST Serialization Instructions 1687 /// 1688 #define EFI_ACPI_5_1_ERST_READ_REGISTER 0x00 1689 #define EFI_ACPI_5_1_ERST_READ_REGISTER_VALUE 0x01 1690 #define EFI_ACPI_5_1_ERST_WRITE_REGISTER 0x02 1691 #define EFI_ACPI_5_1_ERST_WRITE_REGISTER_VALUE 0x03 1692 #define EFI_ACPI_5_1_ERST_NOOP 0x04 1693 #define EFI_ACPI_5_1_ERST_LOAD_VAR1 0x05 1694 #define EFI_ACPI_5_1_ERST_LOAD_VAR2 0x06 1695 #define EFI_ACPI_5_1_ERST_STORE_VAR1 0x07 1696 #define EFI_ACPI_5_1_ERST_ADD 0x08 1697 #define EFI_ACPI_5_1_ERST_SUBTRACT 0x09 1698 #define EFI_ACPI_5_1_ERST_ADD_VALUE 0x0A 1699 #define EFI_ACPI_5_1_ERST_SUBTRACT_VALUE 0x0B 1700 #define EFI_ACPI_5_1_ERST_STALL 0x0C 1701 #define EFI_ACPI_5_1_ERST_STALL_WHILE_TRUE 0x0D 1702 #define EFI_ACPI_5_1_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E 1703 #define EFI_ACPI_5_1_ERST_GOTO 0x0F 1704 #define EFI_ACPI_5_1_ERST_SET_SRC_ADDRESS_BASE 0x10 1705 #define EFI_ACPI_5_1_ERST_SET_DST_ADDRESS_BASE 0x11 1706 #define EFI_ACPI_5_1_ERST_MOVE_DATA 0x12 1707 1708 /// 1709 /// ERST Instruction Flags 1710 /// 1711 #define EFI_ACPI_5_1_ERST_PRESERVE_REGISTER 0x01 1712 1713 /// 1714 /// ERST Serialization Instruction Entry 1715 /// 1716 typedef struct { 1717 UINT8 SerializationAction; 1718 UINT8 Instruction; 1719 UINT8 Flags; 1720 UINT8 Reserved0; 1721 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion; 1722 UINT64 Value; 1723 UINT64 Mask; 1724 } EFI_ACPI_5_1_ERST_SERIALIZATION_INSTRUCTION_ENTRY; 1725 1726 /// 1727 /// EINJ - Error Injection Table 1728 /// 1729 typedef struct { 1730 EFI_ACPI_DESCRIPTION_HEADER Header; 1731 UINT32 InjectionHeaderSize; 1732 UINT8 InjectionFlags; 1733 UINT8 Reserved0[3]; 1734 UINT32 InjectionEntryCount; 1735 } EFI_ACPI_5_1_ERROR_INJECTION_TABLE_HEADER; 1736 1737 /// 1738 /// EINJ Version (as defined in ACPI 5.1 spec.) 1739 /// 1740 #define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_REVISION 0x01 1741 1742 /// 1743 /// EINJ Error Injection Actions 1744 /// 1745 #define EFI_ACPI_5_1_EINJ_BEGIN_INJECTION_OPERATION 0x00 1746 #define EFI_ACPI_5_1_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01 1747 #define EFI_ACPI_5_1_EINJ_SET_ERROR_TYPE 0x02 1748 #define EFI_ACPI_5_1_EINJ_GET_ERROR_TYPE 0x03 1749 #define EFI_ACPI_5_1_EINJ_END_OPERATION 0x04 1750 #define EFI_ACPI_5_1_EINJ_EXECUTE_OPERATION 0x05 1751 #define EFI_ACPI_5_1_EINJ_CHECK_BUSY_STATUS 0x06 1752 #define EFI_ACPI_5_1_EINJ_GET_COMMAND_STATUS 0x07 1753 #define EFI_ACPI_5_1_EINJ_TRIGGER_ERROR 0xFF 1754 1755 /// 1756 /// EINJ Action Command Status 1757 /// 1758 #define EFI_ACPI_5_1_EINJ_STATUS_SUCCESS 0x00 1759 #define EFI_ACPI_5_1_EINJ_STATUS_UNKNOWN_FAILURE 0x01 1760 #define EFI_ACPI_5_1_EINJ_STATUS_INVALID_ACCESS 0x02 1761 1762 /// 1763 /// EINJ Error Type Definition 1764 /// 1765 #define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0) 1766 #define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1) 1767 #define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2) 1768 #define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3) 1769 #define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4) 1770 #define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5) 1771 #define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6) 1772 #define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7) 1773 #define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8) 1774 #define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9) 1775 #define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10) 1776 #define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11) 1777 1778 /// 1779 /// EINJ Injection Instructions 1780 /// 1781 #define EFI_ACPI_5_1_EINJ_READ_REGISTER 0x00 1782 #define EFI_ACPI_5_1_EINJ_READ_REGISTER_VALUE 0x01 1783 #define EFI_ACPI_5_1_EINJ_WRITE_REGISTER 0x02 1784 #define EFI_ACPI_5_1_EINJ_WRITE_REGISTER_VALUE 0x03 1785 #define EFI_ACPI_5_1_EINJ_NOOP 0x04 1786 1787 /// 1788 /// EINJ Instruction Flags 1789 /// 1790 #define EFI_ACPI_5_1_EINJ_PRESERVE_REGISTER 0x01 1791 1792 /// 1793 /// EINJ Injection Instruction Entry 1794 /// 1795 typedef struct { 1796 UINT8 InjectionAction; 1797 UINT8 Instruction; 1798 UINT8 Flags; 1799 UINT8 Reserved0; 1800 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion; 1801 UINT64 Value; 1802 UINT64 Mask; 1803 } EFI_ACPI_5_1_EINJ_INJECTION_INSTRUCTION_ENTRY; 1804 1805 /// 1806 /// EINJ Trigger Action Table 1807 /// 1808 typedef struct { 1809 UINT32 HeaderSize; 1810 UINT32 Revision; 1811 UINT32 TableSize; 1812 UINT32 EntryCount; 1813 } EFI_ACPI_5_1_EINJ_TRIGGER_ACTION_TABLE; 1814 1815 /// 1816 /// Platform Communications Channel Table (PCCT) 1817 /// 1818 typedef struct { 1819 EFI_ACPI_DESCRIPTION_HEADER Header; 1820 UINT32 Flags; 1821 UINT64 Reserved; 1822 } EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER; 1823 1824 /// 1825 /// PCCT Version (as defined in ACPI 5.1 spec.) 1826 /// 1827 #define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01 1828 1829 /// 1830 /// PCCT Global Flags 1831 /// 1832 #define EFI_ACPI_5_1_PCCT_FLAGS_SCI_DOORBELL BIT0 1833 1834 // 1835 // PCCT Subspace type 1836 // 1837 #define EFI_ACPI_5_1_PCCT_SUBSPACE_TYPE_GENERIC 0x00 1838 1839 /// 1840 /// PCC Subspace Structure Header 1841 /// 1842 typedef struct { 1843 UINT8 Type; 1844 UINT8 Length; 1845 } EFI_ACPI_5_1_PCCT_SUBSPACE_HEADER; 1846 1847 /// 1848 /// Generic Communications Subspace Structure 1849 /// 1850 typedef struct { 1851 UINT8 Type; 1852 UINT8 Length; 1853 UINT8 Reserved[6]; 1854 UINT64 BaseAddress; 1855 UINT64 AddressLength; 1856 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE DoorbellRegister; 1857 UINT64 DoorbellPreserve; 1858 UINT64 DoorbellWrite; 1859 UINT32 NominalLatency; 1860 UINT32 MaximumPeriodicAccessRate; 1861 UINT16 MinimumRequestTurnaroundTime; 1862 } EFI_ACPI_5_1_PCCT_SUBSPACE_GENERIC; 1863 1864 /// 1865 /// Generic Communications Channel Shared Memory Region 1866 /// 1867 1868 typedef struct { 1869 UINT8 Command; 1870 UINT8 Reserved : 7; 1871 UINT8 GenerateSci : 1; 1872 } EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND; 1873 1874 typedef struct { 1875 UINT8 CommandComplete : 1; 1876 UINT8 SciDoorbell : 1; 1877 UINT8 Error : 1; 1878 UINT8 PlatformNotification : 1; 1879 UINT8 Reserved : 4; 1880 UINT8 Reserved1; 1881 } EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS; 1882 1883 typedef struct { 1884 UINT32 Signature; 1885 EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command; 1886 EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status; 1887 } EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER; 1888 1889 // 1890 // Known table signatures 1891 // 1892 1893 /// 1894 /// "RSD PTR " Root System Description Pointer 1895 /// 1896 #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ') 1897 1898 /// 1899 /// "APIC" Multiple APIC Description Table 1900 /// 1901 #define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C') 1902 1903 /// 1904 /// "BERT" Boot Error Record Table 1905 /// 1906 #define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T') 1907 1908 /// 1909 /// "BGRT" Boot Graphics Resource Table 1910 /// 1911 #define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T') 1912 1913 /// 1914 /// "CPEP" Corrected Platform Error Polling Table 1915 /// 1916 #define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P') 1917 1918 /// 1919 /// "DSDT" Differentiated System Description Table 1920 /// 1921 #define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T') 1922 1923 /// 1924 /// "ECDT" Embedded Controller Boot Resources Table 1925 /// 1926 #define EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T') 1927 1928 /// 1929 /// "EINJ" Error Injection Table 1930 /// 1931 #define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J') 1932 1933 /// 1934 /// "ERST" Error Record Serialization Table 1935 /// 1936 #define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T') 1937 1938 /// 1939 /// "FACP" Fixed ACPI Description Table 1940 /// 1941 #define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P') 1942 1943 /// 1944 /// "FACS" Firmware ACPI Control Structure 1945 /// 1946 #define EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S') 1947 1948 /// 1949 /// "FPDT" Firmware Performance Data Table 1950 /// 1951 #define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T') 1952 1953 /// 1954 /// "GTDT" Generic Timer Description Table 1955 /// 1956 #define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T') 1957 1958 /// 1959 /// "HEST" Hardware Error Source Table 1960 /// 1961 #define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T') 1962 1963 /// 1964 /// "MPST" Memory Power State Table 1965 /// 1966 #define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T') 1967 1968 /// 1969 /// "MSCT" Maximum System Characteristics Table 1970 /// 1971 #define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T') 1972 1973 /// 1974 /// "PMTT" Platform Memory Topology Table 1975 /// 1976 #define EFI_ACPI_5_1_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T') 1977 1978 /// 1979 /// "PSDT" Persistent System Description Table 1980 /// 1981 #define EFI_ACPI_5_1_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T') 1982 1983 /// 1984 /// "RASF" ACPI RAS Feature Table 1985 /// 1986 #define EFI_ACPI_5_1_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F') 1987 1988 /// 1989 /// "RSDT" Root System Description Table 1990 /// 1991 #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T') 1992 1993 /// 1994 /// "SBST" Smart Battery Specification Table 1995 /// 1996 #define EFI_ACPI_5_1_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T') 1997 1998 /// 1999 /// "SLIT" System Locality Information Table 2000 /// 2001 #define EFI_ACPI_5_1_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T') 2002 2003 /// 2004 /// "SRAT" System Resource Affinity Table 2005 /// 2006 #define EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T') 2007 2008 /// 2009 /// "SSDT" Secondary System Description Table 2010 /// 2011 #define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T') 2012 2013 /// 2014 /// "XSDT" Extended System Description Table 2015 /// 2016 #define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T') 2017 2018 /// 2019 /// "BOOT" MS Simple Boot Spec 2020 /// 2021 #define EFI_ACPI_5_1_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T') 2022 2023 /// 2024 /// "CSRT" MS Core System Resource Table 2025 /// 2026 #define EFI_ACPI_5_1_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T') 2027 2028 /// 2029 /// "DBG2" MS Debug Port 2 Spec 2030 /// 2031 #define EFI_ACPI_5_1_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2') 2032 2033 /// 2034 /// "DBGP" MS Debug Port Spec 2035 /// 2036 #define EFI_ACPI_5_1_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P') 2037 2038 /// 2039 /// "DMAR" DMA Remapping Table 2040 /// 2041 #define EFI_ACPI_5_1_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R') 2042 2043 /// 2044 /// "DRTM" Dynamic Root of Trust for Measurement Table 2045 /// 2046 #define EFI_ACPI_5_1_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M') 2047 2048 /// 2049 /// "ETDT" Event Timer Description Table 2050 /// 2051 #define EFI_ACPI_5_1_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T') 2052 2053 /// 2054 /// "HPET" IA-PC High Precision Event Timer Table 2055 /// 2056 #define EFI_ACPI_5_1_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T') 2057 2058 /// 2059 /// "iBFT" iSCSI Boot Firmware Table 2060 /// 2061 #define EFI_ACPI_5_1_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T') 2062 2063 /// 2064 /// "IVRS" I/O Virtualization Reporting Structure 2065 /// 2066 #define EFI_ACPI_5_1_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S') 2067 2068 /// 2069 /// "LPIT" Low Power Idle Table 2070 /// 2071 #define EFI_ACPI_5_1_IO_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('L', 'P', 'I', 'T') 2072 2073 /// 2074 /// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table 2075 /// 2076 #define EFI_ACPI_5_1_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G') 2077 2078 /// 2079 /// "MCHI" Management Controller Host Interface Table 2080 /// 2081 #define EFI_ACPI_5_1_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I') 2082 2083 /// 2084 /// "MSDM" MS Data Management Table 2085 /// 2086 #define EFI_ACPI_5_1_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M') 2087 2088 /// 2089 /// "PCCT" Platform Communications Channel Table 2090 /// 2091 #define EFI_ACPI_5_1_PLATFORM_COMMUNICATIONS_CHANNEL_TABLE_SIGNATURE SIGNATURE_32('P', 'C', 'C', 'T') 2092 2093 /// 2094 /// "SLIC" MS Software Licensing Table Specification 2095 /// 2096 #define EFI_ACPI_5_1_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C') 2097 2098 /// 2099 /// "SPCR" Serial Port Console Redirection Table 2100 /// 2101 #define EFI_ACPI_5_1_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R') 2102 2103 /// 2104 /// "SPMI" Server Platform Management Interface Table 2105 /// 2106 #define EFI_ACPI_5_1_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I') 2107 2108 /// 2109 /// "TCPA" Trusted Computing Platform Alliance Capabilities Table 2110 /// 2111 #define EFI_ACPI_5_1_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A') 2112 2113 /// 2114 /// "TPM2" Trusted Computing Platform 1 Table 2115 /// 2116 #define EFI_ACPI_5_1_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2') 2117 2118 /// 2119 /// "UEFI" UEFI ACPI Data Table 2120 /// 2121 #define EFI_ACPI_5_1_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I') 2122 2123 /// 2124 /// "WAET" Windows ACPI Emulated Devices Table 2125 /// 2126 #define EFI_ACPI_5_1_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T') 2127 2128 /// 2129 /// "WDAT" Watchdog Action Table 2130 /// 2131 #define EFI_ACPI_5_1_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T') 2132 2133 /// 2134 /// "WDRT" Watchdog Resource Table 2135 /// 2136 #define EFI_ACPI_5_1_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T') 2137 2138 /// 2139 /// "WPBT" MS Platform Binary Table 2140 /// 2141 #define EFI_ACPI_5_1_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T') 2142 2143 #pragma pack() 2144 2145 #endif 2146