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Searched refs:DBG_PWR (Results 1 – 13 of 13) sorted by relevance

/illumos-gate/usr/src/uts/sun4u/io/pci/
H A Dpci_pwr.c86 DEBUG2(DBG_PWR, ddi_get_parent(dip), "ADDING NEW PWR_INFO %s@%s\n", in pci_pwr_create_info()
176 DEBUG3(DBG_PWR, ddi_get_parent(cdip), in pci_pwr_add_components()
287 DEBUG1(DBG_PWR, pwr_p->pwr_dip, "new_lvl: " in pci_pwr_new_lvl()
298 DEBUG1(DBG_PWR, pwr_p->pwr_dip, "new_lvl: unknown " in pci_pwr_new_lvl()
310 DEBUG1(DBG_PWR, pwr_p->pwr_dip, in pci_pwr_new_lvl()
315 DEBUG1(DBG_PWR, pwr_p->pwr_dip, in pci_pwr_new_lvl()
320 DEBUG1(DBG_PWR, pwr_p->pwr_dip, in pci_pwr_new_lvl()
325 DEBUG1(DBG_PWR, pwr_p->pwr_dip, in pci_pwr_new_lvl()
329 DEBUG0(DBG_PWR, pwr_p->pwr_dip, in pci_pwr_new_lvl()
364 DEBUG1(DBG_PWR, pwr_p->pwr_dip, in pci_pwr_new_lvl()
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H A Dpci_pci.c872 DEBUG2(DBG_PWR, ddi_get_parent(child), in ppb_initchild()
880 DEBUG2(DBG_PWR, ddi_get_parent(child), in ppb_initchild()
1021 DEBUG2(DBG_PWR, ddi_get_parent(dip), in ppb_removechild()
1065 DEBUG0(DBG_PWR, pdip, "bridge does not support PM. PCI" in ppb_pwr_setup()
1091 DEBUG0(DBG_PWR, pdip, "setup: B1 state supported\n"); in ppb_pwr_setup()
1094 DEBUG0(DBG_PWR, pdip, "setup: B1 state NOT supported\n"); in ppb_pwr_setup()
1097 DEBUG0(DBG_PWR, pdip, "setup: B2 state supported\n"); in ppb_pwr_setup()
1100 DEBUG0(DBG_PWR, pdip, "setup: B2 via D2 NOT supported\n"); in ppb_pwr_setup()
1104 DEBUG0(DBG_PWR, pdip, in ppb_pwr_setup()
1107 DEBUG0(DBG_PWR, pdip, in ppb_pwr_setup()
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H A Dpci_util.c377 DEBUG0(DBG_PWR, ddi_get_parent(child), "\n\n"); in uninit_child()
505 DEBUG0(DBG_PWR, child, in init_child()
511 DEBUG2(DBG_PWR, ddi_get_parent(child), in init_child()
886 DEBUG2(DBG_PWR, dip, in pci_child_cfg_restore()
H A Dpci_debug.c77 {DBG_PWR, "pwr"},
H A Dpcisch.c3519 DEBUG0(DBG_PWR, dip, "quiescing bus\n"); in pci_bus_quiesce()
/illumos-gate/usr/src/uts/common/io/pciex/
H A Dpcieb.c543 PCIEB_DEBUG(DBG_PWR, devi, "pwr_common_setup failed\n"); in pcieb_attach()
548 PCIEB_DEBUG(DBG_PWR, devi, "pxb_pwr_setup failed \n"); in pcieb_attach()
975 PCIEB_DEBUG(DBG_PWR, pcieb->pcieb_dip, in pcieb_initchild()
990 PCIEB_DEBUG(DBG_PWR, ddi_get_parent(child), in pcieb_initchild()
999 PCIEB_DEBUG(DBG_PWR, ddi_get_parent(child), in pcieb_initchild()
1861 PCIEB_DEBUG(DBG_PWR, dip, "pcieb_pwr_setup: pci_config_setup " in pcieb_pwr_setup()
1872 PCIEB_DEBUG(DBG_PWR, dip, "switch/bridge does not support PM. " in pcieb_pwr_setup()
1883 PCIEB_DEBUG(DBG_PWR, dip, "D1 state supported\n"); in pcieb_pwr_setup()
1887 PCIEB_DEBUG(DBG_PWR, dip, "D2 state supported\n"); in pcieb_pwr_setup()
1905 PCIEB_DEBUG(DBG_PWR, dip, "could not create pm-components " in pcieb_pwr_setup()
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H A Dpcieb.h45 /* 1 */ DBG_PWR, enumerator
/illumos-gate/usr/src/uts/sun4/io/px/
H A Dpx.c338 DBG(DBG_PWR, dip, "pwr_common_setup failed\n"); in px_attach()
340 DBG(DBG_PWR, dip, "px_pwr_setup failed \n"); in px_attach()
627 DBG(DBG_PWR, dip, "can't create kernel ioctl prop\n"); in px_pwr_setup()
651 DBG(DBG_PWR, dip, "px_pwr_setup: couldn't add " in px_pwr_setup()
661 DBG(DBG_PWR, dip, "px_pwr_setup: PME_TO_ACK update interrupt" in px_pwr_setup()
1287 DBG(DBG_PWR, dip, "PRE_ATTACH for %s@%d\n", in px_ctlops()
1293 DBG(DBG_PWR, dip, "PRE_RESUME for %s@%d\n", in px_ctlops()
1302 DBG(DBG_PWR, dip, "POST_ATTACH for %s@%d\n", in px_ctlops()
1336 DBG(DBG_PWR, dip, "POST_DETACH for %s@%d\n", in px_ctlops()
H A Dpx_util.c383 DBG(DBG_PWR, ddi_get_parent(child), "\n\n"); in px_uninit_child()
501 DBG(DBG_PWR, parent_dip, in px_init_child()
515 DBG(DBG_PWR, child, in px_init_child()
521 DBG(DBG_PWR, parent_dip, in px_init_child()
H A Dpx_debug.h90 /* 43 */ DBG_PWR, enumerator
/illumos-gate/usr/src/uts/sun4u/sys/pci/
H A Dpci_debug.h85 #define DBG_PWR (0x8000ull << 32) macro
/illumos-gate/usr/src/uts/sun4u/io/px/
H A Dpx_lib4u.c1838 DBG(DBG_PWR, px_p->px_dip, in px_lib_pmctl()
1843 DBG(DBG_PWR, px_p->px_dip, "ioctl: PRE_PWR_ON request\n"); in px_lib_pmctl()
1847 DBG(DBG_PWR, px_p->px_dip, "ioctl: POST_PWR_ON request\n"); in px_lib_pmctl()
1931 DBG(DBG_PWR, px_p->px_dip, " Timed out while waiting" in px_goto_l23ready()
1947 DBG(DBG_PWR, px_p->px_dip, " Link is not at L1" in px_goto_l23ready()
1978 DBG(DBG_PWR, px_p->px_dip, " PME_To_ACK received \n"); in px_pmeq_intr()
H A Dpx_hlib.c2995 DBG(DBG_PWR, NULL, "send_pme_turnoff: pending PTO bit " in px_send_pme_turnoff()
3025 DBG(DBG_PWR, NULL, "check_for_l1idle: ltssm_state %x\n", ltssm_state); in px_link_wait4l1idle()
3039 DBG(DBG_PWR, NULL, "retrain_link: detect.quiet bit not set\n"); in px_link_retrain()