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Searched refs:CPTRSIZE (Results 1 – 18 of 18) sorted by relevance

/illumos-gate/usr/src/lib/brand/shared/brand/sys/
H A Dbrand_misc.h78 #define EH_ARGS_SIZE (CPTRSIZE * EH_ARGS_COUNT)
79 #define EH_ARGS_OFFSET(x) (STACK_BIAS + MINFRAME + (CPTRSIZE * (x)))
81 SIZEOF_SYSRET_T + CPTRSIZE)
119 #define EH_LOCALS_SYSRET2 (EH_LOCALS_SYSRET + CPTRSIZE)
121 #define EH_LOCALS_END (EH_LOCALS_RVFLAG + CPTRSIZE)
/illumos-gate/usr/src/lib/brand/shared/brand/i386/
H A Dhandler.S102 addl $CPTRSIZE, %ecx
113 xchgl CPTRSIZE(%ebp), %eax /* swap JMP table offset and ret addr */
137 movl CPTRSIZE(%edx), %ecx /* number of args + rv flag */
140 movl CPTRSIZE(%edx), %ecx /* number of args + rv flag */
/illumos-gate/usr/src/uts/intel/sys/
H A Dasm_linkage.h77 #define CPTRSIZE CLONGSIZE macro
80 #if CPTRSIZE != (1 << CPTRSHIFT) || CLONGSIZE != (1 << CLONGSHIFT)
84 #if CPTRMASK != (CPTRSIZE - 1) || CLONGMASK != (CLONGSIZE - 1)
/illumos-gate/usr/src/uts/sun4/ml/
H A Doffsets.in115 \#define P_UTRAP4 (UT_ILLTRAP_INSTRUCTION * CPTRSIZE)
116 \#define P_UTRAP7 (UT_FP_DISABLED * CPTRSIZE)
117 \#define P_UTRAP8 (UT_FP_EXCEPTION_IEEE_754 * CPTRSIZE)
118 \#define P_UTRAP10 (UT_TAG_OVERFLOW * CPTRSIZE)
119 \#define P_UTRAP11 (UT_DIVISION_BY_ZERO * CPTRSIZE)
120 \#define P_UTRAP15 (UT_MEM_ADDRESS_NOT_ALIGNED * CPTRSIZE)
121 \#define P_UTRAP16 (UT_PRIVILEGED_ACTION * CPTRSIZE)
/illumos-gate/usr/src/lib/brand/shared/brand/amd64/
H A Dhandler.S111 addq $CPTRSIZE, %r12
125 xchgq CPTRSIZE(%rbp), %rax /* swap JMP table offset and ret addr */
148 movq CPTRSIZE(%r11), %r12 /* number of args + rv flag */
/illumos-gate/usr/src/uts/sparc/sys/
H A Dasm_linkage.h50 #define CPTRSIZE (1<<CPTRSHIFT) macro
52 #define CPTRMASK (CPTRSIZE - 1)
/illumos-gate/usr/src/lib/brand/shared/brand/sparc/
H A Drunexe.S59 sub %o0, CPTRSIZE + WINDOWSIZE + STACK_BIAS, %sp
H A Dcrt.S67 add %fp, + WINDOWSIZE + CPTRSIZE + STACK_BIAS, %o1
H A Dhandler.S141 ldn [%l3 + CPTRSIZE], %l4 /* number of args + rv flag */
/illumos-gate/usr/src/uts/intel/ml/
H A Dlock_prim.S399 .align CPTRSIZE
422 .align CPTRSIZE
H A Di86_subr.S388 movq %rsi, CPTRSIZE(%rdi) /* entryp->back = predp */
391 movq %rdi, CPTRSIZE(%rax) /* predp->forw->back = entryp */
401 movq CPTRSIZE(%rdi), %rdx /* entry->back */
403 movq %rdx, CPTRSIZE(%rax) /* entry->forw->back = entry->back */
H A Dmodstubs.S77 .align CPTRSIZE; \
89 .align CPTRSIZE; \
109 .align CPTRSIZE; \
132 .align CPTRSIZE; \
/illumos-gate/usr/src/uts/sun4v/ml/
H A Dmach_locore.S84 ….size intr_vec_table, MAXIVNUM * CPTRSIZE + MAX_RSVD_IV * IV_SIZE + MAX_RSVD_IVX * (IV_SIZE + CPTR…
H A Dtrap_table.S1563 smul %g1, CPTRSIZE, %g2
/illumos-gate/usr/src/uts/sun4u/ml/
H A Dmach_locore.S83 ….size intr_vec_table, MAXIVNUM * CPTRSIZE + MAX_RSVD_IV * IV_SIZE + MAX_RSVD_IVX * (IV_SIZE + CPTR…
H A Dtrap_table.S1791 smul %g1, CPTRSIZE, %g2
/illumos-gate/usr/src/uts/i86pc/ml/
H A Dsyscall_asm_amd64.S188 movq _CONST(_MUL(callback_id, CPTRSIZE))(%r15), %r15 ;\
1302 .align CPTRSIZE
/illumos-gate/usr/src/uts/sparc/ml/
H A Dmodstubs.S62 .align CPTRSIZE; \