| /freebsd/sys/contrib/device-tree/src/arm/nxp/imx/ |
| H A D | imx6qdl-skov-revc-lt2.dtsi | 69 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 70 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10 71 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 72 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 73 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10 74 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10 75 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10 76 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10 77 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10 78 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10 [all …]
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| H A D | imx6dl-skov-revc-lt6.dts | 76 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 77 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10 78 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 79 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 80 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10 81 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10 82 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10 83 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10 84 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10 85 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10 [all …]
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| H A D | imx6qdl-phytec-mira-peb-av-02.dtsi | 77 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 78 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 79 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 81 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10 82 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10 83 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10 84 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10 85 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10 86 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10 87 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10 [all …]
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| H A D | imx6q-skov-revc-lt6.dts | 98 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 99 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10 100 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 101 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 102 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10 103 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10 104 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10 105 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10 106 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10 107 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10 [all …]
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| H A D | imx6qdl-tx6.dtsi | 341 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 342 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10 343 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 344 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 346 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10 347 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10 348 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10 349 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10 350 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10 351 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10 [all …]
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| H A D | imx6ul-tx6ul-mainboard.dts | 167 MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x10 /* LSCLK */ 168 MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x10 /* OE_ACD */ 169 MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x10 /* HSYNC */ 170 MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x10 /* VSYNC */ 171 MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x10 172 MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x10 173 MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x10 174 MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x10 175 MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x10 176 MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x10 [all …]
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| H A D | imx6qdl-aristainetos.dtsi | 295 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x10 322 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 323 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10 324 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 325 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 327 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10 328 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10 329 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10 330 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10 331 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10 [all …]
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| H A D | imx6q-kp.dtsi | 287 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 288 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10 289 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 290 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 291 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10 292 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10 293 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10 294 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10 295 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10 296 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10 [all …]
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| H A D | imx6ul-tx6ul.dtsi | 553 MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x10 /* LSCLK */ 554 MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x10 /* OE_ACD */ 555 MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x10 /* HSYNC */ 556 MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x10 /* VSYNC */ 558 MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x10 559 MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x10 560 MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x10 561 MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x10 562 MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x10 563 MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x10 [all …]
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| H A D | imx6dl-mamoj.dts | 400 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 /* VDOUT_PCLK */ 401 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10 402 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 /* VDOUT_HSYNC */ 403 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 /* VDOUT_VSYNC */ 404 MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x10 /* VDOUT_RESET */ 405 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10 406 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10 407 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10 408 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10 409 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10 [all …]
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| H A D | imx6qdl-pico.dtsi | 476 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 477 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10 478 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 479 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 480 MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x10 481 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10 482 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10 483 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10 484 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10 485 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10 [all …]
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| H A D | imx6dl-yapp43-common.dtsi | 427 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 428 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 429 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 430 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10 431 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10 432 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10 433 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10 434 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10 435 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10 436 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10 [all …]
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| H A D | imx6qdl-nitrogen6x.dtsi | 449 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 450 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10 451 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 452 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 453 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10 454 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10 455 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10 456 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10 457 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10 458 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10 [all …]
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| H A D | imx6dl-yapp4-common.dtsi | 122 reg = <0x10>; 426 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 427 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 428 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 429 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10 430 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10 431 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10 432 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10 433 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10 434 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10 [all …]
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| /freebsd/contrib/llvm-project/compiler-rt/lib/hwasan/ |
| H A D | hwasan_setjmp_riscv64.S | 47 sd ra, 0<<3(x10) 48 sd s0, 1<<3(x10) 49 sd s1, 2<<3(x10) 50 sd s2, 3<<3(x10) 51 sd s3, 4<<3(x10) 52 sd s4, 5<<3(x10) 53 sd s5, 6<<3(x10) 54 sd s6, 7<<3(x10) 55 sd s7, 8<<3(x10) 56 sd s8, 9<<3(x10) [all …]
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| /freebsd/sys/crypto/openssl/aarch64/ |
| H A D | ecp_sm2p256-armv8.S | 30 ldp x9,x10,[x0,#16] 35 extr x9,x10,x9,#1 36 lsr x10,x10,#1 40 stp x9,x10,[x0,#16] 53 ldp x9,x10,[x1,#16] 61 sbc x10,x10,x14 65 stp x9,x10,[x0,#16] 78 ldp x9,x10,[x1,#16] 86 extr x9,x10,x9,#1 87 lsr x10,x10,#1 [all …]
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| H A D | poly1305-armv8.S | 85 ldp x10,x11,[x1],#16 // load input 88 rev x10,x10 91 adds x4,x4,x10 // accumulate input 98 mul x10,x5,x9 // h1*5*r1 101 adds x12,x12,x10 102 mul x10,x4,x8 // h0*r1 106 adds x13,x13,x10 107 mul x10,x5,x7 // h1*r0 111 adds x13,x13,x10 112 mul x10,x6,x9 // h2*5*r1 [all …]
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| H A D | ecp_nistz256-armv8.S | 2518 ldp x10,x11,[x2,#16] 2571 mov x10,x16 2598 mov x10,x16 2609 mov x10,x6 2681 umulh x10,x6,x3 2691 adcs x17,x17,x10 2694 subs x10,x14,x8 // "*0xffff0001" 2700 adcs x16,x17,x10 // +=acc[0]*0xffff0001 2701 mul x10,x6,x3 // lo(a[2]*b[i]) 2710 adcs x16,x16,x10 [all …]
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| /freebsd/lib/libc/aarch64/string/ |
| H A D | strlcpy.S | 18 bic x10, x1, #0xf // src aligned 21 ldr q1, [x10] 34 ldr q3, [x10, #16] // load second string chunk 50 ldr q1, [x10, #32] // load next string chunk 54 add x10, x10, #32 // advance src 69 ldr q1, [x10, #16] // load next chunk 74 add x10, x10, #32 // advance pointers 83 ldr q1, [x10] // load next chunk 89 sub x10, x10, #16 // undo second advancement 114 ldr q1, [x10, x8] // load tail [all …]
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| H A D | strcmp.S | 18 bic x10, x1, #0xf // x1 aligned to the boundary 37 ldr q2, [x10] 93 ldr q3, [x10, #16] 96 sub x12, x10, x9 98 sub x10, x10, x8 99 sub x11, x10, x9 130 ldr q1, [x8, x10] 147 ldr q1, [x8, x10] 193 ldr q1, [x8, x10] 205 add x10, x10, x8 // restore x10 pointer [all …]
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| H A D | strncmp.S | 18 bic x10, x1, #0xf // x1 aligned to the boundary 43 ldr q1, [x10] 98 ldr q3, [x10, #16] 117 ldr q1, [x10] 195 sub x12, x10, x9 197 sub x10, x10, x8 198 sub x11, x10, x9 237 ldr q1, [x8, x10] 255 ldr q1, [x8, x10] 276 ldr q1, [x8, x10] [all …]
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| H A D | memccpy.S | 20 bic x10, x1, #0xf // src aligned 23 ldr q1, [x10] 57 ldr q3, [x10, #16] // load second string chunk 83 ldr q1, [x10, #32] // load next string chunk 89 add x10, x10, #32 // advance src 104 ldr q1, [x10, #16] // load next chunk 109 add x10, x10, #32 // advance pointers 118 ldr q1, [x10] // load next chunk 124 sub x10, x10, #16 // undo second advancement 147 ldr q1, [x10, x8] // load tail [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/ti/omap/ |
| H A D | am335x-pocketbeagle.dts | 225 pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>; 226 pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>; 234 pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>; 235 pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>; 243 pinctrl-single,bias-pullup = < 0x10 0x10 [all...] |
| /freebsd/contrib/llvm-project/compiler-rt/lib/sanitizer_common/ |
| H A D | sanitizer_common_interceptors_vfork_riscv64.inc.S | 22 sd ra, 0(x10) 26 la x10, _ZN14__interception10real_vforkE 27 ld x10, 0(x10) 28 jalr x10 33 sd x10, 8(sp) 35 beqz x10, .L_exit 39 addi x10, sp, 16 45 ld ra, 0(x10) 47 ld x10, 8(sp)
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| /freebsd/sys/contrib/libsodium/src/libsodium/crypto_core/hsalsa20/ref2/ |
| H A D | core_hsalsa20_ref2.c | 23 x9, x10, x11, x12, x13, x14, x15; in crypto_core_hsalsa20() local 29 x10 = U32C(0x79622d32); in crypto_core_hsalsa20() 34 x10 = LOAD32_LE(c + 8); in crypto_core_hsalsa20() 59 x14 ^= ROTL32(x10 + x6, 7); in crypto_core_hsalsa20() 60 x2 ^= ROTL32(x14 + x10, 9); in crypto_core_hsalsa20() 62 x10 ^= ROTL32(x6 + x2, 18); in crypto_core_hsalsa20() 75 x11 ^= ROTL32(x10 + x9, 7); in crypto_core_hsalsa20() 76 x8 ^= ROTL32(x11 + x10, 9); in crypto_core_hsalsa20() 78 x10 ^= ROTL32(x9 + x8, 18); in crypto_core_hsalsa20() 87 STORE32_LE(out + 8, x10); in crypto_core_hsalsa20()
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