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/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6qdl-skov-revc-lt2.dtsi69 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
70 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
71 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
72 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
73 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
74 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
75 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
76 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
77 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
78 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
[all …]
H A Dimx6dl-skov-revc-lt6.dts76 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
77 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
78 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
79 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
80 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
81 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
82 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
83 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
84 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
85 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
[all …]
H A Dimx6qdl-phytec-mira-peb-av-02.dtsi77 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
78 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
79 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
81 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
82 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
83 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
84 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
85 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
86 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
87 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
[all …]
H A Dimx6q-skov-revc-lt6.dts98 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
99 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
100 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
101 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
102 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
103 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
104 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
105 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
106 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
107 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
[all …]
H A Dimx6qdl-aristainetos.dtsi296 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x10
323 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
324 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
325 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
326 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
328 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
329 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
330 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
331 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
332 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
[all …]
H A Dimx6qdl-tx6.dtsi378 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
379 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
380 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
381 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
383 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
384 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
385 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
386 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
387 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
388 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
[all …]
H A Dimx6q-kp.dtsi287 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
288 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
289 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
290 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
291 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
292 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
293 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
294 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
295 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
296 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
[all …]
H A Dimx6ul-tx6ul.dtsi589 MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x10 /* LSCLK */
590 MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x10 /* OE_ACD */
591 MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x10 /* HSYNC */
592 MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x10 /* VSYNC */
594 MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x10
595 MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x10
596 MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x10
597 MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x10
598 MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x10
599 MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x10
[all …]
H A Dimx6ul-tx6ul-mainboard.dts203 MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x10 /* LSCLK */
204 MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x10 /* OE_ACD */
205 MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x10 /* HSYNC */
206 MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x10 /* VSYNC */
207 MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x10
208 MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x10
209 MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x10
210 MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x10
211 MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x10
212 MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x10
[all …]
H A Dimx6dl-mamoj.dts400 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 /* VDOUT_PCLK */
401 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
402 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 /* VDOUT_HSYNC */
403 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 /* VDOUT_VSYNC */
404 MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x10 /* VDOUT_RESET */
405 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
406 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
407 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
408 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
409 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
[all …]
H A Dimx6qdl-pico.dtsi476 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
477 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
478 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
479 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
480 MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x10
481 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
482 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
483 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
484 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
485 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
[all …]
H A Dimx6dl-yapp43-common.dtsi427 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
428 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
429 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
430 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
431 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
432 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
433 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
434 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
435 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
436 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
[all …]
H A Dimx6qdl-nitrogen6x.dtsi450 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
451 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
452 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
453 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
454 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
455 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
456 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
457 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
458 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
459 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
[all …]
H A Dimx6dl-yapp4-common.dtsi122 reg = <0x10>;
426 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
427 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
428 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
429 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
430 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
431 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
432 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
433 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
434 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
[all …]
H A Dimx6qdl-emcon.dtsi576 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
577 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
578 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
579 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
580 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
581 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
582 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
583 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
584 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
585 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
[all …]
/freebsd/contrib/llvm-project/compiler-rt/lib/hwasan/
H A Dhwasan_setjmp_riscv64.S47 sd ra, 0<<3(x10)
48 sd s0, 1<<3(x10)
49 sd s1, 2<<3(x10)
50 sd s2, 3<<3(x10)
51 sd s3, 4<<3(x10)
52 sd s4, 5<<3(x10)
53 sd s5, 6<<3(x10)
54 sd s6, 7<<3(x10)
55 sd s7, 8<<3(x10)
56 sd s8, 9<<3(x10)
[all …]
/freebsd/lib/libc/aarch64/string/
H A Dstrlcpy.S18 bic x10, x1, #0xf // src aligned
21 ldr q1, [x10]
34 ldr q3, [x10, #16] // load second string chunk
50 ldr q1, [x10, #32] // load next string chunk
54 add x10, x10, #32 // advance src
69 ldr q1, [x10, #16] // load next chunk
74 add x10, x10, #32 // advance pointers
83 ldr q1, [x10] // load next chunk
89 sub x10, x10, #16 // undo second advancement
114 ldr q1, [x10, x8] // load tail
[all …]
H A Dstrcmp.S18 bic x10, x1, #0xf // x1 aligned to the boundary
37 ldr q2, [x10]
93 ldr q3, [x10, #16]
96 sub x12, x10, x9
98 sub x10, x10, x8
99 sub x11, x10, x9
130 ldr q1, [x8, x10]
147 ldr q1, [x8, x10]
193 ldr q1, [x8, x10]
205 add x10, x10, x8 // restore x10 pointer
[all …]
H A Dstrncmp.S18 bic x10, x1, #0xf // x1 aligned to the boundary
43 ldr q1, [x10]
98 ldr q3, [x10, #16]
117 ldr q1, [x10]
195 sub x12, x10, x9
197 sub x10, x10, x8
198 sub x11, x10, x9
237 ldr q1, [x8, x10]
255 ldr q1, [x8, x10]
276 ldr q1, [x8, x10]
[all …]
H A Dmemccpy.S20 bic x10, x1, #0xf // src aligned
23 ldr q1, [x10]
57 ldr q3, [x10, #16] // load second string chunk
83 ldr q1, [x10, #32] // load next string chunk
89 add x10, x10, #32 // advance src
104 ldr q1, [x10, #16] // load next chunk
109 add x10, x10, #32 // advance pointers
118 ldr q1, [x10] // load next chunk
124 sub x10, x10, #16 // undo second advancement
147 ldr q1, [x10, x8] // load tail
[all …]
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Dam335x-pocketbeagle.dts225 pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
226 pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
234 pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
235 pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
243 pinctrl-single,bias-pullup = < 0x10 0x10
[all...]
/freebsd/contrib/llvm-project/compiler-rt/lib/sanitizer_common/
H A Dsanitizer_common_interceptors_vfork_riscv64.inc.S22 sd ra, 0(x10)
26 la x10, _ZN14__interception10real_vforkE
27 ld x10, 0(x10)
28 jalr x10
33 sd x10, 8(sp)
35 beqz x10, .L_exit
39 addi x10, sp, 16
45 ld ra, 0(x10)
47 ld x10, 8(sp)
/freebsd/sys/crypto/openssl/aarch64/
H A Dpoly1305-armv8.S81 ldp x10,x11,[x1],#16 // load input
84 rev x10,x10
87 adds x4,x4,x10 // accumulate input
94 mul x10,x5,x9 // h1*5*r1
97 adds x12,x12,x10
98 mul x10,x4,x8 // h0*r1
102 adds x13,x13,x10
103 mul x10,x5,x7 // h1*r0
107 adds x13,x13,x10
108 mul x10,x6,x9 // h2*5*r1
[all …]
H A Decp_nistz256-armv8.S2505 ldp x10,x11,[x2,#16]
2552 mov x10,x16
2577 mov x10,x16
2588 mov x10,x6
2656 umulh x10,x6,x3
2666 adcs x17,x17,x10
2669 subs x10,x14,x8 // "*0xffff0001"
2675 adcs x16,x17,x10 // +=acc[0]*0xffff0001
2676 mul x10,x6,x3 // lo(a[2]*b[i])
2685 adcs x16,x16,x10
[all …]
/freebsd/sys/contrib/libsodium/src/libsodium/crypto_core/hsalsa20/ref2/
H A Dcore_hsalsa20_ref2.c23 x9, x10, x11, x12, x13, x14, x15; in crypto_core_hsalsa20() local
29 x10 = U32C(0x79622d32); in crypto_core_hsalsa20()
34 x10 = LOAD32_LE(c + 8); in crypto_core_hsalsa20()
59 x14 ^= ROTL32(x10 + x6, 7); in crypto_core_hsalsa20()
60 x2 ^= ROTL32(x14 + x10, 9); in crypto_core_hsalsa20()
62 x10 ^= ROTL32(x6 + x2, 18); in crypto_core_hsalsa20()
75 x11 ^= ROTL32(x10 + x9, 7); in crypto_core_hsalsa20()
76 x8 ^= ROTL32(x11 + x10, 9); in crypto_core_hsalsa20()
78 x10 ^= ROTL32(x9 + x8, 18); in crypto_core_hsalsa20()
87 STORE32_LE(out + 8, x10); in crypto_core_hsalsa20()

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