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Searched refs:wrmsr (Results 1 – 25 of 57) sorted by relevance

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/freebsd/sys/amd64/amd64/
H A Dinitcpu.c104 wrmsr(MSR_DE_CFG, rdmsr(MSR_DE_CFG) | in init_amd()
118 wrmsr(MSR_NB_CFG1, msr); in init_amd()
132 wrmsr(0xc001102a, msr); in init_amd()
146 wrmsr(MSR_LS_CFG, msr); in init_amd()
156 wrmsr(MSR_DE_CFG, msr); in init_amd()
161 wrmsr(MSR_LS_CFG, msr); in init_amd()
166 wrmsr(0xc0011028, msr); in init_amd()
171 wrmsr(MSR_LS_CFG, msr); in init_amd()
224 wrmsr(0x110B, rdmsr(0x110B) | VIA_CPUID_DO_RNG); in init_via()
237 wrmsr(0x1107, rdmsr(0x1107) | (1 << 28)); in init_via()
[all …]
H A Dmpboot.S113 wrmsr
123 wrmsr
276 wrmsr
H A Dcpu_switch.S411 wrmsr
415 wrmsr
419 wrmsr
424 wrmsr
430 wrmsr
434 wrmsr
438 wrmsr
441 wrmsr
H A Dexception.S348 wrmsr
675 wrmsr
694 wrmsr
702 wrmsr
816 wrmsr
943 wrmsr
951 wrmsr
1024 wrmsr
1062 wrmsr
1070 wrmsr
[all …]
H A Dlocore.S148 wrmsr
158 wrmsr /* prepare for ... */
H A Dmachdep.c1179 wrmsr(MSR_EFER, msr); in amd64_conf_fast_syscall()
1180 wrmsr(MSR_LSTAR, pti ? (u_int64_t)IDTVEC(fast_syscall_pti) : in amd64_conf_fast_syscall()
1182 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32)); in amd64_conf_fast_syscall()
1185 wrmsr(MSR_STAR, msr); in amd64_conf_fast_syscall()
1186 wrmsr(MSR_SF_MASK, PSL_NT | PSL_T | PSL_I | PSL_C | PSL_D | PSL_AC); in amd64_conf_fast_syscall()
1393 wrmsr(MSR_FSBASE, 0); /* User value */ in hammer_time()
1394 wrmsr(MSR_GSBASE, (u_int64_t)pc); in hammer_time()
1395 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */ in hammer_time()
/freebsd/sys/i386/i386/
H A Dinitcpu.c98 wrmsr(0x1000, 0x9c92LL); /* FP operand can be cacheable on Cyrix FPU */ in init_bluelightning()
100 wrmsr(0x1000, 0x1c92LL); /* Intel FPU */ in init_bluelightning()
103 wrmsr(0x1001, (0xd0LL << 32) | 0x3ff); in init_bluelightning()
105 wrmsr(0x1002, 0x04000000LL); /* Enables triple-clock mode. */ in init_bluelightning()
107 wrmsr(0x1002, 0x03000000LL); /* Enables double-clock mode. */ in init_bluelightning()
415 wrmsr(0x0107, fcr); in init_winchip()
499 wrmsr(MSR_APICBASE, apicbase); in init_ppro()
516 wrmsr(MSR_APICBASE, apicbase); in ppro_reenable_apic()
552 wrmsr(MSR_BBL_CR_CTL3, bbl_cr_ctl3); in init_mendocino()
594 wrmsr(0x110B, rdmsr(0x110B) | VIA_CPUID_DO_RNG); in init_via()
[all …]
H A Dperfmon.c137 wrmsr(msr_pmc[pmc], pmc_shadow[pmc] = 0); in perfmon_setup()
181 wrmsr(msr_pmc[pmc], pmc_shadow[pmc]); in perfmon_start()
232 wrmsr(msr_pmc[pmc], pmc_shadow[pmc] = 0); in perfmon_reset()
250 wrmsr(msr_ctl[pmc], 0); in writectl6()
252 wrmsr(msr_ctl[pmc], ctl_shadow[pmc]); in writectl6()
286 wrmsr(msr_ctl[0], newval); in writectl5()
H A Dlongrun.c147 wrmsr(MSR_TMx86_LONGRUN, msrinfo.msr); in tmx86_set_longrun_mode()
152 wrmsr(MSR_TMx86_LONGRUN_FLAGS, msrinfo.msr); in tmx86_set_longrun_mode()
/freebsd/sys/amd64/vmm/intel/
H A Dvmx_msr.c347 wrmsr(MSR_LSTAR, vcpu->guest_msrs[IDX_MSR_LSTAR]); in vmx_msr_guest_enter()
348 wrmsr(MSR_CSTAR, vcpu->guest_msrs[IDX_MSR_CSTAR]); in vmx_msr_guest_enter()
349 wrmsr(MSR_STAR, vcpu->guest_msrs[IDX_MSR_STAR]); in vmx_msr_guest_enter()
350 wrmsr(MSR_SF_MASK, vcpu->guest_msrs[IDX_MSR_SF_MASK]); in vmx_msr_guest_enter()
351 wrmsr(MSR_KGSBASE, vcpu->guest_msrs[IDX_MSR_KGSBASE]); in vmx_msr_guest_enter()
361 wrmsr(MSR_TSC_AUX, guest_tsc_aux); in vmx_msr_guest_enter_tsc_aux()
376 wrmsr(MSR_LSTAR, host_msrs[IDX_MSR_LSTAR]); in vmx_msr_guest_exit()
377 wrmsr(MSR_CSTAR, host_msrs[IDX_MSR_CSTAR]); in vmx_msr_guest_exit()
378 wrmsr(MSR_STAR, host_msrs[IDX_MSR_STAR]); in vmx_msr_guest_exit()
379 wrmsr(MSR_SF_MASK, host_msrs[IDX_MSR_SF_MASK]); in vmx_msr_guest_exit()
[all …]
/freebsd/sys/dev/hwpmc/
H A Dhwpmc_core.c153 wrmsr(MSR_DEBUGCTLMSR, rdmsr(MSR_DEBUGCTLMSR) | 0x1000); in core_pcpu_init()
185 wrmsr(IAP_EVSEL0 + n, 0); in core_pcpu_fini()
188 wrmsr(IAF_CTRL, 0); in core_pcpu_fini()
430 wrmsr(IAF_CTRL, cc->pc_iafctrl); in iaf_start_pmc()
433 wrmsr(IA_GLOBAL_CTRL, cc->pc_globalctrl); in iaf_start_pmc()
457 wrmsr(IAF_CTRL, cc->pc_iafctrl); in iaf_stop_pmc()
484 wrmsr(IAF_CTRL, cc->pc_iafctrl & ~(IAF_MASK << (ri * 4))); in iaf_write_pmc()
486 wrmsr(IAF_CTR0 + ri, v & ((1ULL << core_iaf_width) - 1)); in iaf_write_pmc()
489 wrmsr(IAF_CTRL, cc->pc_iafctrl); in iaf_write_pmc()
901 wrmsr(IA_OFFCORE_RSP0, pm->pm_md.pm_iap.pm_iap_rsp); in iap_start_pmc()
[all …]
H A Dhwpmc_uncore.c150 wrmsr(SELECTSEL(uncore_cputype) + n, 0); in uncore_pcpu_fini()
152 wrmsr(UCF_CTRL, 0); in uncore_pcpu_fini()
315 wrmsr(UCF_CTRL, ucfc->pc_ucfctrl); in ucf_start_pmc()
318 wrmsr(UC_GLOBAL_CTRL, ucfc->pc_globalctrl); in ucf_start_pmc()
347 wrmsr(UCF_CTRL, ucfc->pc_ucfctrl); in ucf_stop_pmc()
373 wrmsr(UCF_CTRL, 0); /* Turn off fixed counters */ in ucf_write_pmc()
374 wrmsr(UCF_CTR0 + ri, v); in ucf_write_pmc()
375 wrmsr(UCF_CTRL, cc->pc_ucfctrl); in ucf_write_pmc()
633 wrmsr(SELECTSEL(uncore_cputype) + ri, evsel); in ucp_start_pmc()
636 wrmsr(UC_GLOBAL_CTRL, cc->pc_globalctrl); in ucp_start_pmc()
[all …]
H A Dhwpmc_amd.c280 wrmsr(pd->pm_perfctr, v); in amd_write_pmc()
496 wrmsr(pd->pm_evsel, config); in amd_start_pmc()
525 wrmsr(pd->pm_evsel, config); in amd_stop_pmc()
609 wrmsr(evsel, config & ~AMD_PMC_ENABLE); in amd_intr()
610 wrmsr(perfctr, AMD_RELOAD_COUNT_TO_PERFCTR_VALUE(v)); in amd_intr()
615 wrmsr(evsel, config); in amd_intr()
750 wrmsr(AMD_PMC_EVSEL_0 + i, evsel); in amd_pcpu_fini()
/freebsd/sys/amd64/vmm/amd/
H A Dsvm_msr.c100 wrmsr(MSR_LSTAR, host_msrs[IDX_MSR_LSTAR]); in svm_msr_guest_exit()
101 wrmsr(MSR_CSTAR, host_msrs[IDX_MSR_CSTAR]); in svm_msr_guest_exit()
102 wrmsr(MSR_STAR, host_msrs[IDX_MSR_STAR]); in svm_msr_guest_exit()
103 wrmsr(MSR_SF_MASK, host_msrs[IDX_MSR_SF_MASK]); in svm_msr_guest_exit()
/freebsd/sys/x86/x86/
H A Dmca.c696 wrmsr(mca_msr_ops.status(bank), 0); in mca_check_status()
856 wrmsr(MSR_MC_CTL2(bank), ctl); in cmci_update()
881 wrmsr(mca_msr_ops.misc(bank), misc); in amd_thresholding_update()
1204 wrmsr(MSR_MC_CTL2(i), ctl); in cmci_monitor()
1215 wrmsr(MSR_MC_CTL2(i), ctl); in cmci_monitor()
1222 wrmsr(MSR_MC_CTL2(i), ctl); in cmci_monitor()
1253 wrmsr(MSR_MC_CTL2(i), ctl); in cmci_resume()
1281 wrmsr(mca_msr_ops.misc(bank), misc); in amd_thresholding_start()
1385 wrmsr(MSR_MCG_CTL, MCG_CTL_ENABLE); in _mca_init()
1400 wrmsr(MSR_MC0_CTL_MASK, mask | (1UL << 5)); in _mca_init()
[all …]
H A Dx86_mem.c343 wrmsr(MSR_MTRRdefType, rdmsr(MSR_MTRRdefType) & ~MTRR_DEF_ENABLE); in x86_mrstoreone()
356 wrmsr(msr, msrv); in x86_mrstoreone()
368 wrmsr(msr, msrv); in x86_mrstoreone()
380 wrmsr(msr, msrv); in x86_mrstoreone()
396 wrmsr(msr, msrv); in x86_mrstoreone()
405 wrmsr(msr + 1, msrv); in x86_mrstoreone()
413 wrmsr(MSR_MTRRdefType, rdmsr(MSR_MTRRdefType) | MTRR_DEF_ENABLE); in x86_mrstoreone()
697 wrmsr(MSR_MTRRdefType, mtrrdef); in x86_mrAPinit()
H A Ducode.c128 wrmsr(MSR_BIOS_UPDT_TRIG, (uint64_t)(uintptr_t)data); in ucode_intel_load()
129 wrmsr(MSR_BIOS_SIGN, 0); in ucode_intel_load()
249 wrmsr(MSR_K8_UCODE_UPDATE, (uint64_t)(uintptr_t)data); in ucode_amd_load()
H A Dcpu_machdep.c135 wrmsr(a->msr, v); in x86_msr_op_one()
140 wrmsr(a->msr, v); in x86_msr_op_one()
143 wrmsr(a->msr, a->arg1); in x86_msr_op_one()
280 wrmsr(MSR_IA32_SPEC_CTRL, v & ~(IA32_SPEC_CTRL_IBRS | in acpi_cpu_idle_mwait()
295 wrmsr(MSR_IA32_SPEC_CTRL, v); in acpi_cpu_idle_mwait()
338 wrmsr(MSR_MPERF, 0); in cpu_est_clockrate()
339 wrmsr(MSR_APERF, 0); in cpu_est_clockrate()
674 wrmsr(MSR_AMDK8_IPM, msr & ~(AMDK8_SMIONCMPHALT | in cpu_idle()
H A Dlocal_apic.c256 wrmsr(MSR_APIC_000 + reg, val); in lapic_write32()
267 wrmsr(MSR_APIC_000 + reg, val); in lapic_write32_nofence()
290 wrmsr(MSR_APIC_000 + LAPIC_ICR_LO, v); in lapic_write_icr()
305 wrmsr(MSR_APIC_000 + LAPIC_ICR_LO, vlo); in lapic_write_icr_lo()
316 wrmsr(MSR_APIC_000 + LAPIC_SELF_IPI, vector); in lapic_write_self_ipi()
327 wrmsr(MSR_APICBASE, apic_base); in lapic_enable_x2apic()
1394 wrmsr(MSR_TSC_DEADLINE, la->la_timer_period + rdtsc()); in lapic_timer_deadline()
1403 wrmsr(MSR_TSC_DEADLINE, 0); in lapic_timer_stop()
/freebsd/sys/dev/hyperv/vmbus/
H A Dvmbus_et.c104 wrmsr(MSR_HV_STIMER0_COUNT, current); in vmbus_et_start()
163 wrmsr(MSR_HV_STIMER0_COUNT, 0); in vmbus_et_config()
170 wrmsr(MSR_HV_STIMER0_CONFIG, in vmbus_et_config()
/freebsd/sys/dev/hyperv/vmbus/x86/
H A Dhyperv_x86.c126 wrmsr(MSR_HV_HYPERCALL, hc); in hypercall_page_setup()
147 wrmsr(MSR_HV_HYPERCALL, (hc & MSR_HV_HYPERCALL_RSVD_MASK)); in hypercall_disable()
H A Dhyperv_machdep.h35 #define WRMSR(msr, val) wrmsr(msr, val)
/freebsd/sys/dev/kvm_clock/
H A Dkvm_clock.c87 wrmsr(sc->msr_wc, vtophys(&sc->wc)); in kvm_clock_get_wallclock()
106 wrmsr(sc->msr_tc, vtophys(&(sc->timeinfos)[curcpu]) | 1); in kvm_clock_system_time_enable_pcpu()
/freebsd/sys/dev/agp/
H A Dagp_nvidia.c407 wrmsr(IORR_BASE0 + 2 * iorr_addr, base); in nvidia_init_iorr()
408 wrmsr(IORR_MASK0 + 2 * iorr_addr, mask); in nvidia_init_iorr()
412 wrmsr(SYSCFG, sys); in nvidia_init_iorr()
/freebsd/sys/x86/cpufreq/
H A Dpowernow.c147 wrmsr(MSR_AMDK7_FIDVID_CTL, \
295 wrmsr(MSR_AMDK7_FIDVID_CTL, ctl | PN7_CTR_FIDC); in pn7_setfidvid()
297 wrmsr(MSR_AMDK7_FIDVID_CTL, ctl | PN7_CTR_VIDC); in pn7_setfidvid()
299 wrmsr(MSR_AMDK7_FIDVID_CTL, ctl | PN7_CTR_VIDC); in pn7_setfidvid()
301 wrmsr(MSR_AMDK7_FIDVID_CTL, ctl | PN7_CTR_FIDC); in pn7_setfidvid()

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