Searched refs:we_mask (Results 1 – 4 of 4) sorted by relevance
259 if (p_Mcc->initfq.we_mask & QM_INITFQ_WE_FQCTRL) { in qman_init_fq()265 if (p_Mcc->initfq.we_mask & QM_INITFQ_WE_CGID) in qman_init_fq()1010 fq_opts.we_mask |= QM_INITFQ_WE_DESTWQ; in qm_new_fq()1013 fq_opts.we_mask |= QM_INITFQ_WE_FQCTRL; in qm_new_fq()1026 fq_opts.we_mask |= QM_INITFQ_WE_CGID; in qm_new_fq()1029 fq_opts.we_mask |= QM_INITFQ_WE_OAC; in qm_new_fq()1030 fq_opts.we_mask &= ~QM_INITFQ_WE_TDTHRESH; in qm_new_fq()1038 fq_opts.we_mask |= QM_INITFQ_WE_TDTHRESH; in qm_new_fq()1059 fq_opts.we_mask |= QM_INITFQ_WE_CONTEXTA; in qm_new_fq()1065 fq_opts.we_mask |= QM_INITFQ_WE_CONTEXTB; in qm_new_fq()[all …]
647 volatile uint16_t we_mask; /* Write Enable Mask */ member672 volatile uint16_t we_mask; /* Write Enable Mask */ member
518 uint8_t we_mask, bool cdan_en, uint64_t ctx);
511 uint8_t we_mask, bool cdan_en, uint64_t ctx) in dpaa2_swp_conf_wq_channel() argument536 cmd.we = we_mask; in dpaa2_swp_conf_wq_channel()