Home
last modified time | relevance | path

Searched refs:voltages (Results 1 – 25 of 36) sorted by relevance

12

/freebsd/sys/arm/ti/twl/
H A Dtwl_vreg.c163 const uint16_t *voltages; member
167 #define TWL_REGULATOR_ADJUSTABLE(name, subdev, reg, voltages) \ argument
168 { name, subdev, reg, 0, voltages, (sizeof(voltages)/sizeof(voltages[0])) }
807 const uint16_t *voltages, uint32_t num_voltages) in twl_vreg_add_regulator() argument
825 new->supp_voltages = voltages; in twl_vreg_add_regulator()
873 walker->voltages, walker->num_voltages); in twl_vreg_add_regulators()
/freebsd/sys/contrib/device-tree/Bindings/opp/
H A Dti-omap5-opp-supply.txt4 contain data that can be used to adjust voltages programmed for some of their
26 "ti,omap5-opp-supply" - OMAP5+ optimized voltages in efuse(class0)VDD
28 "ti,omap5-core-opp-supply" - OMAP5+ optimized voltages in efuse(class0) VDD
/freebsd/sys/contrib/device-tree/Bindings/regulator/
H A Dnvidia,tegra-regulators-coupling.txt12 The CORE and RTC voltages shall be in a range of 170mV from each other
19 and CPU voltages shall be in a range of 300mV from each other and CORE
H A Dpwm-regulator.txt9 only operate at the voltages supplied in the table.
17 supplied voltages specified in the
H A Dmax8952.txt6 - max8952,dvs-mode-microvolt: array of 4 integer values defining DVS voltages
/freebsd/sys/contrib/device-tree/Bindings/arm/tegra/
H A Dnvidia,tegra186-pmc.txt49 1.8 V signaling voltages are supported on pins where software
77 TEGRA_IO_PAD_VOLTAGE_3V3 to select between signaling voltages.
83 voltages: sdmmc2-hv, dmic-hv, sdmmc1-hv, sdmmc3-hv, audio-hv,
/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dqcom,msm8916-wcd-analog.txt35 - qcom,mbhc-vthreshold-low: Array of 5 threshold voltages in mV for 5 buttons
38 - qcom,mbhc-vthreshold-high: Array of 5 thresold voltages in mV for 5 buttons
H A Dmax98090.txt23 - maxim,micbias: Micbias voltage applies to the analog mic, valid voltages value are:
H A Daxentia,tse850-pcm5142.txt11 support voltages in the 2V - 20V range, in 1V steps.
H A Dcs42l42.txt74 decreasing voltages and will stop when a comparator is tripped,
/freebsd/sys/contrib/device-tree/src/arm/synaptics/
H A Dberlin2cd-valve-steamlink.dts44 * of the board is probably supplying SDIO and NAND fixed voltages. */
/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Dqcom-pm8xxx.txt4 voltages and other various functionality to Qualcomm SoCs.
H A Dsamsung,sec-core.txt37 unwanted buck warm reset (setting buck voltages to default values).
H A Dmax14577.txt63 voltages for it.
H A Dmax8998.txt41 preprogrammed buck dvfs voltages.
/freebsd/sys/contrib/device-tree/src/arm64/renesas/
H A Dr8a779f0-spider-cpu.dtsi141 * because we cannot directly switch voltages in software.
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6sx-softing-vining-2000.dts75 * unstable without higher voltages. Hence, set higher voltages here.
H A Dimx6ull-dhcor-som.dtsi30 * below the SoC, therefore higher voltages are required.
/freebsd/sys/contrib/device-tree/Bindings/power/avs/
H A Dqcom,cpr.txt5 a range of valid voltages for a particular frequency. While the device is
/freebsd/sys/contrib/device-tree/src/arm/allwinner/
H A Dsun9i-a80-cubieboard4.dts291 * (3.0 ~ 4.8V) of voltages, and so does
413 * The PHY requires 20ms after all voltages
H A Dsun9i-a80-optimus.dts288 * (3.0 ~ 4.8V) of voltages, and so does
410 * The PHY requires 20ms after all voltages
H A Dsun8i-a83t-allwinner-h8homlet-v2.dts231 * The PHY requires 20ms after all voltages are applied until core
/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3368-lion.dtsi277 /* The RK3368-uQ7 "Lion" has most IO voltages hardwired to 3.3V. */
/freebsd/sys/contrib/device-tree/Bindings/arm/msm/
H A Dqcom,idle-state.txt51 voltages reduced, provided all cpus enter this state. Since the span of low
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dnvidia,tegra124-dfll.txt36 the I2C register, control values and supported voltages.

12