| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | BUFInstructions.td | 1344 (vt (st v4i32:$rsrc, 0, i32:$voffset, (BUFSOffset i32:$soffset), timm:$offset,
1346 …(!cast<MUBUF_Pseudo>(opcode # _OFFEN) VGPR_32:$voffset, SReg_128:$rsrc, SCSrc_b32:$soffset, timm:$…
1358 (vt (st v4i32:$rsrc, i32:$vindex, i32:$voffset, (BUFSOffset i32:$soffset), timm:$offset,
1361 (REG_SEQUENCE VReg_64, VGPR_32:$vindex, sub0, VGPR_32:$voffset, sub1),
1454 (st vt:$vdata, v4i32:$rsrc, 0, i32:$voffset, (BUFSOffset i32:$soffset), timm:$offset,
1456 …(!cast<MUBUF_Pseudo>(opcode # _OFFEN_exact) getVregSrcForVT<vt>.ret:$vdata, VGPR_32:$voffset, SReg…
1468 (st vt:$vdata, v4i32:$rsrc, i32:$vindex, i32:$voffset, (BUFSOffset i32:$soffset), timm:$offset,
1472 (REG_SEQUENCE VReg_64, VGPR_32:$vindex, sub0, VGPR_32:$voffset, sub1),
1684 (vt (Op vt:$vdata_in, v4i32:$rsrc, 0, i32:$voffset,
1687 getVregSrcForVT<vt>.ret:$vdata_in, VGPR_32:$voffset, SReg_128:$rsrc,
[all …]
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| H A D | SIInstrInfo.td | 104 SDTCisVT<3, i32>, // voffset(VGPR)
122 SDTCisVT<3, i32>, // voffset(VGPR)
140 SDTCisVT<3, i32>, // voffset(VGPR)
178 SDTCisVT<3, i32>, // voffset(VGPR)
204 SDTCisVT<4, i32>, // voffset(VGPR)
212 (ops node:$vdata_in, node:$rsrc, node:$vindex, node:$voffset, node:$soffset,
215 node:$voffset, node:$soffset, node:$offset, node:$cachepolicy,
243 SDTCisVT<5, i32>, // voffset(VGPR)
252 (ops node:$src, node:$cmp, node:$rsrc, node:$vindex, node:$voffset,
255 node:$voffset, node:$soffset, node:$offset, node:$cachepolicy,
[all …]
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| H A D | FLATInstructions.td | 1199 (vt (node (GlobalSAddr (i64 SReg_64:$saddr), (i32 VGPR_32:$voffset), i32:$offset), vt:$in)),
1200 (inst $saddr, $voffset, $offset, 0, $in)
1204 (vt (node (GlobalSAddr (i64 SReg_64:$saddr), (i32 VGPR_32:$voffset), i32:$offset))),
1205 (inst $saddr, $voffset, $offset, (i32 0))
1214 (vt (node (GlobalSAddr (i64 SReg_64:$saddr), (i32 VGPR_32:$voffset), i32:$offset))),
1215 (inst $saddr, $voffset, $offset, 0)
1220 (node vt:$data, (GlobalSAddr (i64 SReg_64:$saddr), (i32 VGPR_32:$voffset), i32:$offset)),
1221 (inst $voffset, getVregSrcForVT<vt>.ret:$data, $saddr, $offset)
1226 …(vt (node (GlobalSAddr (i64 SReg_64:$saddr), (i32 VGPR_32:$voffset), i32:$offset), data_vt:$data)),
1227 (inst $voffset, getVregSrcForVT<data_vt>.ret:$data, $saddr, $offset)
[all …]
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| H A D | SIInstructions.td | 4120 let InOperandList = (ins type1:$rsrc, type2:$vindex, type2:$voffset,
4129 let InOperandList = (ins type1:$rsrc, type2:$vindex, type2:$voffset,
4154 let InOperandList = (ins type0:$vdata, type1:$rsrc, type2:$vindex, type2:$voffset,
4163 let InOperandList = (ins type0:$vdata, type1:$rsrc, type2:$vindex, type2:$voffset,
4255 let InOperandList = (ins type0:$vdata, type1:$rsrc, type2:$vindex, type2:$voffset,
4283 type2:$voffset, type2:$soffset, untyped_imm_0:$offset,
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| /freebsd/sys/vm/ |
| H A D | vnode_pager.c | 633 daddr_t voffset; in vnode_pager_addr() local
640 voffset = address % bsize; in vnode_pager_addr()
645 *rtaddress += voffset / DEV_BSIZE; in vnode_pager_addr()
649 *run -= atop(voffset); in vnode_pager_addr()
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| /freebsd/contrib/llvm-project/lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/ |
| H A D | AppleObjCTrampolineHandler.cpp | 265 uint32_t voffset = desc_extractor.GetU32(&offset); in SetUpRegion() local
267 lldb::addr_t code_addr = desc_ptr + start_offset + voffset; in SetUpRegion()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | IntrinsicsAMDGPU.td | 1881 llvm_i32_ty, // voffset(VGPR, included in bounds checking and swizzling)
1902 llvm_i32_ty, // voffset(VGPR, included in bounds checking and swizzling)
1925 llvm_i32_ty, // voffset(VGPR, included in bounds checking and swizzling)
1945 llvm_i32_ty, // voffset(VGPR, included in bounds checking and swizzling)
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