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/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Daltera-pcie-msi.txt9 "vector_slave": vectors slave port region
13 - num-vectors: number of vectors, range 1 to 32.
26 num-vectors = <32>;
/freebsd/sys/dev/qat/qat_common/
H A Dadf_isr.c38 u_int *vectors; in adf_enable_msix() local
47 vectors = NULL; in adf_enable_msix()
50 vectors = malloc(num_vectors * sizeof(u_int), in adf_enable_msix()
53 vectors[hw_data->num_banks] = 1; in adf_enable_msix()
65 free(vectors, M_QAT); in adf_enable_msix()
69 if (vectors != NULL) { in adf_enable_msix()
71 pci_remap_msix(info_pci_dev->pci_dev, num_vectors, vectors); in adf_enable_msix()
72 free(vectors, M_QAT); in adf_enable_msix()
/freebsd/crypto/openssl/test/recipes/30-test_evp_data/
H A Devpmd_sha.txt91 # Some of the test vectors from the SHS CAVP for FIPS 180-4
121 # Some of the test vectors from the SHS CAVP for FIPS 180-4
155 # Empty input and \xA3x200 vectors are taken from
157 # Others are pairs of "LongMsg" vectors available at
158 # http://csrc.nist.gov/groups/STM/cavp/secure-hashing.html#test-vectors
265 # Following tests are pairs of *last* "VariableOut" vectors from
266 # http://csrc.nist.gov/groups/STM/cavp/secure-hashing.html#test-vectors
H A Devpciph_aes_stitched.txt1 Title = AES-128-CBC-HMAC-SHA1 test vectors
33 Title = AES-256-CBC-HMAC-SHA1 test vectors
64 Title = AES-128-CBC-HMAC-SHA256 test vectors
96 Title = AES-256-CBC-HMAC-SHA256 test vectors
H A Devpciph_aria.txt14 Title = ARIA test vectors from RFC5794 (and others)
31 # Additional ARIA mode vectors from http://210.104.33.10/ARIA/doc/ARIA-testvector-e.pdf
149 Title = ARIA GCM test vectors from RFC8269
167 Title = ARIA GCM self-generated test vectors
197 Title = ARIA CCM test vectors from IETF draft-ietf-avtcore-aria-srtp-02
H A Devpmac_poly1305.txt84 # test vectors from "The Poly1305-AES message-authentication code"
111 # self-generated vectors exercise "significant" length such that* are handled by different code pat…
191 # test vectors from Google
224 # test vectors from Hanno Bock
256 # test vectors from Andrew Moon - nacl
H A Devpkdf_x942_des.txt8 Title = X9.42 KDF tests (from RFC2631 test vectors)
17 Title = X9.42 KDF tests (ACVP test vectors)
H A Devpciph_aes_common.txt16 Title = AES (from FIPS-197 test vectors)
24 # AES 192 ECB tests (from FIPS-197 test vectors, encrypt)
33 # AES 256 ECB tests (from FIPS-197 test vectors, encrypt)
42 # AES 128 ECB tests (from NIST test vectors, encrypt)
46 # AES 128 ECB tests (from NIST test vectors, decrypt)
50 # AES 192 ECB tests (from NIST test vectors, decrypt)
54 # AES 256 ECB tests (from NIST test vectors, decrypt)
58 # AES 128 CBC tests (from NIST test vectors, encrypt)
62 # AES 192 CBC tests (from NIST test vectors, encrypt)
66 # AES 256 CBC tests (from NIST test vectors, encrypt)
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H A Devpciph_aes_cts.txt9 # Original test vectors were taken from https://www.ietf.org/rfc/rfc3962.txt for CS3
12 Title = AES CBC Test vectors
38 Title = AES CBC CTS1 Test vectors
150 # Original test vectors were taken from https://www.ietf.org/rfc/rfc3962.txt for CS3
153 Title = AES CBC CTS2 Test vectors
240 Title = AES CBC CTS3 Test vectors
H A Devpciph_aes_ocb.txt14 Title = AES OCB Test vectors
144 #AES OCB Non standard test vectors - generated from reference implementation
211 #Test vectors generated to validate aesni_ocb_encrypt on x86
H A Devpciph_rc2.txt9 # A valid set of RC2 test vectors could not be found for all RC2 modes - the
12 Title = RC2 Test vectors
H A Devpkdf_x963.txt15 # Test vectors extracted from
18 Title = X963 KDF tests (from NIST test vectors)
H A Devpciph_rc4_stitched.txt1 Title = RC4-HMAC-MD5 test vectors
/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Dmips-gic.txt23 - mti,reserved-cpu-vectors : Specifies the list of CPU interrupt vectors
26 - mti,reserved-ipi-vectors : Specifies the range of GIC interrupts that are
52 mti,reserved-cpu-vectors = <7>;
53 mti,reserved-ipi-vectors = <40 8>;
/freebsd/sys/crypto/siphash/
H A Dsiphash_test.c37 uint8_t vectors[64][8] = variable
127 if (memcmp(out, vectors[i], 8)) { in SipHash24_TestVectors()
/freebsd/sys/dev/acpica/
H A Dacpi_hpet.c108 uint32_t vectors; member
560 t->vectors = bus_read_4(sc->mem_res, HPET_TIMER_CAP_CNF(i) + 4); in hpet_attach()
564 t->vectors, (t->caps & HPET_TCNF_INT_ROUTE) >> 9, in hpet_attach()
611 sc->t[0].vectors = 0; in hpet_attach()
612 sc->t[1].vectors = 0; in hpet_attach()
679 else if (dvectors & t->vectors) { in hpet_attach()
680 t->irq = ffs(dvectors & t->vectors) - 1; in hpet_attach()
703 if (t->irq < 0 && (cvectors & t->vectors) != 0) { in hpet_attach()
704 cvectors &= t->vectors; in hpet_attach()
782 else if (sc->irq >= 0 && (t->vectors & (1 << sc->irq))) in hpet_attach()
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/freebsd/sys/dev/cxgbe/firmware/
H A Dt4fw_cfg.txt46 # PFs 0-3. These get 8 MSI/8 MSI-X vectors each. VFs are supported by
97 # It gets 32 MSI/128 MSI-X vectors.
130 # PF5 is the SCSI Controller PF. It gets 32 MSI/40 MSI-X vectors.
136 # PF6 is the FCoE Controller PF. It gets 32 MSI/40 MSI-X vectors.
H A Dt6fw_cfg_hashfilter.txt81 # PFs 0-3. These get 8 MSI/8 MSI-X vectors each. VFs are supported by
132 # It gets 32 MSI/128 MSI-X vectors.
157 # PF5 is the SCSI Controller PF. It gets 32 MSI/40 MSI-X vectors.
163 # PF6 is the FCoE Controller PF. It gets 32 MSI/40 MSI-X vectors.
H A Dt5fw_cfg.txt90 # PFs 0-3. These get 8 MSI/8 MSI-X vectors each. VFs are supported by
141 # It gets 32 MSI/128 MSI-X vectors.
175 # PF5 is the SCSI Controller PF. It gets 32 MSI/40 MSI-X vectors.
181 # PF6 is the FCoE Controller PF. It gets 32 MSI/40 MSI-X vectors.
H A Dt5fw_cfg_hashfilter.txt99 # PFs 0-3. These get 8 MSI/8 MSI-X vectors each. VFs are supported by
150 # It gets 32 MSI/128 MSI-X vectors.
178 # PF5 is the SCSI Controller PF. It gets 32 MSI/40 MSI-X vectors.
184 # PF6 is the FCoE Controller PF. It gets 32 MSI/40 MSI-X vectors.
H A Dt6fw_cfg.txt88 # PFs 0-3. These get 8 MSI/8 MSI-X vectors each. VFs are supported by
139 # It gets 32 MSI/128 MSI-X vectors.
175 # PF5 is the SCSI Controller PF. It gets 32 MSI/40 MSI-X vectors.
181 # PF6 is the FCoE Controller PF. It gets 32 MSI/40 MSI-X vectors.
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86CallingConv.td183 // 256-bit vectors get 32-byte stack slots that are 32-byte aligned.
187 // 512-bit vectors get 64-byte stack slots that are 64-byte aligned.
261 // Boolean vectors of AVX-512 are returned in SIMD registers.
277 // 256-bit vectors are returned in YMM0 and XMM1, when they fit. YMM2 and YMM3
283 // 512-bit vectors are returned in ZMM0 and ZMM1, when they fit. ZMM2 and ZMM3
339 // 256-bit FP vectors
344 // 512-bit FP vectors
581 // Boolean vectors of AVX-512 are passed in SIMD registers.
622 // 256-bit vectors get 32-byte stack slots that are 32-byte aligned.
626 // 512-bit vectors get 64-byte stack slots that are 64-byte aligned.
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/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZCallingConv.td56 // Similarly for vectors, with V24 being the ABI-compliant choice.
57 // Sub-128 vectors are returned in the same way, but they're widened
121 // The first 8 named vector arguments are passed in V24-V31. Sub-128 vectors
129 // However, sub-128 vectors which need to go on the stack occupy just a
196 // ABI compliant code returns vectors in VR24 but other registers
254 // The first 8 named vector arguments are passed in V24-V31. Sub-128 vectors
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCGenRegisterBankInfo.def102 assert(Size <= 128 && "Can currently handle types up to 128 bits (vectors)!");
104 // GPRs, FPRs and vectors. It currently only handles bitcasting to
/freebsd/contrib/expat/lib/
H A Dsiphash.h289 static const unsigned char vectors[64][8] = { in sip24_valid() local
367 if (siphash24(in, i, &k) != SIP_U8TO64_LE(vectors[i])) in sip24_valid()

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