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Searched refs:vaddr0 (Results 1 – 9 of 9) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DMIMGInstructions.td393 string AddrAsm = !if(!eq(num_addrs, 1), "$vaddr0", nsah.AddrAsm);
414 string AddrAsm = !if(!eq(num_addrs, 1), "$vaddr0", nsah.AddrAsm);
452 let InOperandList = !con((ins AddrRC:$vaddr0, SReg_256_XNULL:$srsrc, DMask:$dmask,
456 let AsmString = opcode#" $vdata, $vaddr0, $srsrc$dmask$dim$unorm$cpol$r128$a16$tfe$lwe"
477 let InOperandList = !con((ins AddrRC:$vaddr0, SReg_256_XNULL:$srsrc, DMask:$dmask,
481 let AsmString = opcode#" $vdata, $vaddr0, $srsrc$dmask$dim$unorm$cpol$r128$a16$tfe$lwe"
710 let InOperandList = !con((ins DataRC:$vdata, AddrRC:$vaddr0, SReg_256_XNULL:$srsrc,
714 let AsmString = opcode#" $vdata, $vaddr0, $srsrc$dmask$dim$unorm$cpol$r128$a16$tfe$lwe"
736 let InOperandList = !con((ins DataRC:$vdata, AddrRC:$vaddr0, SReg_256_XNULL:$srsrc,
740 let AsmString = opcode#" $vdata, $vaddr0, $srsrc$dmask$dim$unorm$cpol$r128$a16$tfe$lwe"
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H A DSIInstrFormats.td404 bits<8> vaddr0;
415 let Inst{39-32} = vaddr0;
431 bits<8> vaddr0;
447 let Inst{39-32} = vaddr0;
465 bits<8> vaddr0;
480 let Inst{71-64} = vaddr0;
H A DGCNNSAReassign.cpp182 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::vaddr0); in CheckNSA()
292 AMDGPU::getNamedOperandIdx(MI->getOpcode(), AMDGPU::OpName::vaddr0); in run()
H A DSILoadStoreOptimizer.cpp465 !AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::vaddr0)) in getInstClass()
699 int VAddr0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vaddr0); in getRegs()
859 AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vaddr0) + J; in setMI()
H A DSIShrinkInstructions.cpp312 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::vaddr0); in shrinkMIMG()
H A DSIInstrInfo.cpp474 int VAddr0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vaddr0); in getMemOperandsWithOffsetWidth()
5332 AMDGPU::OpName::vaddr0); in verifyInstruction()
9230 int VAddr0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vaddr0); in getInstSizeInBytes()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUMCCodeEmitter.cpp410 int vaddr0 = AMDGPU::getNamedOperandIdx(MI.getOpcode(), in encodeInstruction() local
411 AMDGPU::OpName::vaddr0); in encodeInstruction()
414 assert(vaddr0 >= 0 && srsrc > vaddr0); in encodeInstruction()
415 unsigned NumExtraAddrs = srsrc - vaddr0 - 1; in encodeInstruction()
419 getMachineOpValue(MI, MI.getOperand(vaddr0 + 1 + i), Encoding, Fixups, in encodeInstruction()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp844 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::vaddr0); in getInstruction()
1178 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::vaddr0); in convertMIMGInst()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp4178 int VAddr0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vaddr0); in validateMIMGAddrSize()