| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64LegalizerInfo.cpp | 58 const LLT v4s32 = LLT::fixed_vector(4, 32); in AArch64LegalizerInfo() local
68 v16s8, v8s16, v4s32, in AArch64LegalizerInfo()
97 .legalFor({v2s8, v4s8, v8s8, v16s8, v2s16, v4s16, v8s16, v2s32, v4s32, in AArch64LegalizerInfo()
105 .clampNumElements(0, v2s32, v4s32) in AArch64LegalizerInfo()
119 .clampNumElements(0, v2s32, v4s32) in AArch64LegalizerInfo()
145 .legalFor({s32, s64, v8s8, v16s8, v4s16, v8s16, v2s32, v4s32, v2s64}) in AArch64LegalizerInfo()
151 .clampNumElements(0, v2s32, v4s32) in AArch64LegalizerInfo()
172 .legalFor({s32, s64, v8s8, v16s8, v4s16, v8s16, v2s32, v4s32, v2s64}) in AArch64LegalizerInfo()
177 .clampNumElements(0, v2s32, v4s32) in AArch64LegalizerInfo()
213 {v4s32, v4s32}, in AArch64LegalizerInfo()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86LegalizerInfo.cpp | |
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86LegalizerInfo.cpp | 65 const LLT v4s32 = LLT::fixed_vector(4, 32); in X86LegalizerInfo() local
82 const LLT s32MaxVector = HasAVX512 ? v16s32 : HasAVX ? v8s32 : v4s32; in X86LegalizerInfo()
153 .legalFor(HasSSE2, {v16s8, v8s16, v4s32, v2s64}) in X86LegalizerInfo()
182 .legalFor(HasSSE41, {v4s32}) in X86LegalizerInfo()
223 .legalFor(HasSSE2, {v16s8, v8s16, v4s32, v2s64}) in X86LegalizerInfo()
290 .legalFor(HasSSE1, {v16s8, v8s16, v4s32, v2s64}) in X86LegalizerInfo()
342 Action.legalForTypesWithMemDesc({{v4s32, p0, v4s32, 1}}); in X86LegalizerInfo()
418 .legalFor(HasSSE1, {v4s32}) in X86LegalizerInfo()
441 .legalFor(HasAVX, {{v4s64, v4s32}}) in X86LegalizerInfo()
446 .legalFor(HasAVX, {{v4s32, v4s64}}) in X86LegalizerInfo()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVLegalizerInfo.cpp | 59 const LLT v4s32 = LLT::fixed_vector(4, 32); in SPIRVLegalizerInfo() local
96 v4s1, v4s8, v4s16, v4s32, v4s64, v8s1, v8s8, v8s16, v8s32, in SPIRVLegalizerInfo()
100 v3s16, v3s32, v3s64, v4s1, v4s8, v4s16, v4s32, in SPIRVLegalizerInfo()
106 v3s1, v3s8, v3s16, v3s32, v3s64, v4s1, v4s8, v4s16, v4s32, v4s64, in SPIRVLegalizerInfo()
111 v4s8, v4s16, v4s32, v4s64, v8s8, v8s16, in SPIRVLegalizerInfo()
122 v4s16, v4s32, v4s64, v8s16, v8s32, v8s64, v16s16, v16s32, v16s64}; in SPIRVLegalizerInfo()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsLegalizerInfo.cpp | 78 const LLT v4s32 = LLT::fixed_vector(4, 32); in MipsLegalizerInfo() local
86 if (ST.hasMSA() && CheckTyN(0, Query, {v16s8, v8s16, v4s32, v2s64})) in MipsLegalizerInfo()
118 {v4s32, p0, 128, NoAlignRequirements}, in MipsLegalizerInfo()
202 if (ST.hasMSA() && CheckTyN(0, Query, {v16s8, v8s16, v4s32, v2s64})) in MipsLegalizerInfo()
285 if (ST.hasMSA() && CheckTyN(0, Query, {v16s8, v8s16, v4s32, v2s64})) in MipsLegalizerInfo()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | IntrinsicsNVVM.td | 738 def V4S32 : TexVector<"v4s32", !listsplat(llvm_i32_ty, 4)>;
|