| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64LegalizerInfo.cpp | 60 const LLT v4s32 = LLT::fixed_vector(4, 32); in AArch64LegalizerInfo() local
70 v16s8, v8s16, v4s32, in AArch64LegalizerInfo()
105 .clampNumElements(0, v2s32, v4s32) in AArch64LegalizerInfo()
121 .legalFor({s32, s64, v4s16, v8s16, v2s32, v4s32, v2s64}) in AArch64LegalizerInfo()
125 .clampNumElements(0, v2s32, v4s32) in AArch64LegalizerInfo()
130 .legalFor({s32, s64, v2s32, v2s64, v4s32, v4s16, v8s16, v16s8, v8s8}) in AArch64LegalizerInfo()
135 .clampNumElements(0, v2s32, v4s32) in AArch64LegalizerInfo()
170 {v4s32, v4s32}, in AArch64LegalizerInfo()
178 .clampNumElements(0, v2s32, v4s32) in AArch64LegalizerInfo()
198 .lowerFor({s8, s16, s32, s64, v2s64, v4s32, v2s32}) in AArch64LegalizerInfo()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86LegalizerInfo.cpp | 62 const LLT v4s32 = LLT::fixed_vector(4, 32); in X86LegalizerInfo() local
79 const LLT s32MaxVector = HasAVX512 ? v16s32 : HasAVX ? v8s32 : v4s32; in X86LegalizerInfo()
144 if (HasSSE2 && typeInSet(0, {v16s8, v8s16, v4s32, v2s64})(Query)) in X86LegalizerInfo()
185 if (HasSSE41 && typeInSet(0, {v4s32})(Query)) in X86LegalizerInfo()
243 if (HasSSE2 && typeInSet(0, {v16s8, v8s16, v4s32, v2s64})(Query)) in X86LegalizerInfo()
319 (HasSSE1 && typeInSet(0, {v16s8, v8s16, v4s32, v2s64})(Query)) || in X86LegalizerInfo()
381 Action.legalForTypesWithMemDesc({{v4s32, p0, v4s32, 1}}); in X86LegalizerInfo()
441 (HasSSE1 && typeInSet(0, {v4s32})(Query)) || in X86LegalizerInfo()
461 (HasAVX && typePairInSet(0, 1, {{v4s64, v4s32}})(Query)) || in X86LegalizerInfo()
468 (HasAVX && typePairInSet(0, 1, {{v4s32, v4s64}})(Query)) || in X86LegalizerInfo()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86LegalizerInfo.cpp | |
| /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVLegalizerInfo.cpp | 82 const LLT v4s32 = LLT::fixed_vector(4, 32); in SPIRVLegalizerInfo() local
113 v3s32, v3s64, v4s1, v4s8, v4s16, v4s32, v4s64, v8s1, v8s8, v8s16, in SPIRVLegalizerInfo()
117 v3s16, v3s32, v3s64, v4s1, v4s8, v4s16, v4s32, in SPIRVLegalizerInfo()
123 v3s1, v3s8, v3s16, v3s32, v3s64, v4s1, v4s8, v4s16, v4s32, v4s64, in SPIRVLegalizerInfo()
128 v4s8, v4s16, v4s32, v4s64, v8s8, v8s16, in SPIRVLegalizerInfo()
139 v4s16, v4s32, v4s64, v8s16, v8s32, v8s64, v16s16, v16s32, v16s64}; in SPIRVLegalizerInfo()
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | IntrinsicsNVVM.td | 1818 "llvm.nvvm.tex.1d.v4s32.s32">;
1822 "llvm.nvvm.tex.1d.v4s32.f32">;
1826 "llvm.nvvm.tex.1d.level.v4s32.f32">;
1831 "llvm.nvvm.tex.1d.grad.v4s32.f32">;
1871 "llvm.nvvm.tex.1d.array.v4s32.s32">;
1875 "llvm.nvvm.tex.1d.array.v4s32.f32">;
1880 "llvm.nvvm.tex.1d.array.level.v4s32.f32">;
1885 "llvm.nvvm.tex.1d.array.grad.v4s32.f32">;
1926 "llvm.nvvm.tex.2d.v4s32.s32">;
1930 "llvm.nvvm.tex.2d.v4s32.f32">;
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsLegalizerInfo.cpp | 78 const LLT v4s32 = LLT::fixed_vector(4, 32); in MipsLegalizerInfo() local
86 if (ST.hasMSA() && CheckTyN(0, Query, {v16s8, v8s16, v4s32, v2s64})) in MipsLegalizerInfo()
118 {v4s32, p0, 128, NoAlignRequirements}, in MipsLegalizerInfo()
202 if (ST.hasMSA() && CheckTyN(0, Query, {v16s8, v8s16, v4s32, v2s64})) in MipsLegalizerInfo()
285 if (ST.hasMSA() && CheckTyN(0, Query, {v16s8, v8s16, v4s32, v2s64})) in MipsLegalizerInfo()
|