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Searched refs:v2i64 (Results 1 – 25 of 95) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchLSXInstrInfo.td136 : PatFrags<(ops), [(bitconvert (v2i64 (build_vector))),
194 (v2i64 (build_vector node:$e0, node:$e0))>;
1207 def PseudoVBNZ_D : VecCond<loongarch_vall_nonzero, v2i64>;
1213 def PseudoVBZ_D : VecCond<loongarch_vall_zero, v2i64>;
1225 def : Pat<(v2i64 (OpNode (v2i64 LSX128:$vj))),
1243 def : Pat<(OpNode (v2i64 LSX128:$vj), (v2i64 LSX128:$vk)),
1261 def : Pat<(OpNode (v2i64 LSX128:$vj), (v2i64 LSX128:$vk)),
1272 def : Pat<(OpNode (v2i64 LSX128:$vj), (v2i64 (SplatPat_simm5 simm5:$imm))),
1283 def : Pat<(OpNode (v2i64 LSX128:$vj), (v2i64 (SplatPat_uimm5 uimm5:$imm))),
1294 def : Pat<(OpNode (v2i64 LSX128:$vd), (v2i64 LSX128:$vj), (v2i64 LSX128:$vk)),
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrAltivec.td914 def : Pat<(v16i8 (bitconvert (v2i64 VRRC:$src))), (v16i8 VRRC:$src)>;
920 def : Pat<(v8i16 (bitconvert (v2i64 VRRC:$src))), (v8i16 VRRC:$src)>;
926 def : Pat<(v4i32 (bitconvert (v2i64 VRRC:$src))), (v4i32 VRRC:$src)>;
932 def : Pat<(v4f32 (bitconvert (v2i64 VRRC:$src))), (v4f32 VRRC:$src)>;
935 def : Pat<(v2i64 (bitconvert (v16i8 VRRC:$src))), (v2i64 VRRC:$src)>;
936 def : Pat<(v2i64 (bitconvert (v8i16 VRRC:$src))), (v2i64 VRRC:$src)>;
937 def : Pat<(v2i64 (bitconvert (v4i32 VRRC:$src))), (v2i64 VRRC:$src)>;
938 def : Pat<(v2i64 (bitconvert (v4f32 VRRC:$src))), (v2i64 VRRC:$src)>;
939 def : Pat<(v2i64 (bitconvert (v1i128 VRRC:$src))), (v2i64 VRRC:$src)>;
945 def : Pat<(v1i128 (bitconvert (v2i64 VRRC:$src))), (v1i128 VRRC:$src)>;
[all …]
H A DPPCInstrP10.td62 def SDT_PPCSplat32 : SDTypeProfile<1, 3, [ SDTCisVT<0, v2i64>,
1348 // Load v2i64
1349 def : Pat<(v2i64 (load (PPCmatpcreladdr PCRelForm:$addr))), (PLXVpc $addr, 0)>;
1351 // Store v2i64
1352 def : Pat<(store v2i64:$XS, (PPCmatpcreladdr PCRelForm:$ga)),
1392 [(set v2i64:$XT,
1393 (PPCxxsplti32dx v2i64:$XTi, i32:$IX,
1468 [(set v2i64:$VD,
1469 (int_ppc_altivec_vinsd v2i64:$VDi, i64:$VB, timm:$VA))]>,
1534 [(set v2i64:$VD,
[all …]
H A DPPCInstrVSX.td681 int_ppc_vsx_xvcmpeqdp, v2i64, v2f64>;
687 int_ppc_vsx_xvcmpgedp, v2i64, v2f64>;
693 int_ppc_vsx_xvcmpgtdp, v2i64, v2f64>;
819 [(set v2i64:$XT, (any_fp_to_sint v2f64:$XB))]>;
827 [(set v2i64:$XT, (any_fp_to_uint v2f64:$XB))]>;
840 [(set v2i64:$XT, (int_ppc_vsx_xvcvspsxds v4f32:$XB))]>;
848 [(set v2i64:$XT, (int_ppc_vsx_xvcvspuxds v4f32:$XB))]>;
856 [(set v2f64:$XT, (any_sint_to_fp v2i64:$XB))]>;
860 [(set v4f32:$XT, (int_ppc_vsx_xvcvsxdsp v2i64:$XB))]>;
868 [(set v2f64:$XT, (any_uint_to_fp v2i64:$XB))]>;
[all …]
H A DREADME_P9.txt14 (set v2i64:$vD, (int_ppc_altivec_vextractub v16i8:$vA, imm:$UIMM))
15 (set v2i64:$vD, (int_ppc_altivec_vextractuh v8i16:$vA, imm:$UIMM))
16 (set v2i64:$vD, (int_ppc_altivec_vextractuw v4i32:$vA, imm:$UIMM))
17 (set v2i64:$vD, (int_ppc_altivec_vextractd v2i64:$vA, imm:$UIMM))
36 (set v2i64:$vD, (int_ppc_altivec_vinsertw v2i64:$vA, imm:$UIMM))
49 (set v2i64:$vD, (cttz v2i64:$vB)) // vctzd
69 (set v2i64:$vD, (sext v2i8:$vB))
77 (set v2i64:$vD, (sext v2i16:$vB))
85 (set v2i64:$vD, (sext v2i32:$vB))
95 (set v2i64:$rT, (ineg v2i64:$rA)) // vnegd
[all …]
H A DPPCCallingConv.td64 CCIfType<[v16i8, v8i16, v4i32, v2i64, v1i128, v4f32, v2f64],
100 CCIfType<[v16i8, v8i16, v4i32, v2i64, v1i128, v4f32, v2f64],
147 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64, v1i128],
150 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64, v1i128],
190 CCIfType<[v16i8, v8i16, v4i32, v2i64, v1i128, v4f32, v2f64],
249 CCIfType<[v16i8, v8i16, v4i32, v4f32, v2f64, v2i64], CCAssignToStack<16, 16>>,
266 CCIfType<[v16i8, v8i16, v4i32, v2i64, v1i128, v4f32, v2f64],
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86TargetTransformInfo.cpp433 { ISD::SRA, MVT::v2i64, { 1, 1, 1, 1 } }, // psraq in getArithmeticInstrCost()
475 { ISD::SHL, MVT::v2i64, { 1, 1, 1, 1 } }, // psllq in getArithmeticInstrCost()
476 { ISD::SRL, MVT::v2i64, { 1, 1, 1, 1 } }, // psrlq in getArithmeticInstrCost()
477 { ISD::SRA, MVT::v2i64, { 2, 3, 3, 3 } }, // psrad + shuffle. in getArithmeticInstrCost()
516 { ISD::SHL, MVT::v2i64, { 1, 2, 1, 1 } }, // psllq. in getArithmeticInstrCost()
517 { ISD::SRL, MVT::v2i64, { 1, 2, 1, 1 } }, // psrlq. in getArithmeticInstrCost()
518 { ISD::SRA, MVT::v2i64, { 2, 3, 3, 3 } }, // psrad + shuffle. in getArithmeticInstrCost()
550 { ISD::SHL, MVT::v2i64, { 1, 1, 1, 1 } }, // psllq. in getArithmeticInstrCost()
551 { ISD::SRL, MVT::v2i64, { 1, 1, 1, 1 } }, // psrlq. in getArithmeticInstrCost()
552 { ISD::SRA, MVT::v2i64, { 3, 5, 6, 6 } }, // 2 x psrad + shuffle. in getArithmeticInstrCost()
[all …]
H A DX86InstrXOP.td128 defm VPROTQ : xop3op<0x93, "vprotq", rotl, v2i64, SchedWriteVarVecShift.XMM>;
132 defm VPSHAQ : xop3op<0x9B, "vpshaq", X86vpsha, v2i64, SchedWriteVarVecShift.XMM>;
136 defm VPSHLQ : xop3op<0x97, "vpshlq", X86vpshl, v2i64, SchedWriteVarVecShift.XMM>;
161 defm VPROTQ : xop3opimm<0xC3, "vprotq", X86vrotli, v2i64,
223 def : Pat<(v2i64 (add (X86pmuldq (bc_v2i64 (X86PShufd (v4i32 VR128:$src1), (i8 -11))),
225 (v2i64 VR128:$src3))),
227 def : Pat<(v2i64 (add (X86pmuldq (v2i64 VR128:$src1), (v2i64 VR128:$src2)),
228 (v2i64 VR12
[all...]
H A DX86CallingConv.td148 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
180 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
225 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
264 CCIfType<[v2i1], CCPromoteToType<v2i64>>,
274 CCIfType<[v16i8, v8i16, v4i32, v2i64, v8f16, v4f32, v2f64],
336 CCIfType<[f32, f64, v4i32, v2i64, v4f32, v2f64],
579 CCPromoteToType<v2i64>>>>,
584 CCIfType<[v2i1], CCPromoteToType<v2i64>>,
592 CCIfType<[f16, f32, f64, f128, v16i8, v8i16, v4i32, v2i64, v8f16, v4f32, v2f64],
620 CCIfType<[v16i8, v8i16, v4i32, v2i64, v8f16, v4f32, v2f64], CCAssignToStack<16, 16>>,
[all …]
H A DX86InstrSSE.td145 def : Pat<(v2i64 immAllZerosV), (V_SET0)>;
629 def : Pat<(alignedstore (v2i64 VR128:$src), addr:$dst),
637 def : Pat<(store (v2i64 VR128:$src), addr:$dst),
1749 (v2i64 (scalar_to_vector
1776 (v2i64 (scalar_to_vector
1787 def : Pat<(v2f64 (X86any_VSintToFP (bc_v4i32 (v2i64 (X86vzload64 addr:$src))))),
1793 def : Pat<(v2f64 (X86any_VSintToFP (bc_v4i32 (v2i64 (X86vzload64 addr:$src))))),
2235 def : Pat<(X86movmsk (v2i64 VR128:$src)),
2252 def : Pat<(X86movmsk (v2i64 VR128:$src)),
2306 defm PAND : PDI_binop_all<0xDB, "pand", and, v2i64, v4i64,
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsMSAInstrInfo.td98 (v2i64 (vector_insert node:$vec, node:$val, node:$idx))>;
107 (v2i64 (MipsINSVE node:$v1, node:$i1, node:$v2, node:$i2))>;
115 def vfseteq_v2f64 : vfsetcc_type<v2i64, v2f64, SETEQ>;
117 def vfsetge_v2f64 : vfsetcc_type<v2i64, v2f64, SETGE>;
119 def vfsetgt_v2f64 : vfsetcc_type<v2i64, v2f64, SETGT>;
121 def vfsetle_v2f64 : vfsetcc_type<v2i64, v2f64, SETLE>;
123 def vfsetlt_v2f64 : vfsetcc_type<v2i64, v2f64, SETLT>;
125 def vfsetne_v2f64 : vfsetcc_type<v2i64, v2f64, SETNE>;
127 def vfsetoeq_v2f64 : vfsetcc_type<v2i64, v2f64, SETOEQ>;
129 def vfsetoge_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGE>;
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZCallingConv.td60 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
80 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
125 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
132 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
137 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
199 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
235 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
258 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
261 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
282 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f3
[all...]
H A DSystemZInstrVector.td204 defm : ReplicatePeephole<VLREPG, v2i64, z_load, i64>;
465 defm : GenericVectorOps<v2i64, v2i64>;
467 defm : GenericVectorOps<v2f64, v2i64>;
895 defm : BitwiseVectorOps<v2i64, z_vnot>;
932 defm : IntegerAbsoluteVectorOps<v2i64, VLCG, VLPG, 63>;
957 defm : IntegerMinMaxVectorOps<v2i64, z_vicmph, VMNG, VMXG>;
963 defm : IntegerMinMaxVectorOps<v2i64, z_vicmphl, VMNLG, VMXLG>;
1698 def : Pat<(v16i8 (bitconvert (v2i64 VR128:$src))), (v16i8 VR128:$src)>;
1706 def : Pat<(v8i16 (bitconvert (v2i64 VR128:$src))), (v8i16 VR128:$src)>;
1714 def : Pat<(v4i32 (bitconvert (v2i64 VR128:$src))), (v4i32 VR128:$src)>;
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SchedFalkorDetails.td615 def : InstRW<[FalkorWr_2VXVY_2cyc], (instregex "^FCM(EQ|LE|GE|GT|LT)(v2i64|v4i32)rz$")>;
626 def : InstRW<[FalkorWr_2VXVY_4cyc], (instregex "^FCVTZ(S|U)(v2i64|v4i32)(_shift)?$")>;
645 (instregex "^ML(A|S)(v16i8|v8i16|v4i32|v2i64)(_indexed)?$")>;
722 def : InstRW<[FalkorWr_2VXVY_1cyc], (instregex "^ADD(v16i8|v8i16|v4i32|v2i64)$")>;
726 def : InstRW<[FalkorWr_2VXVY_1cyc], (instregex "^(NEG|SUB)(v16i8|v8i16|v4i32|v2i64)$")>;
729 def : InstRW<[FalkorWr_2VXVY_2cyc], (instregex "^(S|U)(ADDLP|HADD|HSUB|SHL)(v16i8|v2i64|v4i32|v8i16)(_v.*)?$")>;
731 def : InstRW<[FalkorWr_2VXVY_2cyc], (instregex "^(S|U)SHR(v16i8|v8i16|v4i32|v2i64)_shift$")>;
733 def : InstRW<[FalkorWr_2VXVY_2cyc], (instregex "^((S|U)?(MAX|MIN)P?|ABS)(v16i8|v2i64|v4i32|v8i16)$")>;
735 def : InstRW<[FalkorWr_2VXVY_2cyc], (instregex "^CM(EQ|GE|HS|GT|HI)(v16i8|v2i64|v4i32|v8i16)$")>;
736 def : InstRW<[FalkorWr_2VXVY_2cyc], (instregex "^CM(EQ|LE|GE|GT|LT)(v16i8|v2i64|v4i3
[all...]
H A DAArch64InstrInfo.td1463 def : Pat<(v2i64 (int_aarch64_crypto_sha512su0 (v2i64 V128:$Vn), (v2i64 V128:$Vm))),
1464 (SHA512SU0 (v2i64 V128:$Vn), (v2i64 V128:$Vm))>;
1466 def : SHA3_pattern<SHA512H, int_aarch64_crypto_sha512h, v2i64>;
1467 def : SHA3_pattern<SHA512H2, int_aarch64_crypto_sha512h2, v2i64>;
1468 def : SHA3_pattern<SHA512SU1, int_aarch64_crypto_sha512su1, v2i64>;
1473 def : SHA3_pattern<EOR3, int_aarch64_crypto_eor3u, v2i64>;
1482 def : EOR3_pattern<v2i64>;
1491 def : BCAX_pattern<v2i64>;
1496 def : SHA3_pattern<BCAX, int_aarch64_crypto_bcaxu, v2i64>;
1501 def : SHA3_pattern<EOR3, int_aarch64_crypto_eor3s, v2i64>;
[all …]
H A DAArch64CallingConvention.td33 CCIfType<[v2f64, v4f32], CCBitConvertToType<v2i64>>,
39 CCIfBigEndian<CCIfType<[v2i64, v2f64, v4i32, v4f32, v8i16, v8f16, v8bf16, v16i8],
107 CCIfType<[f128, v2i64, v4i32, v8i16, v16i8, v4f32, v2f64, v8f16, v8bf16],
115 CCIfType<[f128, v2i64, v4i32, v8i16, v16i8, v4f32, v2f64, v8f16, v8bf16],
132 CCIfType<[v2f64, v4f32], CCBitConvertToType<v2i64>>,
141 CCIfBigEndian<CCIfType<[v2i64, v2f64, v4i32, v4f32, v8i16, v8f16, v8bf16, v16i8],
153 CCIfType<[f128, v2i64, v4i32, v8i16, v16i8, v4f32, v2f64, v8f16, v8bf16],
187 CCIfType<[f128, v2f64, v2i64, v4i32, v4f32, v8i16, v8f16, v8bf16, v16i8],
248 CCIfType<[v16i8, v8i16, v4i32, v2i64, v8f16, v4f32, v2f64], CCPassIndirect<i64>>,
328 CCIfType<[v16i8, v8i16, v4i32, v2i64, v8f16, v4f32, v2f64],
[all …]
H A DAArch64InstrGISel.td332 def : Pat<(v2f32 (sint_to_fp v2i64:$src)),
334 def : Pat<(v2f32 (uint_to_fp v2i64:$src)),
337 def : Pat<(v2i64 (fp_to_sint v2f32:$src)),
339 def : Pat<(v2i64 (fp_to_uint v2f32:$src)),
469 def : Pat<(i64 (int_aarch64_neon_saddv (v2i64 V128:$Rn))),
471 (INSERT_SUBREG (v2i64 (IMPLICIT_DEF)),
481 def : Pat<(i64 (int_aarch64_neon_uaddv (v2i64 V128:$Rn))),
483 (INSERT_SUBREG (v2i64 (IMPLICIT_DEF)),
572 def : Pat<(v2i64 (AArch64dup (i64 (load GPR64sp:$Rn)))),
H A DAArch64SchedA57.td353 // Q form - v16i8, v8i16, v4i32, v2i64
412 def : InstRW<[A57Write_3cyc_1W], (instregex "^PMULL(v1i64|v2i64)")>;
425 def : InstRW<[A57Write_4cyc_2X], (instregex "^[SU]SHL(v16i8|v8i16|v4i32|v2i64)")>;
431 def : InstRW<[A57Write_5cyc_2X], (instregex "^[SU][QR]{1,2}SHL(v16i8|v8i16|v4i32|v2i64)")>;
443 // Q form - v4i32, v2i64
453 def : InstRW<[A57Write_9cyc_3V], (instregex "^FADDP(v4f32|v2f64|v2i64)")>;
458 def : InstRW<[A57Write_5cyc_2V], (instregex "^(FACGE|FACGT|FCMEQ|FCMGE|FCMGT|FCMLE|FCMLT)(v4f32|v2f64|v4i32|v2i64)")>;
465 def : InstRW<[A57Write_5cyc_2V], (instregex "^[FSU]CVT([AMNPZ][SU])?(_Int)?(v4f32|v2f64|v4i32|v2i64)")>;
489 def : InstRW<[A57Write_9cyc_3V], (instregex "^(FMAX|FMIN)(NM)?P(v4f32|v2f64|v2i64)")>;
496 def : InstRW<[A57Write_5cyc_2V_FP_Forward], (instregex "^FMULX?(v4f32|v2f64|v4i32|v2i64)")>;
[all...]
H A DAArch64SchedKryoDetails.td26 (instregex "(S|U)R?SRA(v2i64|v4i32|v8i16|v16i8)_shift")>;
51 (instregex "(S|U)(ABD|QSUB|RHADD)(v16i8|v8i16|v4i32|v2i64)")>;
93 (instregex "((S|U)ADDLP|ABS)(v2i64|v4i32|v8i16|v16i8)(_v.*)?")>;
153 (instregex "(S|U)CVTF(v2i64|v4i32|v2f64|v4f32)(_shift)?")>;
207 (instregex "^(S|U)QADD(v16i8|v8i16|v4i32|v2i64)")>;
225 (instregex "(S|U)(QSHLU?|RSHR)(v16i8|v8i16|v4i32|v2i64)_shift$")>;
237 (instregex "(S|U)(QSHL|RSHL|QRSHL)(v16i8|v8i16|v4i32|v2i64)$")>;
291 (instregex "(S|U)SHL(v16i8|v8i16|v4i32|v2i64)$")>;
309 (instregex "((S|U)SHR|SHL)(v16i8|v8i16|v4i32|v2i64)_shift$")>;
381 (instregex "(ADD|SUB)(v16i8|v8i16|v4i32|v2i64)")>;
[all …]
H A DAArch64TargetTransformInfo.cpp568 if (LT.second == MVT::v2i64) in getIntrinsicInstrCost()
580 MVT::v2i64}; in getIntrinsicInstrCost()
593 MVT::v2i64}; in getIntrinsicInstrCost()
601 MVT::v4i32, MVT::v2i64}; in getIntrinsicInstrCost()
665 {Intrinsic::bitreverse, MVT::v2i64, 2}, in getIntrinsicInstrCost()
687 {ISD::CTPOP, MVT::v2i64, 4}, in getIntrinsicInstrCost()
807 {Intrinsic::fshl, MVT::v2i64, 3}, {Intrinsic::fshl, MVT::v16i8, 4}, in getIntrinsicInstrCost()
2523 { ISD::TRUNCATE, MVT::v2i8, MVT::v2i64, 1}, // xtn in getCastInstrCost()
2524 { ISD::TRUNCATE, MVT::v2i16, MVT::v2i64, 1}, // xtn in getCastInstrCost()
2525 { ISD::TRUNCATE, MVT::v2i32, MVT::v2i64, 1}, // xtn in getCastInstrCost()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/Utils/
H A DWebAssemblyTypeUtilities.cpp33 .Case("v2i64", MVT::v2i64) in parseMVT()
53 case MVT::v2i64: in toValType()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMCallingConv.td34 CCIfType<[v2i64, v4i32, v8i16, v8f16, v8bf16, v16i8, v4f32], CCBitConvertToType<v2f64>>,
60 CCIfType<[v2i64, v4i32, v8i16, v8f16, v8bf16, v16i8, v4f32], CCBitConvertToType<v2f64>>,
75 CCIfType<[v2i64, v4i32, v8i16, v8f16, v8bf16, v16i8, v4f32], CCBitConvertToType<v2f64>>,
95 CCIfType<[v2i64, v4i32, v8i16, v8f16, v8bf16, v16i8, v4f32], CCBitConvertToType<v2f64>>,
112 CCIfType<[v2i64, v4i32, v8i16, v8f16, v8bf16, v16i8, v4f32], CCBitConvertToType<v2f64>>,
169 CCIfType<[v2i64, v4i32, v8i16, v8f16, v8bf16, v16i8, v4f32], CCBitConvertToType<v2f64>>,
187 CCIfType<[v2i64, v4i32, v8i16, v8f16, v8bf16, v16i8, v4f32], CCBitConvertToType<v2f64>>,
214 CCIfType<[v2i64, v4i32, v8i16, v8f16, v8bf16, v16i8, v4f32], CCBitConvertToType<v2f64>>,
237 CCIfType<[v2i64, v4i32, v8i16, v8f16, v8bf16, v16i8, v4f32], CCBitConvertToType<v2f64>>,
H A DARMTargetTransformInfo.cpp655 { ISD::SIGN_EXTEND, MVT::v2i64, MVT::v2i32, 1 }, in getCastInstrCost()
656 { ISD::ZERO_EXTEND, MVT::v2i64, MVT::v2i32, 1 }, in getCastInstrCost()
665 { ISD::SIGN_EXTEND, MVT::v2i64, MVT::v2i8, 3 }, in getCastInstrCost()
666 { ISD::ZERO_EXTEND, MVT::v2i64, MVT::v2i8, 3 }, in getCastInstrCost()
667 { ISD::SIGN_EXTEND, MVT::v2i64, MVT::v2i16, 2 }, in getCastInstrCost()
668 { ISD::ZERO_EXTEND, MVT::v2i64, MVT::v2i16, 2 }, in getCastInstrCost()
811 { ISD::SIGN_EXTEND, MVT::v2i64, MVT::v2i8, 10 }, in getCastInstrCost()
812 { ISD::ZERO_EXTEND, MVT::v2i64, MVT::v2i8, 2 }, in getCastInstrCost()
815 { ISD::SIGN_EXTEND, MVT::v2i64, MVT::v2i16, 10 }, in getCastInstrCost()
816 { ISD::ZERO_EXTEND, MVT::v2i64, MVT::v2i16, 2 }, in getCastInstrCost()
[all …]
H A DARMInstrNEON.td1099 (INSERT_SUBREG (v2i64 (IMPLICIT_DEF)), DPR:$src, dsub_0)>;
3478 v2i32, v2i64, OpNode>;
3495 v2i32, v2i64, IntOp>;
3507 def v2i64 : N2VL<op24_23, 0b10, 0b00, 0b00, op11_7, op6, op4, IIC_VQUNAiD,
3508 OpcodeStr, !strconcat(Dt, "32"), v2i64, v2i32, OpNode>;
3561 def v2i64 : N3VQ<op24, op23, 0b11, op11_8, op4, itinQ,
3563 v2i64, v2i64, OpNode, Commutable>;
3669 def v2i64 : N3VQInt<op24, op23, 0b11, op11_8, op4, f, itinQ32,
3671 v2i64, v2i64, IntOp, Commutable>;
3683 def v2i64 : N3VQIntSh<op24, op23, 0b11, op11_8, op4, f, itinQ32,
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp70 addRegisterClass(MVT::v2i64, &WebAssembly::V128RegClass); in WebAssemblyTargetLowering()
93 for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v4f32, MVT::v2i64, in WebAssemblyTargetLowering()
162 for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v2i64}) in WebAssemblyTargetLowering()
203 for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v2i64}) in WebAssemblyTargetLowering()
207 for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v4f32, MVT::v2i64, in WebAssemblyTargetLowering()
212 for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v4f32, MVT::v2i64, in WebAssemblyTargetLowering()
217 for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v4f32, MVT::v2i64, in WebAssemblyTargetLowering()
223 for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v2i64}) in WebAssemblyTargetLowering()
228 for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v4f32, MVT::v2i64, in WebAssemblyTargetLowering()
236 for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v4f32, MVT::v2i64, in WebAssemblyTargetLowering()
[all …]

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