Home
last modified time | relevance | path

Searched refs:v21 (Results 1 – 25 of 38) sorted by relevance

12

/freebsd/sys/crypto/openssl/aarch64/
H A Dsm3-armv8.S56 shl v21.4s, v20.4s, #1
57 sri v21.4s, v20.4s, #31
61 shl v20.4s, v21.4s, #1
62 sri v20.4s, v21.4s, #31
66 shl v21.4s, v20.4s, #1
67 sri v21.4s, v20.4s, #31
71 shl v20.4s, v21.4s, #1
72 sri v20.4s, v21.4s, #31
85 shl v21.4s, v20.4s, #1
86 sri v21.4s, v20.4s, #31
[all …]
H A Dsm4-armv8.S53 ld1 {v20.4s,v21.4s,v22.4s,v23.4s},[x2]
82 ld1 {v20.4s,v21.4s,v22.4s,v23.4s},[x2]
179 ld1 {v20.4s,v21.4s,v22.4s,v23.4s},[x0],#64
197 rev32 v21.16b,v21.16b
291 rev64 v21.4S,v21.4S
293 ext v21.16b,v21.16b,v21.16b,#8
315 rev32 v21.16b,v21.16b
324 st1 {v20.4s,v21.4s,v22.4s,v23.4s},[x1],#64
550 ld1 {v20.4s,v21.4s,v22.4s,v23.4s},[x0]
568 rev32 v21.16b,v21.16b
[all …]
H A Dpoly1305-armv8.S509 umull v21.2d,v14.2s,v3.s[2]
525 umlal v21.2d,v15.2s,v1.s[2]
536 umlal v21.2d,v16.2s,v0.s[2]
547 umlal v21.2d,v17.2s,v8.s[2]
560 umlal v21.2d,v18.2s,v6.s[2]
578 umlal v21.2d,v11.2s,v0.s[0]
590 umlal v21.2d,v9.2s,v3.s[0]
605 umlal v21.2d,v10.2s,v1.s[0]
620 umlal v21.2d,v12.2s,v8.s[0]
631 umlal v21.2d,v13.2s,v6.s[0]
[all …]
H A Dchacha-armv8.S401 dup v21.4s,v1.s[1]
431 add v20.4s,v20.4s,v21.4s
463 eor v5.16b,v21.16b,v22.16b
471 ushr v21.4s,v5.4s,#20
479 sli v21.4s,v5.4s,#12
487 add v20.4s,v20.4s,v21.4s
519 eor v5.16b,v21.16b,v22.16b
526 ushr v21.4s,v5.4s,#25
530 sli v21.4s,v5.4s,#7
533 add v16.4s,v16.4s,v21.4s
[all …]
H A Dghashv8-armx.S53 ext v21.16b,v16.16b,v17.16b,#8 //pack Karatsuba pre-processed
54 st1 {v21.2d,v22.2d},[x0],#32 //store Htable[1..2]
193 ld1 {v20.2d,v21.2d},[x1] //load twisted H, ...
203 pmull v1.1q,v21.1d,v17.1d //(H.lo+H.hi)·(Xi.lo+Xi.hi)
251 ld1 {v20.2d,v21.2d},[x1],#32 //load twisted H, ..., H^2
282 pmull v5.1q,v21.1d,v17.1d
286 pmull2 v1.1q,v21.2d,v18.2d //(H^2.lo+H^2.hi)·(Xi.lo+Xi.hi)
335 pmull v1.1q,v21.1d,v17.1d //(H.lo+H.hi)·(Xi.lo+Xi.hi)
366 ld1 {v20.2d,v21.2d,v22.2d},[x1],#48 //load twisted H, ..., H^2
386 pmull v30.1q,v21.1d,v7.1d
[all …]
H A Daes-gcm-armv8_64.S84 ld1 {v21.4s}, [x8], #16 //load rk3
135 aese v0.16b, v21.16b
138 aese v1.16b, v21.16b
141 aese v2.16b, v21.16b
145 aese v3.16b, v21.16b
372 aese v0.16b, v21.16b
400 aese v1.16b, v21.16b
406 aese v2.16b, v21.16b
436 aese v3.16b, v21.16b
652 aese v2.16b, v21.16b
[all …]
H A Daesv8-armx.S326 ld1 {v20.4s,v21.4s},[x3],#32 // load key schedule...
334 aese v0.16b,v21.16b
366 ld1 {v20.4s,v21.4s},[x3],#32 // load key schedule...
374 aesd v0.16b,v21.16b
400 ld1 {v20.4s,v21.4s},[x7],#32
515 aese v0.16b,v21.16b
517 aese v1.16b,v21.16b
519 aese v24.16b,v21.16b
521 aese v25.16b,v21.16b
523 aese v26.16b,v21.16b
[all …]
H A Dbsaes-armv8.S188 eor v21.16b, v5.16b, v2.16b
195 orr v26.16b, v20.16b, v21.16b
196 and v20.16b, v20.16b, v21.16b
198 eor v21.16b, v21.16b, v23.16b
204 and v21.16b, v24.16b, v21.16b
210 eor v25.16b, v29.16b, v21.16b
211 eor v21.16b, v26.16b, v21.16b
217 eor v9.16b, v21.16b, v9.16b
220 eor v21.16b, v16.16b, v17.16b
228 eor v31.16b, v21.16b, v29.16b
[all …]
H A Dvpsm4-armv8.S70 ld1 {v20.16b,v21.16b,v22.16b,v23.16b},[x10],#64
101 tbx v1.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v4.16b
145 tbl v0.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v0.16b
176 tbl v0.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v0.16b
212 tbl v0.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v0.16b
243 tbl v0.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v0.16b
308 tbl v0.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v0.16b
319 tbl v0.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v0.16b
367 tbl v0.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v0.16b
378 tbl v0.16b,{v20.16b,v21.16b,v22.16b,v23.16b},v0.16b
[all …]
H A Daes-gcm-armv8-unroll8_64.S403 pmull2 v29.1q, v10.2d, v21.2d //GHASH block 8k+2 - mid
405 pmull v21.1q, v10.1d, v21.1d //GHASH block 8k+3 - mid
527 pmull2 v13.1q, v14.2d, v21.2d //GHASH block 8k+6 - mid
533 pmull v21.1q, v14.1d, v21.1d //GHASH block 8k+7 - mid
566 pmull v21.1q, v17.1d, v16.1d //MODULO - top 64b align with mid
636 ext v21.16b, v18.16b, v18.16b, #8 //MODULO - other mid alignment
749 pmull2 v29.1q, v10.2d, v21.2d //GHASH block 8k+2 - mid
752 pmull v21.1q, v10.1d, v21.1d //GHASH block 8k+3 - mid
865 pmull2 v13.1q, v14.2d, v21.2d //GHASH block 8k+6 - mid
866 pmull v21.1q, v14.1d, v21.1d //GHASH block 8k+7 - mid
[all …]
H A Dsha512-armv8.S1105 ld1 {v20.16b,v21.16b,v22.16b,v23.16b},[x1],#64
1116 rev64 v21.16b,v21.16b
1138 ext v7.16b,v20.16b,v21.16b,#8
1150 ext v7.16b,v21.16b,v22.16b,#8
1191 add v25.2d,v25.2d,v21.2d
1234 ext v7.16b,v20.16b,v21.16b,#8
1246 ext v7.16b,v21.16b,v22.16b,#8
1287 add v25.2d,v25.2d,v21.2d
1330 ext v7.16b,v20.16b,v21.16b,#8
1342 ext v7.16b,v21.16b,v22.16b,#8
[all …]
H A Dvpaes-armv8.S112 ld1 {v20.2d,v21.2d,v22.2d,v23.2d}, [x10],#64 // .Lk_ipt, .Lk_sbo
145 tbl v2.16b, {v21.16b}, v0.16b // vpshufb %xmm0, %xmm3, %xmm2
236 tbl v2.16b, {v21.16b}, v0.16b // vpshufb %xmm0, %xmm3, %xmm2
237 tbl v10.16b, {v21.16b}, v8.16b
335 ld1 {v20.2d,v21.2d,v22.2d,v23.2d}, [x11],#64 // .Lk_dipt, .Lk_dsbo
368 tbl v0.16b, {v21.16b}, v0.16b // vpshufb %xmm0, %xmm1, %xmm0
484 tbl v0.16b, {v21.16b},v0.16b // vpshufb %xmm0, %xmm1, %xmm0
485 tbl v8.16b, {v21.16b},v8.16b
608 ld1 {v18.2d,v19.2d,v20.2d,v21.2d}, [x10] // .Lk_inv, .Lk_ipt
776 ld1 {v20.2d,v21.2d}, [x11] // reload constants
[all …]
H A Dsha1-armv8.S1102 add v21.4s,v16.4s,v5.4s
1110 add v21.4s,v16.4s,v7.4s
1120 add v21.4s,v17.4s,v5.4s
1130 add v21.4s,v17.4s,v7.4s
1140 add v21.4s,v17.4s,v5.4s
1150 add v21.4s,v18.4s,v7.4s
1160 add v21.4s,v18.4s,v5.4s
1170 add v21.4s,v19.4s,v7.4s
1180 add v21.4s,v19.4s,v5.4s
1189 add v21.4s,v19.4s,v7.4s
H A Dchacha-armv8-sve.S716 ld1 {v21.4s,v22.4s,v23.4s,v24.4s},[x1],#64
726 ld1 {v21.4s,v22.4s,v23.4s,v24.4s},[x1],#64
1543 ld1 {v21.4s,v22.4s,v23.4s,v24.4s},[x1],#64
1553 ld1 {v21.4s,v22.4s,v23.4s,v24.4s},[x1],#64
2444 ld1 {v21.4s,v22.4s,v23.4s,v24.4s},[x1],#64
2454 ld1 {v21.4s,v22.4s,v23.4s,v24.4s},[x1],#64
3338 ld1 {v21.4s,v22.4s,v23.4s,v24.4s},[x1],#64
3348 ld1 {v21.4s,v22.4s,v23.4s,v24.4s},[x1],#64
/freebsd/sys/contrib/openzfs/module/icp/asm-aarch64/blake3/
H A Db3_aarch64_sse41.S357 eor v21.16b, v16.16b, v6.16b
360 ushr v19.4s, v21.4s, #7
361 shl v20.4s, v21.4s, #25
414 eor v21.16b, v16.16b, v5.16b
417 ushr v19.4s, v21.4s, #7
418 shl v20.4s, v21.4s, #25
461 ushr v21.4s, v19.4s, #12
464 orr v19.16b, v19.16b, v21.16b
465 add v21.4s, v6.4s, v19.4s
466 eor v6.16b, v20.16b, v21.16b
[all …]
H A Db3_aarch64_sse2.S764 zip1 v21.4s, v0.4s, v3.4s
794 zip2 v27.2d, v21.2d, v4.2d
795 mov v21.d[1], v4.d[0]
803 add v0.4s, v4.4s, v21.4s
820 add v21.4s, v4.4s, v17.4s
825 eor v17.16b, v21.16b, v28.16b
867 add v4.4s, v7.4s, v21.4s
887 mov v24.16b, v21.16b
892 zip2 v8.2d, v21.2d, v20.2d
935 zip2 v21.2d, v11.2d, v15.2d
[all …]
/freebsd/sys/contrib/libsodium/src/libsodium/crypto_onetimeauth/poly1305/sse2/
H A Dpoly1305_sse2.c302 xmmi v20, v21, v22, v23, v24; in poly1305_blocks() local
333 v21 = H3; in poly1305_blocks()
334 v21 = _mm_mul_epu32(v21, T15); in poly1305_blocks()
343 T2 = _mm_add_epi64(T2, v21); in poly1305_blocks()
445 v21 = M3; in poly1305_blocks()
446 v21 = _mm_mul_epu32(v21, T15); in poly1305_blocks()
456 T2 = _mm_add_epi64(T2, v21); in poly1305_blocks()
538 xmmi v21, v22, v23, v24; in poly1305_blocks() local
569 v21 = H3; in poly1305_blocks()
570 v21 = _mm_mul_epu32(v21, T15); in poly1305_blocks()
[all …]
/freebsd/sys/contrib/openzfs/module/icp/asm-aarch64/sha2/
H A Dsha512-armv8.S1072 rev64 v21.16b,v21.16b
1094 ext v7.16b,v20.16b,v21.16b,#8
1106 ext v7.16b,v21.16b,v22.16b,#8
1147 add v25.2d,v25.2d,v21.2d
1190 ext v7.16b,v20.16b,v21.16b,#8
1202 ext v7.16b,v21.16b,v22.16b,#8
1243 add v25.2d,v25.2d,v21.2d
1286 ext v7.16b,v20.16b,v21.16b,#8
1298 ext v7.16b,v21.16b,v22.16b,#8
1339 add v25.2d,v25.2d,v21.2d
[all …]
/freebsd/contrib/llvm-project/compiler-rt/lib/tsan/rtl/
H A Dtsan_ppc_regs.h86 #define v21 21 macro
H A Dtsan_rtl_ppc64.S107 stvx v21,0,r6
252 stvx v21,0,r6
/freebsd/contrib/llvm-project/lldb/source/Utility/
H A DARM64_DWARF_Registers.h102 v21, enumerator
H A DARM64_ehframe_Registers.h101 v21, enumerator
/freebsd/contrib/llvm-project/lldb/source/Plugins/Process/Utility/
H A DRegisterContextFreeBSD_powerpc.cpp155 uint32_t v21[4]; member
H A DRegisterInfos_arm64.h637 DEFINE_VREG(v21),
671 DEFINE_FPU_PSEUDO(s21, 4, FPU_S_PSEUDO_REG_ENDIAN_OFFSET, v21),
704 DEFINE_FPU_PSEUDO(d21, 8, FPU_D_PSEUDO_REG_ENDIAN_OFFSET, v21),
H A DRegisterInfos_powerpc.h151 DEFINE_VMX(v21, LLDB_INVALID_REGNUM), \

12