1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2022 Scott Long
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * Thunderbolt 3 / Native Host Interface driver variables
29 *
30 * $FreeBSD$
31 */
32
33 #ifndef _NHI_VAR
34 #define _NHI_VAR
35
36 MALLOC_DECLARE(M_NHI);
37
38 #define NHI_MSIX_MAX 32
39 #define NHI_RING0_TX_DEPTH 16
40 #define NHI_RING0_RX_DEPTH 16
41 #define NHI_DEFAULT_NUM_RINGS 1
42 #define NHI_MAX_NUM_RINGS 32 /* XXX 2? */
43 #define NHI_RING0_FRAME_SIZE 256
44 #define NHI_MAILBOX_TIMEOUT 15
45
46 #define NHI_CMD_TIMEOUT 3 /* 3 seconds */
47
48 struct nhi_softc;
49 struct nhi_ring_pair;
50 struct nhi_intr_tracker;
51 struct nhi_cmd_frame;
52 struct hcm_softc;
53 struct router_softc;
54
55 struct nhi_cmd_frame {
56 TAILQ_ENTRY(nhi_cmd_frame) cm_link;
57 uint32_t *data;
58 bus_addr_t data_busaddr;
59 u_int req_len;
60 uint16_t flags;
61 #define CMD_MAPPED (1 << 0)
62 #define CMD_POLLED (1 << 1)
63 #define CMD_REQ_COMPLETE (1 << 2)
64 #define CMD_RESP_COMPLETE (1 << 3)
65 #define CMD_RESP_OVERRUN (1 << 4)
66 uint16_t retries;
67 uint16_t pdf;
68 uint16_t idx;
69
70 void *context;
71 u_int timeout;
72
73 uint32_t *resp_buffer;
74 u_int resp_len;
75 };
76
77 #define NHI_RING_NAMELEN 16
78 struct nhi_ring_pair {
79 struct nhi_softc *sc;
80
81 union nhi_ring_desc *tx_ring;
82 union nhi_ring_desc *rx_ring;
83
84 uint16_t tx_pi;
85 uint16_t tx_ci;
86 uint16_t rx_pi;
87 uint16_t rx_ci;
88
89 uint16_t rx_pici_reg;
90 uint16_t tx_pici_reg;
91
92 struct nhi_cmd_frame **rx_cmd_ring;
93 struct nhi_cmd_frame **tx_cmd_ring;
94
95 struct mtx mtx;
96 char name[NHI_RING_NAMELEN];
97 struct nhi_intr_tracker *tracker;
98 SLIST_ENTRY(nhi_ring_pair) ring_link;
99
100 TAILQ_HEAD(, nhi_cmd_frame) tx_head;
101 TAILQ_HEAD(, nhi_cmd_frame) rx_head;
102
103 uint16_t tx_ring_depth;
104 uint16_t tx_ring_mask;
105 uint16_t rx_ring_depth;
106 uint16_t rx_ring_mask;
107 uint16_t rx_buffer_size;
108 u_char ring_num;
109
110 bus_dma_tag_t ring_dmat;
111 bus_dmamap_t ring_map;
112 void *ring;
113 bus_addr_t tx_ring_busaddr;
114 bus_addr_t rx_ring_busaddr;
115
116 bus_dma_tag_t frames_dmat;
117 bus_dmamap_t frames_map;
118 void *frames;
119 bus_addr_t tx_frames_busaddr;
120 bus_addr_t rx_frames_busaddr;
121 };
122
123 /* PDF-indexed array of dispatch routines for interrupts */
124 typedef void (nhi_ring_cb_t)(void *, union nhi_ring_desc *,
125 struct nhi_cmd_frame *);
126 struct nhi_pdf_dispatch {
127 nhi_ring_cb_t *cb;
128 void *context;
129 };
130
131 struct nhi_intr_tracker {
132 struct nhi_softc *sc;
133 struct nhi_ring_pair *ring;
134 struct nhi_pdf_dispatch txpdf[16];
135 struct nhi_pdf_dispatch rxpdf[16];
136 u_int vector;
137 };
138
139 struct nhi_softc {
140 device_t dev;
141 device_t ufp;
142 u_int debug;
143 u_int hwflags;
144 #define NHI_TYPE_UNKNOWN 0x00
145 #define NHI_TYPE_USB4 0x0f
146 #define NHI_TYPE_MASK 0x0f
147 #define NHI_MBOX_BUSY 0x10
148 struct hcm_softc *hcm;
149 struct router_softc *root_rsc;
150
151 struct nhi_ring_pair *ring0;
152 struct nhi_intr_tracker *intr_trackers;
153
154 uint16_t path_count;
155 uint16_t max_ring_count;
156
157 struct mtx nhi_mtx;
158 SLIST_HEAD(, nhi_ring_pair) ring_list;
159
160 int msix_count;
161 struct resource *irqs[NHI_MSIX_MAX];
162 void *intrhand[NHI_MSIX_MAX];
163 int irq_rid[NHI_MSIX_MAX];
164 struct resource *irq_pba;
165 int irq_pba_rid;
166 struct resource *irq_table;
167 int irq_table_rid;
168
169 struct resource *regs_resource;
170 bus_space_handle_t regs_bhandle;
171 bus_space_tag_t regs_btag;
172 int regs_rid;
173
174 bus_dma_tag_t parent_dmat;
175
176 bus_dma_tag_t ring0_dmat;
177 bus_dmamap_t ring0_map;
178 void *ring0_frames;
179 bus_addr_t ring0_frames_busaddr;
180 struct nhi_cmd_frame *ring0_cmds;
181
182 struct sysctl_ctx_list *sysctl_ctx;
183 struct sysctl_oid *sysctl_tree;
184
185 struct intr_config_hook ich;
186
187 uint8_t uuid[16];
188 uint8_t lc_uuid[16];
189 };
190
191 struct nhi_dispatch {
192 uint8_t pdf;
193 nhi_ring_cb_t *cb;
194 void *context;
195 };
196
197 #define NHI_IS_USB4(sc) (((sc)->hwflags & NHI_TYPE_MASK) == NHI_TYPE_USB4)
198
199 int nhi_pci_configure_interrupts(struct nhi_softc *sc);
200 void nhi_pci_enable_interrupt(struct nhi_ring_pair *r);
201 void nhi_pci_disable_interrupts(struct nhi_softc *sc);
202 void nhi_pci_free_interrupts(struct nhi_softc *sc);
203 int nhi_pci_get_uuid(struct nhi_softc *sc);
204 int nhi_read_lc_mailbox(struct nhi_softc *, u_int reg, uint32_t *val);
205 int nhi_write_lc_mailbox(struct nhi_softc *, u_int reg, uint32_t val);
206
207 void nhi_get_tunables(struct nhi_softc *);
208 int nhi_attach(struct nhi_softc *);
209 int nhi_detach(struct nhi_softc *);
210
211 struct nhi_cmd_frame * nhi_alloc_tx_frame(struct nhi_ring_pair *);
212 void nhi_free_tx_frame(struct nhi_ring_pair *, struct nhi_cmd_frame *);
213
214 int nhi_inmail_cmd(struct nhi_softc *, uint32_t, uint32_t);
215 int nhi_outmail_cmd(struct nhi_softc *, uint32_t *);
216
217 int nhi_tx_schedule(struct nhi_ring_pair *, struct nhi_cmd_frame *);
218 int nhi_tx_synchronous(struct nhi_ring_pair *, struct nhi_cmd_frame *);
219 void nhi_intr(void *);
220
221 int nhi_register_pdf(struct nhi_ring_pair *, struct nhi_dispatch *,
222 struct nhi_dispatch *);
223 int nhi_deregister_pdf(struct nhi_ring_pair *, struct nhi_dispatch *,
224 struct nhi_dispatch *);
225
226 /* Low level read/write MMIO registers */
227 static __inline uint32_t
nhi_read_reg(struct nhi_softc * sc,u_int offset)228 nhi_read_reg(struct nhi_softc *sc, u_int offset)
229 {
230 return (le32toh(bus_space_read_4(sc->regs_btag, sc->regs_bhandle,
231 offset)));
232 }
233
234 static __inline void
nhi_write_reg(struct nhi_softc * sc,u_int offset,uint32_t val)235 nhi_write_reg(struct nhi_softc *sc, u_int offset, uint32_t val)
236 {
237 bus_space_write_4(sc->regs_btag, sc->regs_bhandle, offset,
238 htole32(val));
239 }
240
241 static __inline struct nhi_cmd_frame *
nhi_alloc_tx_frame_locked(struct nhi_ring_pair * r)242 nhi_alloc_tx_frame_locked(struct nhi_ring_pair *r)
243 {
244 struct nhi_cmd_frame *cmd;
245
246 if ((cmd = TAILQ_FIRST(&r->tx_head)) != NULL)
247 TAILQ_REMOVE(&r->tx_head, cmd, cm_link);
248 return (cmd);
249 }
250
251 static __inline void
nhi_free_tx_frame_locked(struct nhi_ring_pair * r,struct nhi_cmd_frame * cmd)252 nhi_free_tx_frame_locked(struct nhi_ring_pair *r, struct nhi_cmd_frame *cmd)
253 {
254 /* Clear all flags except for MAPPED */
255 cmd->flags &= CMD_MAPPED;
256 cmd->resp_buffer = NULL;
257 TAILQ_INSERT_TAIL(&r->tx_head, cmd, cm_link);
258 }
259
260 #endif /* _NHI_VAR */
261