1 /******************************************************************************* 2 *Copyright (c) 2014 PMC-Sierra, Inc. All rights reserved. 3 * 4 *Redistribution and use in source and binary forms, with or without modification, are permitted provided 5 *that the following conditions are met: 6 *1. Redistributions of source code must retain the above copyright notice, this list of conditions and the 7 *following disclaimer. 8 *2. Redistributions in binary form must reproduce the above copyright notice, 9 *this list of conditions and the following disclaimer in the documentation and/or other materials provided 10 *with the distribution. 11 * 12 *THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY EXPRESS OR IMPLIED 13 *WARRANTIES,INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 14 *FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 15 *FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 16 *NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 17 *BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 18 *LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 19 *SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE 20 * 21 * 22 ********************************************************************************/ 23 /******************************************************************************** 24 ** 25 ** Version Control Information: 26 ** 27 ** 28 *******************************************************************************/ 29 /******************************************************************************** 30 ** 31 ** titypes.h 32 ** 33 ** Abstract: This module contains data structure definition used 34 ** by the Transport Independent API (TIAPI) Layer. 35 ** 36 ********************************************************************************/ 37 38 #include <dev/pms/RefTisa/tisa/api/tidefs.h> 39 40 #ifndef TITYPES_H 41 #define TITYPES_H 42 43 /***************************************************************************** 44 * SHARED TYPES 45 *****************************************************************************/ 46 47 typedef struct tiPortalContext 48 { 49 void *osData; 50 void *tdData; 51 } tiPortalContext_t; 52 53 typedef struct tiDeviceHandle 54 { 55 void *osData; 56 void *tdData; 57 } tiDeviceHandle_t; 58 59 typedef struct tiRoot 60 { 61 void *osData; 62 void *tdData; 63 } tiRoot_t; 64 65 typedef struct tiMem 66 { 67 void *virtPtr; 68 void *osHandle; 69 bit32 physAddrUpper; 70 bit32 physAddrLower; 71 bit32 totalLength; 72 bit32 numElements; 73 bit32 singleElementLength; 74 bit32 alignment; 75 bit32 type; 76 bit32 reserved; 77 } tiMem_t; 78 79 typedef struct tiLoLevelMem 80 { 81 bit32 count; 82 tiMem_t mem[MAX_LL_LAYER_MEM_DESCRIPTORS]; 83 } tiLoLevelMem_t; 84 85 typedef struct tiLoLevelOption 86 { 87 bit32 usecsPerTick; 88 bit32 numOfQueuesPerPort; 89 bit32 mutexLockUsage; 90 bit32 pciFunctionNumber; 91 bit32 maxPortContext; 92 bit32 maxNumOSLocks; 93 agBOOLEAN encryption; 94 bit32 maxInterruptVectors; 95 bit32 flag; 96 bit32 max_MSI_InterruptVectors; 97 #ifdef SA_ENABLE_PCI_TRIGGER 98 bit32 PCI_trigger; 99 #endif /* SA_ENABLE_PCI_TRIGGER */ 100 101 } tiLoLevelOption_t; 102 103 typedef struct tiLoLevelResource 104 { 105 tiLoLevelOption_t loLevelOption; 106 tiLoLevelMem_t loLevelMem; 107 } tiLoLevelResource_t; 108 109 typedef struct tiTdSharedMem 110 { 111 tiMem_t tdSharedCachedMem1; 112 } tiTdSharedMem_t; 113 114 typedef struct tiIORequest 115 { 116 void *osData; 117 void *tdData; 118 } tiIORequest_t; 119 120 typedef struct tiSgl_s 121 { 122 bit32 lower; 123 bit32 upper; 124 bit32 len; 125 bit32 type; 126 } tiSgl_t; 127 128 typedef struct tiSenseData 129 { 130 void *senseData; 131 bit8 senseLen; 132 } tiSenseData_t; 133 134 typedef struct tiIOCTLPayload 135 { 136 bit32 Signature; 137 bit16 MajorFunction; 138 bit16 MinorFunction; 139 bit16 Length; 140 bit16 Status; 141 bit32 Reserved; /* required for 64 bit alignment */ 142 bit8 FunctionSpecificArea[1]; 143 }tiIOCTLPayload_t; 144 145 146 typedef struct tiIOCTLPayload_wwn 147 { 148 bit32 Signature; 149 bit16 MajorFunction; 150 bit16 MinorFunction; 151 bit16 Length; 152 bit16 Status; 153 bit32 Reserved; /* required for 64 bit alignment */ 154 bit8 FunctionSpecificArea[8]; 155 }tiIOCTLPayload_wwn_t; 156 157 typedef struct tiPortInfo 158 { 159 char *name; 160 char *address; 161 char *localName; 162 char *remoteName; 163 bit32 localNameLen; 164 bit32 remoteNameLen; 165 } tiPortInfo_t; 166 167 typedef struct tiDif_s 168 { 169 agBOOLEAN enableDIFPerLA; 170 bit32 flags; 171 bit16 initialIOSeed; 172 bit16 reserved; 173 bit32 DIFPerLAAddrLo; 174 bit32 DIFPerLAAddrHi; 175 bit16 DIFPerLARegion0SecCount; 176 bit16 DIFPerLANumOfRegions; 177 bit8 udtArray[DIF_UDT_SIZE]; 178 bit8 udtrArray[DIF_UDT_SIZE]; 179 } tiDif_t; 180 181 #define DIF_INSERT 0 182 #define DIF_VERIFY_FORWARD 1 183 #define DIF_VERIFY_DELETE 2 184 #define DIF_VERIFY_REPLACE 3 185 #define DIF_VERIFY_UDT_REPLACE_CRC 5 186 #define DIF_REPLACE_UDT_REPLACE_CRC 7 187 188 #define DIF_BLOCK_SIZE_512 0x00 189 #define DIF_BLOCK_SIZE_520 0x01 190 #define DIF_BLOCK_SIZE_4096 0x02 191 #define DIF_BLOCK_SIZE_4160 0x03 192 193 #define DIF_ACTION_FLAG_MASK 0x00000007 /* 0 - 2 */ 194 #define DIF_CRC_VERIFICATION 0x00000008 /* 3 */ 195 #define DIF_CRC_INVERSION 0x00000010 /* 4 */ 196 #define DIF_CRC_IO_SEED 0x00000020 /* 5 */ 197 #define DIF_UDT_REF_BLOCK_COUNT 0x00000040 /* 6 */ 198 #define DIF_UDT_APP_BLOCK_COUNT 0x00000080 /* 7 */ 199 #define DIF_UDTR_REF_BLOCK_COUNT 0x00000100 /* 8 */ 200 #define DIF_UDTR_APP_BLOCK_COUNT 0x00000200 /* 9 */ 201 #define DIF_CUST_APP_TAG 0x00000C00 /* 10 - 11 */ 202 #define DIF_FLAG_RESERVED 0x0000F000 /* 12 - 15 */ 203 #define DIF_DATA_BLOCK_SIZE_MASK 0x000F0000 /* 16 - 19 */ 204 #define DIF_DATA_BLOCK_SIZE_SHIFT 16 205 #define DIF_TAG_VERIFY_MASK 0x03F00000 /* 20 - 25 */ 206 #define DIF_TAG_UPDATE_MASK 0xFC000000 /* 26 - 31 */ 207 208 209 #define NORMAL_BLOCK_SIZE_512 512 210 #define NORMAL_BLOCK_SIZE_4K 4096 211 212 #define DIF_PHY_BLOCK_SIZE_512 512 213 #define DIF_PHY_BLOCK_SIZE_520 520 214 #define DIF_PHY_BLOCK_SIZE_4096 4096 215 #define DIF_PHY_BLOCK_SIZE_4160 4160 216 217 #define DIF_LOGIC_BLOCK_SIZE_520 520 218 #define DIF_LOGIC_BLOCK_SIZE_528 528 219 #define DIF_LOGIC_BLOCK_SIZE_4104 4104 220 #define DIF_LOGIC_BLOCK_SIZE_4168 4168 221 222 223 224 225 typedef struct tiDetailedDeviceInfo 226 { 227 bit8 devType_S_Rate; 228 /* Bit 6-7: reserved 229 Bit 4-5: Two bits flag to specify a SAS or SATA (STP) device: 230 00: SATA or STP device 231 01: SSP or SMP device 232 10: Direct SATA device 233 Bit 0-3: Connection Rate field when opening the device. 234 Code Description: 235 00h: Device has not been registered 236 08h: 1,5 Gbps 237 09h: 3,0 Gbps 238 0ah: 6.0 Gbps 239 All others Reserved 240 */ 241 bit8 reserved1; 242 bit16 reserved2; 243 } tiDetailedDeviceInfo_t; 244 245 typedef struct tiDeviceInfo 246 { 247 char *localName; 248 char *localAddress; 249 char *remoteName; 250 char *remoteAddress; 251 bit16 osAddress1; 252 bit16 osAddress2; 253 bit32 loginState; 254 tiDetailedDeviceInfo_t info; 255 } tiDeviceInfo_t; 256 257 258 #define KEK_BLOB_SIZE 48 259 #define KEK_AUTH_SIZE 40 260 #define KEK_MAX_TABLE_ENTRIES 8 261 262 #define DEK_MAX_TABLES 2 263 #define DEK_MAX_TABLE_ENTRIES (1024*4) 264 265 #define DEK_BLOB_SIZE_07 72 266 #define DEK_BLOB_SIZE_08 80 267 268 #define OPERATOR_ROLE_ID_SIZE 1024 269 270 #define HMAC_SECRET_KEY_SIZE 72 271 272 typedef struct tiEncryptKekBlob 273 { 274 bit8 kekBlob[KEK_BLOB_SIZE]; 275 } tiEncryptKekBlob_t; 276 277 typedef struct tiEncryptDekBlob 278 { 279 bit8 dekBlob[DEK_BLOB_SIZE_08]; 280 } tiEncryptDekBlob_t; 281 282 typedef struct DEK_Table_s { 283 tiEncryptDekBlob_t Dek[DEK_MAX_TABLE_ENTRIES]; 284 }tiDEK_Table_t; 285 286 typedef struct DEK_Tables_s { 287 tiDEK_Table_t DekTable[DEK_MAX_TABLES]; 288 } tiDEK_Tables_t; 289 290 /*sTSDK 4.38 */ 291 #define OPR_MGMT_ID_STRING_SIZE 31 292 293 typedef struct tiID_s { 294 bit8 ID[OPR_MGMT_ID_STRING_SIZE]; 295 } tiID_t; 296 297 typedef struct tiEncryptInfo 298 { 299 bit32 securityCipherMode; 300 bit32 status; 301 bit32 sectorSize[6]; 302 } tiEncryptInfo_t; 303 304 typedef struct tiEncryptPort 305 { 306 bit32 encryptEvent; 307 bit32 subEvent; 308 void *pData; 309 } tiEncryptPort_t; 310 311 typedef struct tiEncryptDek 312 { 313 bit32 dekTable; 314 bit32 dekIndex; 315 } tiEncryptDek_t; 316 317 typedef struct tiEncrypt 318 { 319 tiEncryptDek_t dekInfo; 320 bit32 kekIndex; 321 agBOOLEAN keyTagCheck; 322 agBOOLEAN enableEncryptionPerLA; 323 bit32 sectorSizeIndex; 324 bit32 encryptMode; 325 bit32 keyTag_W0; 326 bit32 keyTag_W1; 327 bit32 tweakVal_W0; 328 bit32 tweakVal_W1; 329 bit32 tweakVal_W2; 330 bit32 tweakVal_W3; 331 bit32 EncryptionPerLAAddrLo; 332 bit32 EncryptionPerLAAddrHi; 333 bit16 EncryptionPerLRegion0SecCount; 334 bit16 reserved; 335 } tiEncrypt_t; 336 337 typedef struct tiHWEventMode_s 338 { 339 bit32 modePageOperation; 340 bit32 status; 341 bit32 modePageLen; 342 void *modePage; 343 void *context; 344 } tiHWEventMode_t; 345 346 /***************************************************************************** 347 * INITIATOR TYPES 348 *****************************************************************************/ 349 350 typedef struct tiInitiatorMem 351 { 352 bit32 count; 353 tiMem_t tdCachedMem[6]; 354 } tiInitiatorMem_t; 355 356 typedef struct tiInitiatorOption 357 { 358 bit32 usecsPerTick; 359 bit32 pageSize; 360 tiMem_t dynamicDmaMem; 361 tiMem_t dynamicCachedMem; 362 bit32 ioRequestBodySize; 363 } tiInitiatorOption_t; 364 365 366 typedef struct tiInitiatorResource 367 { 368 tiInitiatorOption_t initiatorOption; 369 tiInitiatorMem_t initiatorMem; 370 } tiInitiatorResource_t; 371 372 typedef struct tiLUN 373 { 374 bit8 lun[8]; 375 } tiLUN_t; 376 377 typedef struct tiIniScsiCmnd 378 { 379 tiLUN_t lun; 380 bit32 expDataLength; 381 bit32 taskAttribute; 382 bit32 crn; 383 bit8 cdb[16]; 384 } tiIniScsiCmnd_t; 385 386 typedef struct tiScsiInitiatorRequest 387 { 388 void *sglVirtualAddr; 389 tiIniScsiCmnd_t scsiCmnd; 390 tiSgl_t agSgl1; 391 tiDataDirection_t dataDirection; 392 } tiScsiInitiatorRequest_t; 393 394 /* This is the standard request body for I/O that requires DIF or encryption. */ 395 typedef struct tiSuperScsiInitiatorRequest 396 { 397 void *sglVirtualAddr; 398 tiIniScsiCmnd_t scsiCmnd; 399 tiSgl_t agSgl1; 400 tiDataDirection_t dataDirection; 401 bit32 flags; 402 #ifdef CCBUILD_INDIRECT_CDB 403 bit32 IndCDBLowAddr; /* The low physical address of indirect CDB buffer in host memory */ 404 bit32 IndCDBHighAddr; /* The high physical address of indirect CDB buffer in host memory */ 405 bit32 IndCDBLength; /* Indirect CDB length */ 406 void *IndCDBBuffer; /* Indirect SSPIU buffer */ 407 #endif 408 tiDif_t Dif; 409 tiEncrypt_t Encrypt; 410 } tiSuperScsiInitiatorRequest_t; 411 412 typedef struct tiSMPFrame 413 { 414 void *outFrameBuf; 415 bit32 outFrameAddrUpper32; 416 bit32 outFrameAddrLower32; 417 bit32 outFrameLen; 418 bit32 inFrameAddrUpper32; 419 bit32 inFrameAddrLower32; 420 bit32 inFrameLen; 421 bit32 expectedRespLen; 422 bit32 flag; 423 } tiSMPFrame_t; 424 typedef struct tiEVTData 425 { 426 bit32 SequenceNo; 427 bit32 TimeStamp; 428 bit32 Source; 429 bit32 Code; 430 bit8 Reserved; 431 bit8 BinaryDataLength; 432 bit8 DataAndMessage[EVENTLOG_MAX_MSG_LEN]; 433 } tiEVTData_t; 434 435 typedef bit32 (*IsrHandler_t)( 436 tiRoot_t *tiRoot, 437 bit32 channelNum 438 ); 439 typedef void (*DeferedHandler_t)( 440 tiRoot_t *tiRoot, 441 bit32 channelNum, 442 bit32 count, 443 bit32 context 444 ); 445 446 /***************************************************************************** 447 * TARGET TYPES 448 *****************************************************************************/ 449 450 typedef struct tiTargetMem { 451 bit32 count; 452 tiMem_t tdMem[10]; 453 } tiTargetMem_t; 454 455 typedef struct tiTargetOption { 456 bit32 usecsPerTick; 457 bit32 pageSize; 458 bit32 numLgns; 459 bit32 numSessions; 460 bit32 numXchgs; 461 tiMem_t dynamicDmaMem; 462 tiMem_t dynamicCachedMem; 463 } tiTargetOption_t; 464 465 typedef struct 466 { 467 tiTargetOption_t targetOption; 468 tiTargetMem_t targetMem; 469 } tiTargetResource_t; 470 471 typedef struct 472 { 473 bit8 *reqCDB; 474 bit8 *scsiLun; 475 bit32 taskAttribute; 476 bit32 taskId; 477 bit32 crn; 478 } tiTargetScsiCmnd_t; 479 480 typedef struct tiSuperScsiTargetRequest 481 { 482 bit32 flags; 483 tiDif_t Dif; 484 tiEncrypt_t Encrypt; 485 tiSgl_t agSgl; 486 void *sglVirtualAddr; 487 tiSgl_t agSglMirror; 488 void *sglVirtualAddrMirror; 489 bit32 Offset; 490 bit32 DataLength; 491 } tiSuperScsiTargetRequest_t; 492 493 /* SPCv controller mode page definitions */ 494 typedef struct tiEncryptGeneralPage_s { 495 bit32 pageCode; /* 0x20 */ 496 bit32 numberOfDeks; 497 } tiEncryptGeneralPage_t; 498 499 #define TD_ENC_CONFIG_PAGE_KEK_NUMBER 0x0000FF00 500 #define TD_ENC_CONFIG_PAGE_KEK_SHIFT 8 501 502 typedef struct tiEncryptDekConfigPage 503 { 504 bit32 pageCode; /* 0x21 */ 505 bit32 table0AddrLo; 506 bit32 table0AddrHi; 507 bit32 table0Entries; 508 bit32 table0Config; 509 bit32 table1AddrLo; 510 bit32 table1AddrHi; 511 bit32 table1Entries; 512 bit32 table1Config; 513 } tiEncryptDekConfigPage_t; 514 515 #define TD_ENC_DEK_CONFIG_PAGE_DEK_TABLE_NUMBER 0xF0000000 516 #define TD_ENC_DEK_CONFIG_PAGE_DEK_CACHE_WAYS 0x0F000000 517 #define TD_ENC_DEK_CONFIG_PAGE_DPR 0x00000200 518 #define TD_ENC_DEK_CONFIG_PAGE_DER 0x00000100 519 #define TD_ENC_DEK_CONFIG_PAGE_DEK_CACHE_SHIFT 24 520 #define TD_ENC_DEK_CONFIG_PAGE_DEK_TABLE_SHIFT 28 521 #define TD_ENC_DEK_CONFIG_PAGE_DEK_HDP_SHIFT 8 522 523 524 /* CCS (Current Crypto Services) and NOPR (Number of Operators) are valid only in GET_CONTROLLER_CONFIG */ 525 /* NAR, CORCAP and USRCAP are valid only when AUT==1 */ 526 typedef struct tiEncryptControlParamPage_s { 527 bit32 PageCode; /* 0x22 */ 528 bit32 CORCAP; /* Crypto Officer Role Capabilities */ 529 bit32 USRCAP; /* User Role Capabilities */ 530 bit32 CCS; /* Current Crypto Services */ 531 bit32 NOPR; /* Number of Operators */ 532 } tiEncryptControlParamPage_t; 533 534 typedef struct tiEncryptHMACConfigPage_s 535 { 536 bit32 PageCode; 537 bit32 CustomerTag; 538 bit32 KeyAddrLo; 539 bit32 KeyAddrHi; 540 } tiEncryptHMACConfigPage_t; 541 542 typedef struct tiInterruptConfigPage_s { 543 bit32 pageCode; /* 0x05 */ 544 bit32 vectorMask; 545 bit32 reserved; 546 bit32 ICTC0; 547 bit32 ICTC1; 548 bit32 ICTC2; 549 bit32 ICTC3; 550 bit32 ICTC4; 551 bit32 ICTC5; 552 bit32 ICTC6; 553 bit32 ICTC7; 554 } tiInterruptConfigPage_t; 555 556 /* brief data structure for SAS protocol timer configuration page. */ 557 typedef struct tiSASProtocolTimerConfigurationPage_s{ 558 bit32 pageCode; /* 0x04 */ 559 bit32 MST_MSI; 560 bit32 STP_SSP_MCT_TMO; 561 bit32 STP_FRM_TMO; 562 bit32 STP_IDLE_TMO; 563 bit32 OPNRJT_RTRY_INTVL; 564 bit32 Data_Cmd_OPNRJT_RTRY_TMO; 565 bit32 Data_Cmd_OPNRJT_RTRY_THR; 566 } tiSASProtocolTimerConfigurationPage_t; 567 568 /*sTSDK 4.19 */ 569 570 /* The command is for an operator to login to/logout from SPCve. */ 571 /* Only when all IOs are quiesced, can an operator logout. */ 572 typedef struct tiOperatorCommandSet_s { 573 bit32 OPRIDX_PIN_ACS; /* Access type (ACS) [4 bits] */ 574 /* KEYopr pinned in the KEK RAM (PIN) [1 bit] */ 575 /* KEYopr Index in the KEK RAM (OPRIDX) [8 bits] */ 576 bit8 cert[40]; /* Operator Certificate (CERT) [40 bytes] */ 577 bit32 reserved[3]; /* reserved */ 578 } tiOperatorCommandSet_t; 579 580 #define FIPS_SELFTEST_MAX_MSG_LEN (128*1024) 581 #define FIPS_SELFTEST_MAX_DIGEST_SIZE 64 582 583 typedef struct tiEncryptSelfTestDescriptor_s { 584 bit32 AESNTC_AESPTC; /* AES Negative/Positive Test Case Bit Map */ 585 bit32 KWPNTC_PKWPPTC; /* Key Wrap Negative/Positive Test Case Bit Map */ 586 bit32 HMACNTC_HMACPTC; /* HMAC Negative Test Case Bit Map */ 587 } tiEncryptSelfTestDescriptor_t; 588 589 typedef struct tiEncryptSelfTestResult_s{ 590 bit32 AESNTCS_AESPTCS; /* AES Negative/Positive Test Case Status */ 591 bit32 KWPNTCS_PKWPPTCS; /* Key Wrap Negative/Positive Test Case Status */ 592 bit32 HMACNTCS_HMACPTCS; /* HMAC Negative Test Case Status */ 593 } tiEncryptSelfTestResult_t; 594 595 /* 596 Tell SPCve controller the underlying SHA algorithm, where to fetch the message, 597 the size of the message, where to store the digest, where to fetch the secret key and the size of the key. 598 */ 599 typedef struct tiEncryptHMACTestDescriptor_s 600 { 601 bit32 Tlen_SHAAlgo; 602 bit32 MsgAddrLo; 603 bit32 MsgAddrHi; 604 bit32 MsgLen; 605 bit32 DigestAddrLo; 606 bit32 DigestAddrHi; 607 bit32 KeyAddrLo; 608 bit32 KeyAddrHi; 609 bit32 KeyLen; 610 } tiEncryptHMACTestDescriptor_t; 611 612 typedef struct tiEncryptHMACTestResult_s 613 { 614 bit32 Tlen_SHAAlgo; 615 bit32 Reserved[12]; 616 } tiEncryptHMACTestResult_t; 617 618 typedef struct tiEncryptSHATestDescriptor_s 619 { 620 bit32 Dword0; 621 bit32 MsgAddrLo; 622 bit32 MsgAddrHi; 623 bit32 MsgLen; 624 bit32 DigestAddrLo; 625 bit32 DigestAddrHi; 626 } tiEncryptSHATestDescriptor_t; 627 628 typedef struct tiEncryptSHATestResult_s 629 { 630 bit32 Dword0; 631 bit32 Dword[12]; 632 } tiEncryptSHATestResult_t; 633 634 635 #endif /* TITYPES_H */ 636