Searched refs:srsrc (Results 1 – 11 of 11) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | MIMGInstructions.td | 425 let InOperandList = !con((ins addr_rc:$vaddr, SReg_256:$srsrc, 429 let AsmString = asm#" $vdata, $vaddr, $srsrc$dmask$unorm$cpol$r128$tfe$lwe$da" 438 let InOperandList = !con((ins addr_rc:$vaddr, SReg_256:$srsrc, 442 let AsmString = asm#" $vdata, $vaddr, $srsrc$dmask$unorm$cpol$r128$lwe$da" 450 let InOperandList = !con((ins AddrRC:$vaddr0, SReg_256:$srsrc, DMask:$dmask, 454 let AsmString = opcode#" $vdata, $vaddr0, $srsrc$dmask$dim$unorm$cpol$r128$a16$tfe$lwe" 463 (ins SReg_256:$srsrc, DMask:$dmask, 467 let AsmString = opcode#" $vdata, "#AddrAsm#", $srsrc$dmask$dim$unorm$cpol$r128$a16$tfe$lwe" 475 let InOperandList = !con((ins AddrRC:$vaddr0, SReg_256:$srsrc, DMask:$dmask, 479 let AsmString = opcode#" $vdata, $vaddr0, $srsrc$dmask$dim$unorm$cpol$r128$a16$tfe$lwe" [all …]
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H A D | BUFInstructions.td | 148 bits<7> srsrc; 168 dag NonVaddrInputs = !con((ins SReg_128:$srsrc), SOffset, 191 !if(!eq(addrKind, BUFAddrKind.Offset), "off, $srsrc,$format $soffset", 193 "$vaddr, $srsrc,$format $soffset offen", 195 "$vaddr, $srsrc,$format $soffset idxen", 197 "$vaddr, $srsrc,$format $soffset idxen offen", 199 "$vaddr, $srsrc,$format $soffset addr64", 363 bits<7> srsrc; 417 …dag NonVaddrInputs = !con((ins SReg_128:$srsrc), SOffset, (ins Offset:$offset, CPol_0:$cpol, i1imm… 457 !if(!eq(addrKind, BUFAddrKind.Offset), "off, $srsrc, $soffset", [all …]
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H A D | SIInstrFormats.td | 347 bits<7> srsrc; 358 let Inst{52-48} = srsrc{6-2}; 411 bits<7> srsrc; 433 let Inst{52-48} = srsrc{6-2};
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H A D | SILoadStoreOptimizer.cpp | 674 TII.isMIMG(Opc) ? AMDGPU::OpName::srsrc : AMDGPU::OpName::rsrc; in getRegs() 832 Opc, isVIMAGEorVSAMPLE ? AMDGPU::OpName::rsrc : AMDGPU::OpName::srsrc); in setMI() 1525 MIB.add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::srsrc)) in mergeBufferLoadPair() 1569 MIB.add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::srsrc)) in mergeTBufferLoadPair() 1612 MIB.add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::srsrc)) in mergeTBufferStorePair() 1907 MIB.add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::srsrc)) in mergeBufferStorePair()
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H A D | SIInstrInfo.cpp | 314 !nodesHaveSameOperandValue(Load0, Load1, AMDGPU::OpName::srsrc)) in areLoadsFromSameBasePtr() 431 const MachineOperand *RSrc = getNamedOperand(LdSt, AMDGPU::OpName::srsrc); in getMemOperandsWithOffsetWidth() 461 isMIMG(LdSt) ? AMDGPU::OpName::srsrc : AMDGPU::OpName::rsrc; in getMemOperandsWithOffsetWidth() 5149 isMIMG(MI) ? AMDGPU::OpName::srsrc : AMDGPU::OpName::rsrc; in verifyInstruction() 6712 : AMDGPU::OpName::srsrc; in legalizeOperands() 6780 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::srsrc); in legalizeOperands() 6941 AMDGPU::getNamedOperandIdx(MI->getOpcode(), AMDGPU::OpName::srsrc); in insert() 8733 int RSrcIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::srsrc); in getInstSizeInBytes()
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H A D | SIFoldOperands.cpp | 806 if (TII->getNamedOperand(*UseMI, AMDGPU::OpName::srsrc)->getReg() != in foldOperand()
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H A D | GCNHazardRecognizer.cpp | 846 int SRsrcIdx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::srsrc); in createsVALUHazard()
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H A D | SIRegisterInfo.cpp | 1278 .add(*TII->getNamedOperand(*MI, AMDGPU::OpName::srsrc)) in buildMUBUFOffsetLoadStore()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
H A D | AMDGPUMCCodeEmitter.cpp | 400 int srsrc = AMDGPU::getNamedOperandIdx(MI.getOpcode(), in encodeInstruction() local 401 AMDGPU::OpName::srsrc); in encodeInstruction() 402 assert(vaddr0 >= 0 && srsrc > vaddr0); in encodeInstruction() 403 unsigned NumExtraAddrs = srsrc - vaddr0 - 1; in encodeInstruction()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/ |
H A D | AMDGPUDisassembler.cpp | 694 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::srsrc); in getInstruction() 955 int RsrcOpName = (TSFlags & SIInstrFlags::MIMG) ? AMDGPU::OpName::srsrc in convertMIMGInst()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
H A D | AMDGPUAsmParser.cpp | 3919 int RSrcOpName = (Desc.TSFlags & SIInstrFlags::MIMG) ? AMDGPU::OpName::srsrc in validateMIMGAddrSize()
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