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Searched refs:srcin (Results 1 – 14 of 14) sorted by relevance

/freebsd/contrib/arm-optimized-routines/string/aarch64/
H A Dstrcpy.S17 #define srcin x1 macro
55 bic src, srcin, 15
58 lsl shift, srcin, 2
73 sub tmp, src, srcin
78 ldr dataq, [srcin]
79 ldr dataq2, [srcin, tmp]
92 ldr data1, [srcin]
93 ldr data2, [srcin, tmp]
103 ldr dataw1, [srcin]
104 ldr dataw2, [srcin, tmp]
[all …]
H A Dstrlen.S16 #define srcin x0 macro
78 and tmp1, srcin, MIN_PAGE_SIZE - 1
83 ldp data1, data2, [srcin]
115 ldp data1, data2, [srcin, 16]
142 bic src, srcin, 31
155 sub len, src, srcin
171 bic src, srcin, 31
183 lsl shift, srcin, 1
H A Dmemchr-mte.S16 #define srcin x0 macro
43 bic src, srcin, 15
48 lsl shift, srcin, 2
57 add result, srcin, synd, lsr 2
63 sub tmp, src, srcin
91 sub cntrem, src, srcin
H A Dstrnlen.S16 #define srcin x0 macro
39 bic src, srcin, 15
43 lsl shift, srcin, 2
61 sub tmp, src, srcin
88 sub result, src, srcin
H A Dstrchrnul-mte.S16 #define srcin x0 macro
41 bic src, srcin, 15
46 lsl tmp2, srcin, 2
54 add result, srcin, tmp1, lsr 2
H A Dstrlen-mte.S16 #define srcin x0 macro
36 bic src, srcin, 15
39 lsl shift, srcin, 2
60 sub result, src, srcin
H A Dmemrchr.S16 #define srcin x0 macro
45 add end, srcin, cntin
66 subs cntrem, src, srcin
102 cmp tmp, srcin
H A Dstrchr-mte.S16 #define srcin x0 macro
42 bic src, srcin, 15
49 lsl tmp2, srcin, 2
60 add result, srcin, tmp1, lsr 2
H A Dstrchrnul.S17 #define srcin x0 macro
55 bic src, srcin, #31 /* Work with aligned 32-byte hunks. */
57 ands tmp1, srcin, #31
H A Dstrchr.S17 #define srcin x0 macro
60 bic src, srcin, #31 /* Work with aligned 32-byte hunks. */
62 ands tmp1, srcin, #31
H A Dmemchr.S17 #define srcin x0 macro
60 bic src, srcin, #31
62 ands soff, srcin, #31
H A Dstrrchr-mte.S16 #define srcin x0 macro
45 bic src, srcin, 15
53 lsl shift, srcin, 2
H A Dstrrchr.S17 #define srcin x0 macro
64 bic src, srcin, #31 /* Work with aligned 32-byte hunks. */
67 ands tmp1, srcin, #31
/freebsd/contrib/arm-optimized-routines/string/arm/
H A Dstrlen-armv6t2.S36 #define srcin r0 macro
50 pld [srcin, #0]
51 bic src, srcin, #7
53 ands tmp1, srcin, #7 /* (8 - bytes) to alignment. */