| /freebsd/contrib/llvm-project/compiler-rt/lib/xray/ |
| H A D | xray_trampoline_powerpc64_asm.S | 10 # floating point, and vector parameters, so that we only spill those live ones.
151 # floating point, and vector parameters, so that we only spill those live ones.
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | Spiller.h | 31 virtual void spill(LiveRangeEdit &LRE) = 0;
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| H A D | RegisterScavenging.h | 13 /// to spill slots.
41 /// Information on scavenged registers (held in a spill slot).
45 /// A spill slot used for scavenging a register post register allocation.
139 /// If \p AllowSpill is false, fail if a spill is required to make the
158 ScavengedInfo &spill(Register Reg, const TargetRegisterClass &RC, int SPAdj, in getScavengingFrameIndices()
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| /freebsd/tests/sys/kern/tty/ |
| H A D | test_canon_fullbuf.orch | 21 -- Now fill up the next block, but spill the VEOF over to a third block.
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | RegAllocBasic.cpp | 238 spiller().spill(LRE); in spillInterferences()
298 spiller().spill(LRE); in selectOrSplit()
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| H A D | RegisterScavenging.cpp | 13 /// them to spill slots.
86 // Expire scavenge spill frameindex uses.
162 // we have to spill, and can only place the restore after From then in forward()
169 // Non-FrameSetup instructions. Otherwise, the spill position may point in forward()
223 RegScavenger::spill(Register Reg, const TargetRegisterClass &RC, int SPAdj, in forward()
250 // trying to spill a smaller register, the large slot would be found in isRegUsed()
251 // first, thus making it impossible to spill the larger register later. in isRegUsed()
260 // We need to scavenge a register but have no spill slot, the target in FindUnusedReg()
269 // otherwise, use the emergency stack spill slot. in getRegsAvailable()
274 report_fatal_error(Twine("Error while trying to spill ")
376 RegScavenger::spill(Register Reg, const TargetRegisterClass &RC, int SPAdj, spill() function in RegScavenger
[all...] |
| H A D | InlineSpiller.cpp | 201 void spill(LiveRangeEdit &) override;
1283 void InlineSpiller::spill(LiveRangeEdit &edit) { in spill() function in InlineSpiller
1648 for (const auto spill : EqValSpills) in hoistAllSpills()
1649 dbgs() << spill->getParent()->getNumber() << " "; in hoistAllSpills()
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| H A D | RegAllocFast.cpp | 383 void spill(MachineBasicBlock::iterator Before, Register VirtReg,
564 void RegAllocFastImpl::spill(MachineBasicBlock::iterator Before, in spill() function in RegAllocFastImpl
1093 spill(SpillBefore, VirtReg, PhysReg, Kill, LRI->LiveOut); in defineVirtReg()
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| H A D | RegAllocPBQP.cpp | 697 VRegSpiller.spill(LRE); in spillVReg()
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| /freebsd/contrib/llvm-project/lld/ELF/ |
| H A D | LinkerScript.cpp | 1474 PotentialSpillSection *spill = list.head; in spillSections() local
1475 if (spill->next) in spillSections()
1476 list.head = spill->next; in spillSections()
1486 *llvm::find(spill->isd->sections, spill) = isec; in spillSections()
1487 isec->parent = spill->parent; in spillSections()
1488 isec->addralign = spill->addralign; in spillSections()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FastPreTileConfig.cpp | 71 void spill(MachineBasicBlock::iterator Before, Register VirtReg, bool Kill);
201 void X86FastPreTileConfig::spill(MachineBasicBlock::iterator Before, in spill() function in X86FastPreTileConfig
624 spill(++MI.getIterator(), TileReg, false); in configBasicBlock()
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| /freebsd/sys/contrib/openzfs/module/zfs/ |
| H A D | dsl_bookmark.c | 463 boolean_t spill = B_FALSE; in dsl_bookmark_create_sync_impl_snap() local
471 spill = B_TRUE; in dsl_bookmark_create_sync_impl_snap()
474 DMU_OTN_UINT64_METADATA, spill ? 0 : bonuslen, tx); in dsl_bookmark_create_sync_impl_snap()
477 if (spill) { in dsl_bookmark_create_sync_impl_snap()
486 if (!spill) { in dsl_bookmark_create_sync_impl_snap()
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| H A D | dmu_recv.c | 120 boolean_t spill; /* DRR_FLAG_SPILL_BLOCK set */ member
1929 (!rwa->spill && DRR_OBJECT_HAS_SPILL(drro->drr_flags))) { in receive_object()
2046 dn_slots << DNODE_SHIFT, rwa->spill ? in receive_object()
2048 } else if (rwa->spill && !DRR_OBJECT_HAS_SPILL(drro->drr_flags)) { in receive_object()
2537 if (rwa->spill && DRR_SPILL_IS_UNMODIFIED(drrs->drr_flags)) { in receive_spill()
3401 rwa->spill = drc->drc_spill; in dmu_recv_stream()
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| H A D | dmu_send.c | 1775 uint64_t spill = 0; in send_reader_thread() local
1783 spill = piggyback_unmodified_spill(srta, range); in send_reader_thread()
1788 bqueue_enqueue(outq, range, sizeof (*range) + spill); in send_reader_thread()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcRegisterInfo.td | 355 // Register class for 64-bit mode, with a 64-bit spill slot size.
358 // spill slot is a stricter constraint than only requiring a 32-bit spill slot.
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| /freebsd/sys/contrib/openzfs/tests/zfs-tests/tests/functional/channel_program/synctask_core/ |
| H A D | tst.set_props.zcp | 35 -- add an extra character so we spill over the limit
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kRegisterInfo.td | 148 // These classes provide spill/restore order if used with MOVEM instruction
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| H A D | M68kInstrData.td | 267 // The mask is already pre-processed by the save/restore spill hook
329 // Pseudo versions. These a required by virtual register spill/restore since
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | README.txt | 151 We might want to model all access registers and use them to spill
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| /freebsd/contrib/llvm-project/lld/docs/ELF/ |
| H A D | linker_script.rst | 204 The flag ``--enable-non-contiguous-regions`` allows input sections to spill to
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchFloat32InstrInfo.td | 124 // Pseudo instructions for spill/reload CFRs.
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMRegisterInfo.td | 231 // know how to spill them. If we make our prologue/epilogue code smarter at
248 // know how to spill them. If we make our prologue/epilogue code smarter at
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| H A D | ARMCallingConv.td | 322 // Also save R7-R4 first to match the stack frame fixed spill areas.
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrFormats.td | 49 // Combined SGPR/VGPR spill bit
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | Target.td | 71 // A class representing the register size, spill size and spill alignment
271 // Size - Specify the spill size in bits of the registers. A default value of
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