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Searched refs:simm32 (Results 1 – 8 of 8) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/VE/Disassembler/
H A DVEDisassembler.cpp322 uint64_t simm32 = SignExtend64<32>(fieldFromInstruction(insn, 0, 32)); in DecodeASX() local
344 MI.addOperand(MCOperand::createImm(simm32)); in DecodeASX()
353 uint64_t simm32 = SignExtend64<32>(fieldFromInstruction(insn, 0, 32)); in DecodeAS() local
366 MI.addOperand(MCOperand::createImm(simm32)); in DecodeAS()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsInstrInfo.td1073 // like simm32 but coerces simm32 to uimm32.
1077 // Like simm32 but coerces uimm32 to simm32.
2594 (SEQIMacro GPR32Opnd:$rd, GPR32Opnd:$rd, simm32:$imm), 0>,
2610 (SNEIMacro GPR32Opnd:$rd, GPR32Opnd:$rd, simm32:$imm), 0>,
2710 (ins GPR32Opnd:$rs, simm32:$imm),
2714 simm32:$imm), 0>,
2739 (ins GPR32Opnd:$rs, simm32:$imm),
2743 simm32:$imm), 0>,
2767 (ins GPR32Opnd:$rs, simm32:$imm),
2771 simm32:$imm), 0>,
[all …]
H A DMips16InstrInfo.td486 def Constant32 : MipsPseudo16<(outs), (ins simm32:$imm), "\t.word $imm", []>;
489 MipsPseudo16<(outs CPU16Regs:$rx), (ins simm32:$imm, simm32:$constid),
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZInstrInfo.td1013 def AFIMux : BinaryRIPseudo<z_sadd, GRX32, simm32>,
1015 def AFI : BinaryRIL<"afi", 0xC29, z_sadd, GR32, simm32>;
1016 def AIH : BinaryRIL<"aih", 0xCC8, z_sadd, GRH32, simm32>,
1060 def ALSIH : BinaryRIL<"alsih", 0xCCA, null_frag, GRH32, simm32>,
1086 def ALSIHN : BinaryRIL<"alsihn", 0xCCB, null_frag, GRH32, simm32>,
1417 def MSFI : BinaryRIL<"msfi", 0xC21, mul, GR32, simm32>;
1597 def CFIMux : CompareRIPseudo<z_scmp, GRX32, simm32>,
1599 def CFI : CompareRIL<"cfi", 0xC2D, z_scmp, GR32, simm32>;
1600 def CIH : CompareRIL<"cih", 0xCCD, z_scmp, GRH32, simm32>,
1762 def ATOMIC_LOADW_AFI : AtomicLoadWBinaryImm<z_atomic_loadw_add, simm32>;
H A DSystemZOperands.td391 defm simm32 : Immediate<i32, [{}], SIMM32, "S32Imm">;
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEInstrInfo.td25 // $disp has 32 bits to represent simm32.
238 def simm32 : PatLeaf<(imm), [{ return isInt<32>(N->getSExtValue()); }]>;
1010 def : Pat<(add I64:$base, simm32:$disp), (LEArii $base, 0, (LO32 $disp))>;
1605 def : Pat<(i32 simm32:$val), (l2i (LEAzii 0, 0, (LO32 $val)))>;
1606 def : Pat<(i64 simm32:$val), (LEAzii 0, 0, (LO32 $val))>;
1622 def : Pat<(lea_add I64:$base, simm7:$idx, simm32:$disp),
1624 def : Pat<(lea_add I64:$base, I64:$idx, simm32:$disp),
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfo.td470 // most/least significant bit with the remainder zero and exceeds simm32/simm12.
1291 // AND with leading/trailing ones mask exceeding simm32/simm12.
/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFInstrInfo.td774 // 0xffffFFFF doesn't fit into simm32, optimize common case