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Searched refs:shifts (Results 1 – 25 of 81) sorted by relevance

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/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_gpio.c430 u_int32_t regs[2], shifts[2]; in ar9300_gpio_set_intr() local
440 shifts[0] = AR_INTR_ASYNC_ENABLE_GPIO_S; in ar9300_gpio_set_intr()
441 shifts[1] = AR_INTR_ASYNC_MASK_GPIO_S; in ar9300_gpio_set_intr()
445 shifts[0] = AR_INTR_SYNC_ENABLE_GPIO_S; in ar9300_gpio_set_intr()
446 shifts[1] = AR_INTR_SYNC_MASK_GPIO_S; in ar9300_gpio_set_intr()
464 reg_bit = shifts[i] + gpio; in ar9300_gpio_set_intr()
470 field_val = (reg_val >> shifts[i]) & gpio_mask; in ar9300_gpio_set_intr()
491 reg_bit = shifts[i] + gpio; in ar9300_gpio_set_intr()
497 field_val = (reg_val >> shifts[i]) & gpio_mask; in ar9300_gpio_set_intr()
/freebsd/secure/lib/libcrypt/
H A Dcrypt-des.c369 int shifts, round; in des_setkey() local
413 shifts = 0; in des_setkey()
417 shifts += key_shifts[round]; in des_setkey()
419 t0 = (k0 << shifts) | (k0 >> (28 - shifts)); in des_setkey()
420 t1 = (k1 << shifts) | (k1 >> (28 - shifts)); in des_setkey()
/freebsd/crypto/openssl/doc/man3/
H A DBN_set_bit.pod42 BN_lshift() shifts B<a> left by B<n> bits and places the result in
43 B<r> (C<r=a*2^n>). Note that B<n> must be nonnegative. BN_lshift1() shifts
46 BN_rshift() shifts B<a> right by B<n> bits and places the result in
47 B<r> (C<r=a/2^n>). Note that B<n> must be nonnegative. BN_rshift1() shifts
/freebsd/contrib/byacc/
H A Dlr0.c21 shifts *first_shift;
27 static shifts *last_shift;
384 shifts *p; in show_shifts()
404 shifts *p; in save_shifts()
409 p = (shifts *)allocate((sizeof(shifts) + in save_shifts()
H A Ddefs.h248 typedef struct shifts shifts; typedef
249 struct shifts struct
251 struct shifts *next; argument
393 extern shifts *first_shift;
397 extern shifts **shift_table;
H A Dlalr.c35 shifts **shift_table;
94 shifts *sp; in set_shift_table()
96 shift_table = NEW2(nstates, shifts *); in set_shift_table()
179 shifts *sp; in set_goto_map()
279 shifts *sp; in initialize_F()
357 shifts *sp; in build_relations()
H A Dverbose.c251 shifts *sp; in print_actions()
349 shifts *sp; in print_gotos()
H A Dgraph.c15 shifts *sp; in graph()
H A Dmkpar.c77 shifts *sp; in get_shifts()
175 shifts *p; in find_final_state()
/freebsd/crypto/openssl/crypto/bn/
H A Dbn_gcd.c553 int i, j, top, rlen, glen, m, bit = 1, delta = 1, cond = 0, shifts = 0, ret = 0; in BN_gcd() local
587 shifts += bit; in BN_gcd()
593 if (!BN_rshift(r, r, shifts) in BN_gcd()
594 || !BN_rshift(g, g, shifts)) in BN_gcd()
637 if (!BN_lshift(r, r, shifts) in BN_gcd()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86Schedule.td193 // Integer shifts and rotates.
372 defm WriteVecShift : X86SchedWritePair<ReadAfterVecLd>; // Vector integer shifts (default).
373 defm WriteVecShiftX : X86SchedWritePair<ReadAfterVecXLd>; // Vector integer shifts (XMM).
374 defm WriteVecShiftY : X86SchedWritePair<ReadAfterVecYLd>; // Vector integer shifts (YMM).
375 defm WriteVecShiftZ : X86SchedWritePair<ReadAfterVecYLd>; // Vector integer shifts (ZMM).
376 defm WriteVecShiftImm : X86SchedWritePair<ReadAfterVecLd>; // Vector integer immediate shifts (default).
377 defm WriteVecShiftImmX: X86SchedWritePair<ReadAfterVecXLd>; // Vector integer immediate shifts (XMM).
378 defm WriteVecShiftImmY: X86SchedWritePair<ReadAfterVecYLd>; // Vector integer immediate shifts (YMM).
379 defm WriteVecShiftImmZ: X86SchedWritePair<ReadAfterVecYLd>; // Vector integer immediate shifts (ZMM).
500 defm WriteVarVecShift : X86SchedWritePair<ReadAfterVecXLd>; // Variable vector shifts
[all...]
H A DX86ScheduleZnver3.td739 // Integer shifts and rotates.
1100 defm : Zn3WriteResXMMPair<WriteVecShift, [Zn3FPVShift01], 1, [1], 1>; // Vector integer shifts (de…
1101 defm : Zn3WriteResXMMPair<WriteVecShiftX, [Zn3FPVShift01], 1, [1], 1>; // Vector integer shifts (XM…
1102 defm : Zn3WriteResYMMPair<WriteVecShiftY, [Zn3FPVShift01], 1, [1], 1>; // Vector integer shifts (YM…
1103 defm : X86WriteResPairUnsupported<WriteVecShiftZ>; // Vector integer shifts (ZMM).
1104 …MPair<WriteVecShiftImm, [Zn3FPVShift01], 1, [1], 1>; // Vector integer immediate shifts (default).
1105 …esXMMPair<WriteVecShiftImmX, [Zn3FPVShift01], 1, [1], 1>; // Vector integer immediate shifts (XMM).
1106 …esYMMPair<WriteVecShiftImmY, [Zn3FPVShift01], 1, [1], 1>; // Vector integer immediate shifts (YMM).
1107 defm : X86WriteResPairUnsupported<WriteVecShiftImmZ>; // Vector integer immediate shifts (ZMM).
1377 defm : Zn3WriteResXMMPair<WriteVarVecShift, [Zn3FPVShift01], 1, [1], 1>; // Variable vector shifts.
[all …]
H A DX86ScheduleZnver4.td750 // Integer shifts and rotates.
1143 defm : Zn4WriteResXMMPair<WriteVecShift, [Zn4FPVShift01], 1, [1], 1>; // Vector integer shifts (de…
1144 defm : Zn4WriteResXMMPair<WriteVecShiftX, [Zn4FPVShift01], 2, [2], 1>; // Vector integer shifts (XM…
1145 defm : Zn4WriteResYMMPair<WriteVecShiftY, [Zn4FPVShift01], 1, [1], 1>; // Vector integer shifts (YM…
1146 defm : Zn4WriteResZMMPair<WriteVecShiftZ, [Zn4FPVShift01], 1, [2], 1>; // Vector integer shifts (ZM…
1147 …MPair<WriteVecShiftImm, [Zn4FPVShift01], 1, [1], 1>; // Vector integer immediate shifts (default).
1148 …esXMMPair<WriteVecShiftImmX, [Zn4FPVShift01], 1, [1], 1>; // Vector integer immediate shifts (XMM).
1149 …esYMMPair<WriteVecShiftImmY, [Zn4FPVShift01], 1, [1], 1>; // Vector integer immediate shifts (YMM).
1150 …esZMMPair<WriteVecShiftImmZ, [Zn4FPVShift01], 1, [2], 1>; // Vector integer immediate shifts (ZMM).
1431 defm : Zn4WriteResXMMPair<WriteVarVecShift, [Zn4FPVShift01], 1, [1], 1>; // Variable vector shifts.
[all …]
H A DX86SchedBroadwell.td163 // Integer shifts and rotates.
473 // Vector integer shifts.
483 …riteResPair<WriteVecShiftImmX, [BWPort0], 1, [1], 1, 5>; // Vector integer immediate shifts (XMM).
484 …ResPair<WriteVecShiftImmY, [BWPort0], 1, [1], 1, 6>; // Vector integer immediate shifts (YMM/ZMM).
486 …: BWWriteResPair<WriteVarVecShift, [BWPort0, BWPort5], 3, [2,1], 3, 5>; // Variable vector shifts.
487 …esPair<WriteVarVecShiftY, [BWPort0, BWPort5], 3, [2,1], 3, 6>; // Variable vector shifts (YMM/ZMM).
H A DX86SchedSkylakeClient.td188 // Integer shifts and rotates.
409 // Vector integer shifts.
417 … SKLWriteResPair<WriteVecShiftImm, [SKLPort0], 1, [1], 1, 5>; // Vector integer immediate shifts.
421 defm : SKLWriteResPair<WriteVarVecShift, [SKLPort01], 1, [1], 1, 6>; // Variable vector shifts.
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Ddra62x-clocks.dtsi32 * Compared to dm814x, dra62x has different shifts and more mux options.
/freebsd/contrib/bzip2/
H A Dblocksort.c992 Int32 shifts = 0; in mainSort() local
994 while ((bbSize >> shifts) > 65534) shifts++; in mainSort()
998 UInt16 qVal = (UInt16)(j >> shifts); in mainSort()
1003 AssertH ( ((bbSize-1) >> shifts) <= 65535, 1002 ); in mainSort()
/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiInstrFormats.td42 // halfword is 0xFFFF, and shifts (`AAA' = 111), for which the constant is
79 // a + ~b + `C''). For left shifts, `C' is set to the least
130 // number (in the same way as shifts in the Register-Immediate
139 // is cleared. Only arithmetic instructions and shifts modify `C'. Right
140 // shifts clear C.
/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DIntrinsicsARM.td578 // be used for both left and right shifts, or even combinations of the two,
580 // behavior for shift amounts that LLVM leaves undefined. Only basic shifts
584 // shifts, where the constant is replicated. For consistency with VSHL (and
585 // other variable shift instructions), left shifts have positive shift counts
586 // and right shifts have negative shift counts. This convention is also used
1105 // MVE scalar shifts.
1110 // Most of these shifts come in 32- and 64-bit versions. But only
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64Schedule.td30 def WriteExtr : SchedWrite; // EXTR shifts a reg pair
H A DAArch64SchedAmpere1.td43 def Ampere1UnitB : ProcResource<2>; // integer single-cycle, and complex shifts
569 // For basic arithmetic, we have more flexibility for short shifts (LSL shift <= 4),
596 def : WriteRes<WriteExtr, [Ampere1UnitB]>; // EXTR shifts a reg pair
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcInstrFormats.td208 bit x = xVal; // 1 for 64-bit shifts.
223 bit x = xVal; // 1 for 64-bit shifts.
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dmsm8996pro.dtsi13 * On MSM8996 Pro the cpufreq driver shifts speed bins into the high
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMScheduleM7.td28 // EX1: address generation shifts
58 // Basic ALU with shifts.
/freebsd/contrib/llvm-project/llvm/include/llvm/Target/
H A DTargetCallingConv.td168 /// value to the specified type and shifts the value into the upper bits.

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