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Searched refs:setOpcode (Results 1 – 25 of 84) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCDuplexInfo.cpp710 Result.setOpcode(Hexagon::SA1_inc); in deriveSubInst()
716 Result.setOpcode(Hexagon::SA1_dec); in deriveSubInst()
723 Result.setOpcode(Hexagon::SA1_addsp); in deriveSubInst()
729 Result.setOpcode(Hexagon::SA1_addi); in deriveSubInst()
735 Result.setOpcode(Hexagon::SA1_addrx); in deriveSubInst()
741 Result.setOpcode(Hexagon::SS2_allocframe); in deriveSubInst()
746 Result.setOpcode(Hexagon::SA1_zxtb); in deriveSubInst()
751 Result.setOpcode(Hexagon::SA1_and1); in deriveSubInst()
757 Result.setOpcode(Hexagon::SA1_cmpeqi); in deriveSubInst()
766 Result.setOpcode(Hexagon::SA1_combine1i); in deriveSubInst()
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H A DHexagonMCCompound.cpp214 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn()
227 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn()
241 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn()
254 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn()
267 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn()
285 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn()
303 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn()
314 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn()
325 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonAsmPrinter.cpp248 T.setOpcode(Inst.getOpcode()); in ScaleVectorOffset()
277 Inst.setOpcode(Hexagon::A2_addi); in HexagonProcessInstruction()
291 Inst.setOpcode(Hexagon::A2_paddif); in HexagonProcessInstruction()
298 Inst.setOpcode(Hexagon::A2_paddit); in HexagonProcessInstruction()
305 Inst.setOpcode(Hexagon::A2_paddifnew); in HexagonProcessInstruction()
312 Inst.setOpcode(Hexagon::A2_padditnew); in HexagonProcessInstruction()
319 Inst.setOpcode(Hexagon::A2_andir); in HexagonProcessInstruction()
336 TmpInst.setOpcode(Hexagon::L2_loadrdgp); in HexagonProcessInstruction()
353 TmpInst.setOpcode(Hexagon::L2_loadrigp); in HexagonProcessInstruction()
366 MappedInst.setOpcode(Hexagon::C2_or); in HexagonProcessInstruction()
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/freebsd/contrib/llvm-project/llvm/lib/Target/XCore/Disassembler/
H A DXCoreDisassembler.cpp257 Inst.setOpcode(XCore::STW_2rus); in Decode2OpInstructionFail()
260 Inst.setOpcode(XCore::LDW_2rus); in Decode2OpInstructionFail()
263 Inst.setOpcode(XCore::ADD_3r); in Decode2OpInstructionFail()
266 Inst.setOpcode(XCore::SUB_3r); in Decode2OpInstructionFail()
269 Inst.setOpcode(XCore::SHL_3r); in Decode2OpInstructionFail()
272 Inst.setOpcode(XCore::SHR_3r); in Decode2OpInstructionFail()
275 Inst.setOpcode(XCore::EQ_3r); in Decode2OpInstructionFail()
278 Inst.setOpcode(XCore::AND_3r); in Decode2OpInstructionFail()
281 Inst.setOpcode(XCore::OR_3r); in Decode2OpInstructionFail()
284 Inst.setOpcode(XCore::LDW_3r); in Decode2OpInstructionFail()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/AsmParser/
H A DHexagonAsmParser.cpp165 MCB.setOpcode(Hexagon::BUNDLE); in HexagonAsmParser()
545 NewInst.setOpcode(MCI.getOpcode()); in canonicalizeImmediates()
1298 TmpInst.setOpcode(opCode); in makeCombineInst()
1404 Inst.setOpcode(Hexagon::A2_addi); in processInstruction()
1438 Inst.setOpcode(Hexagon::C2_cmpgti); in processInstruction()
1452 TmpInst.setOpcode(Hexagon::C2_cmpeq); in processInstruction()
1462 Inst.setOpcode(Hexagon::C2_cmpgtui); in processInstruction()
1474 Inst.setOpcode(Hexagon::A2_combinew); in processInstruction()
1485 Inst.setOpcode((Inst.getOpcode() == Hexagon::A2_tfrpt) in processInstruction()
1497 Inst.setOpcode((Inst.getOpcode() == Hexagon::A2_tfrptnew) in processInstruction()
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/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVAsmPrinter.cpp169 FunctionEndInst.setOpcode(SPIRV::OpFunctionEnd); in outputOpFunctionEnd()
184 LabelInst.setOpcode(SPIRV::OpLabel); in emitOpLabel()
302 Inst.setOpcode(SPIRV::OpSourceExtension); in outputDebugSourceAndStrings()
310 Inst.setOpcode(SPIRV::OpSource); in outputDebugSourceAndStrings()
322 Inst.setOpcode(SPIRV::OpExtInstImport); in outputOpExtInstImports()
333 Inst.setOpcode(SPIRV::OpMemoryModel); in outputOpMemoryModel()
382 Inst.setOpcode(SPIRV::OpCapability); in outputGlobalRequirements()
390 Inst.setOpcode(SPIRV::OpExtension); in outputGlobalRequirements()
460 Inst.setOpcode(SPIRV::OpExecutionMode); in outputExecutionModeFromMDNode()
479 Inst.setOpcode(SPIRV::OpExecutionMode); in outputExecutionModeFromNumthreadsAttribute()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/Disassembler/
H A DAVRDisassembler.cpp283 Inst.setOpcode(AVR::RJMPk); in decodeFBRk()
286 Inst.setOpcode(AVR::RCALLk); in decodeFBRk()
319 Inst.setOpcode(It->second); in decodeCondBranch()
323 Inst.setOpcode(Insn & 0x400 ? AVR::BRBCsk : AVR::BRBSsk); in decodeCondBranch()
342 Inst.setOpcode(AVR::LDDRdPtrQ); in decodeLoadStore()
347 Inst.setOpcode(AVR::STDPtrQRr); in decodeLoadStore()
395 Inst.setOpcode(AVR::STPtrRr); in decodeLoadStore()
400 Inst.setOpcode(AVR::STPtrPiRr); in decodeLoadStore()
403 Inst.setOpcode(AVR::STPtrPdRr); in decodeLoadStore()
406 Inst.setOpcode(AVR::LDRdPtr); in decodeLoadStore()
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/AsmParser/
H A DPPCAsmParser.cpp834 TmpInst.setOpcode((Opcode == PPC::DCBTx || Opcode == PPC::DCBTT) ? in processInstruction()
846 TmpInst.setOpcode(PPC::DCBT); in processInstruction()
856 TmpInst.setOpcode(PPC::DCBTST); in processInstruction()
879 TmpInst.setOpcode(PPC::DCBF); in processInstruction()
888 TmpInst.setOpcode(PPC::LA); in processInstruction()
898 TmpInst.setOpcode(Opcode == PPC::PLA ? PPC::PADDI : PPC::PADDI8); in processInstruction()
908 TmpInst.setOpcode(Opcode == PPC::PLApc ? PPC::PADDIpc : PPC::PADDI8pc); in processInstruction()
917 TmpInst.setOpcode(PPC::ADDI); in processInstruction()
926 TmpInst.setOpcode(PPC::PADDI); in processInstruction()
935 TmpInst.setOpcode(PPC::ADDIS); in processInstruction()
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/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/MCTargetDesc/
H A DCSKYAsmBackend.cpp293 Res.setOpcode(CSKY::LRW32); in relaxInstruction()
298 Res.setOpcode(CSKY::BR32); in relaxInstruction()
302 Res.setOpcode(CSKY::JSRI32); in relaxInstruction()
306 Res.setOpcode(CSKY::JMPI32); in relaxInstruction()
311 Res.setOpcode(Inst.getOpcode() == CSKY::JBT32 ? CSKY::JBT_E : CSKY::JBF_E); in relaxInstruction()
317 Res.setOpcode(CSKY::JBR32); in relaxInstruction()
330 Res.setOpcode(opcode); in relaxInstruction()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/
H A DMipsDisassembler.cpp623 MI.setOpcode(Mips::BOVC); in DecodeAddiGroupBranch()
626 MI.setOpcode(Mips::BEQC); in DecodeAddiGroupBranch()
629 MI.setOpcode(Mips::BEQZALC); in DecodeAddiGroupBranch()
651 MI.setOpcode(Mips::BOVC_MMR6); in DecodePOP35GroupBranchMMR6()
658 MI.setOpcode(Mips::BEQC_MMR6); in DecodePOP35GroupBranchMMR6()
665 MI.setOpcode(Mips::BEQZALC_MMR6); in DecodePOP35GroupBranchMMR6()
696 MI.setOpcode(Mips::BNVC); in DecodeDaddiGroupBranch()
699 MI.setOpcode(Mips::BNEC); in DecodeDaddiGroupBranch()
702 MI.setOpcode(Mips::BNEZALC); in DecodeDaddiGroupBranch()
724 MI.setOpcode(Mips::BNVC_MMR6); in DecodePOP37GroupBranchMMR6()
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/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEAsmPrinter.cpp87 SICInst.setOpcode(VE::SIC); in emitSIC()
95 BSICInst.setOpcode(VE::BSICrii); in emitBSIC()
107 LEAInst.setOpcode(VE::LEAzii); in emitLEAzzi()
119 LEASLInst.setOpcode(VE::LEASLzii); in emitLEASLzzi()
131 LEAInst.setOpcode(VE::LEAzii); in emitLEAzii()
144 LEASLInst.setOpcode(VE::LEASLrri); in emitLEASLrri()
156 Inst.setOpcode(Opcode); in emitBinary()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86EncodingOptimization.cpp97 MI.setOpcode(NewOpc); in optimizeInstFromVEX3ToVEX2()
198 MI.setOpcode(NewOpc); in optimizeShiftRotateWithImmediateOne()
285 MI.setOpcode(NewOpc); in optimizeVPCMPWithImmediateOneOrSix()
308 MI.setOpcode(NewOpc); in optimizeMOVSX()
329 MI.setOpcode(NewOpc); in optimizeINCDEC()
389 MI.setOpcode(NewOpc); in optimizeMOV()
447 MI.setOpcode(NewOpc); in optimizeToFixedRegisterForm()
495 MI.setOpcode(NewOpc); in optimizeToShortImmediateForm()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp2471 Inst.setOpcode(ARM::RFEDA); in DecodeMemMultipleWritebackInstruction()
2474 Inst.setOpcode(ARM::RFEDA_UPD); in DecodeMemMultipleWritebackInstruction()
2477 Inst.setOpcode(ARM::RFEDB); in DecodeMemMultipleWritebackInstruction()
2480 Inst.setOpcode(ARM::RFEDB_UPD); in DecodeMemMultipleWritebackInstruction()
2483 Inst.setOpcode(ARM::RFEIA); in DecodeMemMultipleWritebackInstruction()
2486 Inst.setOpcode(ARM::RFEIA_UPD); in DecodeMemMultipleWritebackInstruction()
2489 Inst.setOpcode(ARM::RFEIB); in DecodeMemMultipleWritebackInstruction()
2492 Inst.setOpcode(ARM::RFEIB_UPD); in DecodeMemMultipleWritebackInstruction()
2495 Inst.setOpcode(ARM::SRSDA); in DecodeMemMultipleWritebackInstruction()
2498 Inst.setOpcode(ARM::SRSDA_UPD); in DecodeMemMultipleWritebackInstruction()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp302 ITInst.setOpcode(ARM::t2IT); in flushPendingInstructions()
5886 case ARM::tBcc: Inst.setOpcode(ARM::tB); break; in cvtThumbBranches()
5887 case ARM::t2Bcc: Inst.setOpcode(ARM::t2B); break; in cvtThumbBranches()
5893 Inst.setOpcode(Cond == ARMCC::AL ? ARM::tB : ARM::tBcc); in cvtThumbBranches()
5897 Inst.setOpcode(Cond == ARMCC::AL ? ARM::t2B : ARM::t2Bcc); in cvtThumbBranches()
5908 Inst.setOpcode(ARM::t2B); in cvtThumbBranches()
5915 Inst.setOpcode(ARM::t2Bcc); in cvtThumbBranches()
8982 TmpInst.setOpcode(Opcode); in processInstruction()
9000 TmpInst.setOpcode(Opcode); in processInstruction()
9018 TmpInst.setOpcode(ARM::LDRSBTi); in processInstruction()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64AsmPrinter.cpp1784 MI.setOpcode(Opcode); in LowerFAULTING_OP()
1840 MOVI.setOpcode(AArch64::MOVID); in emitFMov0()
1849 FMov.setOpcode(STI->hasFullFP16() ? AArch64::FMOVWHr : AArch64::FMOVWSr); in emitFMov0()
1856 FMov.setOpcode(AArch64::FMOVWSr); in emitFMov0()
1861 FMov.setOpcode(AArch64::FMOVXDr); in emitFMov0()
2128 AUTInst.setOpcode(AUTOpc); in emitPtrauthAuthResign()
2166 PACInst.setOpcode(PACOpc); in emitPtrauthAuthResign()
2232 BRInst.setOpcode(Opc); in emitPtrauthBranch()
2696 Inst.setOpcode(MCOpC); in emitCBPseudoExpansion()
2814 MovZ.setOpcode(AArch64::MOVZXi); in emitInstruction()
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H A DAArch64MCInstLower.cpp377 OutMI.setOpcode(MI->getOpcode()); in Lower()
388 OutMI.setOpcode(AArch64::RET); in Lower()
393 OutMI.setOpcode(AArch64::RET); in Lower()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsAsmPrinter.cpp118 TmpInst0.setOpcode(Mips::JALR64); in emitPseudoIndirectBranch()
123 TmpInst0.setOpcode(Mips::JRC16_MMR6); in emitPseudoIndirectBranch()
125 TmpInst0.setOpcode(Mips::JALR); in emitPseudoIndirectBranch()
130 TmpInst0.setOpcode(Mips::JR_MM); in emitPseudoIndirectBranch()
133 TmpInst0.setOpcode(Mips::JR); in emitPseudoIndirectBranch()
854 I.setOpcode(Mips::JAL); in EmitJal()
863 I.setOpcode(Opcode); in EmitInstrReg()
882 I.setOpcode(Opcode); in EmitInstrRegReg()
892 I.setOpcode(Opcode); in EmitInstrRegRegReg()
H A DMipsMCInstLower.cpp224 OutMI.setOpcode(Mips::LUi); in lowerLongBranchLUi()
262 OutMI.setOpcode(Opcode); in lowerLongBranchADDiu()
327 OutMI.setOpcode(MI->getOpcode()); in Lower()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsTargetStreamer.cpp188 TmpInst.setOpcode(Opcode); in emitR()
197 TmpInst.setOpcode(Opcode); in emitRX()
218 TmpInst.setOpcode(Opcode); in emitII()
229 TmpInst.setOpcode(Opcode); in emitRRX()
248 TmpInst.setOpcode(Opcode); in emitRRRX()
268 TmpInst.setOpcode(Opcode); in emitRRIII()
1266 TmpInst.setOpcode(Mips::LUi); in emitDirectiveCpLoad()
1274 TmpInst.setOpcode(Mips::ADDiu); in emitDirectiveCpLoad()
1283 TmpInst.setOpcode(Mips::ADDu); in emitDirectiveCpLoad()
1370 Inst.setOpcode(Mips::OR); in emitDirectiveCpreturn()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/Disassembler/
H A DHexagonDisassembler.cpp201 CurrentBundle->setOpcode(Hexagon::BUNDLE); in makeBundle()
282 MI.setOpcode(Hexagon::S6_allocframe_to_raw); in remapInstruction()
290 MI.setOpcode(L6_deallocframe_map_to_raw); in remapInstruction()
298 MI.setOpcode(L6_return_map_to_raw); in remapInstruction()
306 MI.setOpcode(L4_return_map_to_raw_t); in remapInstruction()
314 MI.setOpcode(L4_return_map_to_raw_f); in remapInstruction()
322 MI.setOpcode(L4_return_map_to_raw_tnew_pt); in remapInstruction()
330 MI.setOpcode(L4_return_map_to_raw_fnew_pt); in remapInstruction()
338 MI.setOpcode(L4_return_map_to_raw_tnew_pnt); in remapInstruction()
346 MI.setOpcode(L4_return_map_to_raw_fnew_pnt); in remapInstruction()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcAsmPrinter.cpp114 CallInst.setOpcode(SP::CALL); in EmitCall()
122 RDPCInst.setOpcode(SP::RDASR); in EmitRDPC()
133 SETHIInst.setOpcode(SP::SETHIi); in EmitSETHI()
144 Inst.setOpcode(Opcode); in EmitBinary()
317 OutMI.setOpcode(MI->getOpcode()); in lowerToMCInst()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstrInfo.cpp34 NopInst.setOpcode(ARM::HINT); in getNop()
39 NopInst.setOpcode(ARM::MOVr); in getNop()
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kMCInstLower.cpp163 OutMI.setOpcode(Opcode); in Lower()
184 OutMI.setOpcode(Opcode); in Lower()
/freebsd/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCInstBuilder.h27 Inst.setOpcode(Opcode); in MCInstBuilder()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUMCInstLower.cpp153 OutMI.setOpcode(MCOpcode); in lowerT16D16Helper()
185 OutMI.setOpcode(TII->pseudoToMCOpcode(AMDGPU::S_SWAPPC_B64)); in lower()
208 OutMI.setOpcode(MCOpcode); in lower()

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