| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ClauseMergePass.cpp | 103 CFAlu.getOperand(CntIdx).setImm(getCFAluSize(CFAlu) + getCFAluSize(MI)); in cleanPotentialDisabledCFAlu()
154 RootCFAlu.getOperand(Mode0Idx).setImm( in mergeIfPossible()
156 RootCFAlu.getOperand(KBank0Idx).setImm( in mergeIfPossible()
159 .setImm(LatrCFAlu.getOperand(KBank0LineIdx).getImm()); in mergeIfPossible()
162 RootCFAlu.getOperand(Mode1Idx).setImm( in mergeIfPossible()
164 RootCFAlu.getOperand(KBank1Idx).setImm( in mergeIfPossible()
167 .setImm(LatrCFAlu.getOperand(KBank1LineIdx).getImm()); in mergeIfPossible()
169 RootCFAlu.getOperand(CntIdx).setImm(CumuledInsts); in mergeIfPossible()
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| H A D | R600InstrInfo.cpp | 747 PredSet->getOperand(2).setImm(Cond[1].getImm()); in insertBranch()
762 PredSet->getOperand(2).setImm(Cond[1].getImm()); in insertBranch()
908 MO.setImm(R600::PRED_SETNE_INT); in reverseBranchCondition()
911 MO.setImm(R600::PRED_SETE_INT); in reverseBranchCondition()
914 MO.setImm(R600::PRED_SETNE); in reverseBranchCondition()
917 MO.setImm(R600::PRED_SETE); in reverseBranchCondition()
948 MI.getOperand(8).setImm(0); in PredicateInstruction()
1332 MIB->getOperand(20).setImm(0); in buildSlotOfVectorInstruction()
1365 MI.getOperand(Idx).setImm(Imm); in setImmOperand()
1450 FlagOp.setImm(1); in addFlag()
[all …]
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| H A D | R600Packetizer.cpp | 217 MI->getOperand(LastOp).setImm(Bit); in setIsLastBit()
298 MI->getOperand(Op).setImm(BS[i]); in addToPacket()
302 MI.getOperand(Op).setImm(BS.back()); in addToPacket()
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| H A D | SIShrinkInstructions.cpp | 263 Src1.setImm(SignExtend32(Src1.getImm(), 32)); in shrinkScalarCompare()
277 Src1.setImm(SignExtend64(Src1.getImm(), 32)); in shrinkScalarCompare()
569 SrcImm->setImm(NewImm); in shrinkScalarLogicOp()
829 Src.setImm(static_cast<int64_t>(ModImm)); in runOnMachineFunction()
869 Src1->setImm(SignExtend64(Src1->getImm(), 32)); in runOnMachineFunction()
892 Src.setImm(SignExtend64(Src.getImm(), 32)); in runOnMachineFunction()
896 Src.setImm(static_cast<int64_t>(ModImm)); in runOnMachineFunction()
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| H A D | R600ControlFlowFinalizer.cpp | 432 ClauseHead.getOperand(7).setImm(ClauseContent.size() - 1); in MakeALUClause()
449 Clause.first->getOperand(0).setImm(0); in EmitALUClause()
459 MI.getOperand(0).setImm(Addr + MI.getOperand(0).getImm()); in CounterPropagateAddr()
603 IfOrElseInst->getOperand(1).setImm(1); in runOnMachineFunction()
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| H A D | SIFoldOperands.cpp | 278 Mod.setImm(NewModVal | SISrcMods::OP_SEL_1); in tryFoldImmWithOpSel()
289 Mod.setImm(NewModVal); in tryFoldImmWithOpSel()
297 Mod.setImm(NewModVal); in tryFoldImmWithOpSel()
307 Mod.setImm(NewModVal | SISrcMods::OP_SEL_0 | SISrcMods::OP_SEL_1); in tryFoldImmWithOpSel()
315 Mod.setImm(NewModVal | SISrcMods::OP_SEL_0); in tryFoldImmWithOpSel()
1583 DefClamp->setImm(1); in tryFoldClamp()
1759 DefOMod->setImm(OMod); in tryFoldOMod()
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| H A D | SIPeepholeSDWA.cpp | 449 SrcSel->setImm(getSrcSel()); in convertToSDWA()
450 SrcMods->setImm(getSrcMods(TII, Src)); in convertToSDWA()
496 DstSel->setImm(getDstSel()); in convertToSDWA()
499 DstUnused->setImm(getDstUnused()); in convertToSDWA()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyRegisterInfo.cpp | 82 MI.getOperand(OffsetOperandNum).setImm(Offset); in eliminateFrameIndex()
105 ImmMO.setImm(ImmMO.getImm() + uint32_t(FrameOffset)); in eliminateFrameIndex()
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| H A D | WebAssemblySetP2AlignOperands.cpp | 74 MI.getOperand(OperandNo).setImm(P2Align); in rewriteP2Align()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86EvexToVex.cpp | |
| H A D | X86CompressEVEX.cpp | 130 Imm.setImm(Imm.getImm() * Scale); in performCustomAdjustments()
147 Imm.setImm(0x20 | ((ImmVal & 2) << 3) | (ImmVal & 1)); in performCustomAdjustments()
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| H A D | X86InstrBuilder.h | 136 MI->getOperand(Operand + 1).setImm(1); in setDirectAddressInInstr()
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| H A D | X86InstrInfo.h | 227 I.getOperand(2).setImm(V); in setFrameAdjustment()
229 I.getOperand(1).setImm(V); in setFrameAdjustment()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64StackTaggingPreRA.cpp | 329 TagOp.setImm(0); in findFirstSlotCandidate()
331 TagOp.setImm(MaxScoreST.Tag); in findFirstSlotCandidate()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCMIPeephole.cpp | 727 MI.getOperand(3).setImm(3 - Immed); in simplifyCode()
866 MI.getOperand(2).setImm(NewElem); in simplifyCode()
1271 MI.getOperand(2).setImm(0); in simplifyCode()
1818 BI1->getOperand(0).setImm(NewPredicate1); in eliminateRedundantCompare()
1821 BI2->getOperand(0).setImm(NewPredicate2); in eliminateRedundantCompare()
1824 CMPI1->getOperand(2).setImm(NewImm1); in eliminateRedundantCompare()
1837 CMPI2->getOperand(2).setImm(NewImm2); in eliminateRedundantCompare()
1941 MI.getOperand(2).setImm(NewSH); in emitRLDICWhenLoweringJumpTables()
1942 MI.getOperand(3).setImm(NewMB); in emitRLDICWhenLoweringJumpTables()
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| H A D | PPCVSXSwapRemoval.cpp | 872 MI->getOperand(2).setImm(EltNo); in handleSpecialSwappables()
874 MI->getOperand(1).setImm(EltNo); in handleSpecialSwappables()
896 MI->getOperand(3).setImm(Selector); in handleSpecialSwappables()
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| H A D | PPCInstrInfo.cpp | 1210 MI.getOperand(4).setImm((ME + 1) & 31); in commuteInstructionImpl()
1211 MI.getOperand(5).setImm((MB - 1) & 31); in commuteInstructionImpl()
2037 Cond[0].setImm(Cond[0].getImm() == 0 ? 1 : 0); in reverseBranchCondition()
2040 Cond[0].setImm(PPC::InvertPredicate((PPC::Predicate)Cond[0].getImm())); in reverseBranchCondition()
2537 UseMI->getOperand(0).setImm(Pred); in optimizeCompareInstr()
2538 CmpInstr.getOperand(2).setImm(0); in optimizeCompareInstr()
2717 MI->getOperand(2).setImm(Mask); in optimizeCompareInstr()
2726 MI->getOperand(2).setImm(Mask); in optimizeCompareInstr()
2754 PredsToUpdate[i].first->setImm(PredsToUpdate[i].second); in optimizeCompareInstr()
3603 ADDIMI->getOperand(2).setImm(OffsetAddi + OffsetImm); in foldFrameOffset()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZShortenInst.cpp | 103 MI.getOperand(1).setImm(Imm >> 16); in shortenIIF()
373 ImmMO.setImm(ImmMO.getImm() & 0xfff); in processBlock()
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| H A D | SystemZInstrInfo.cpp | 92 LowOffsetOp.setImm(LowOffsetOp.getImm() + 8); in splitMove()
146 OffsetMO.setImm(Offset); in splitAdjDynAlloc()
162 MI.getOperand(1).setImm(uint32_t(MI.getOperand(1).getImm())); in expandRIPseudo()
313 WorkingMI.getOperand(4).setImm(CCMask ^ CCValid); in commuteInstructionImpl()
490 Cond[1].setImm(Cond[1].getImm() ^ Cond[0].getImm()); in reverseBranchCondition()
1764 MI.getOperand(5).setImm(MI.getOperand(5).getImm() ^ 32); in expandPostRAPseudo()
2151 CCMaskMO.setImm(NewCCMask); in prepareCompareSwapOperands()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMMCInstLower.cpp | 177 MCOp.setImm(Enc); in LowerARMMachineInstrToMCInst()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/Disassembler/ |
| H A D | BPFDisassembler.cpp | 203 Op.setImm(Make_64(Hi, Op.getImm())); in getInstruction()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCInst.h | 85 void setImm(int64_t Val) { in setImm() function
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonVExtract.cpp | 187 Op.setImm(MaxAlign->value()); in runOnMachineFunction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/Disassembler/ |
| H A D | LanaiDisassembler.cpp | 116 Instr.getOperand(2).setImm(0); in PostOperandDecodeAdjust()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiRegisterInfo.cpp | 212 MI.getOperand(3).setImm(LPAC::SUB); in eliminateFrameIndex()
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